1//===-- tsan_stat.cpp -----------------------------------------------------===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file is a part of ThreadSanitizer (TSan), a race detector. 10// 11//===----------------------------------------------------------------------===// 12#include "tsan_stat.h" 13#include "tsan_rtl.h" 14 15namespace __tsan { 16 17#if TSAN_COLLECT_STATS 18 19void StatAggregate(u64 *dst, u64 *src) { 20 for (int i = 0; i < StatCnt; i++) 21 dst[i] += src[i]; 22} 23 24void StatOutput(u64 *stat) { 25 stat[StatShadowNonZero] = stat[StatShadowProcessed] - stat[StatShadowZero]; 26 27 static const char *name[StatCnt] = {}; 28 name[StatMop] = "Memory accesses "; 29 name[StatMopRead] = " Including reads "; 30 name[StatMopWrite] = " writes "; 31 name[StatMop1] = " Including size 1 "; 32 name[StatMop2] = " size 2 "; 33 name[StatMop4] = " size 4 "; 34 name[StatMop8] = " size 8 "; 35 name[StatMopSame] = " Including same "; 36 name[StatMopIgnored] = " Including ignored "; 37 name[StatMopRange] = " Including range "; 38 name[StatMopRodata] = " Including .rodata "; 39 name[StatMopRangeRodata] = " Including .rodata range "; 40 name[StatShadowProcessed] = "Shadow processed "; 41 name[StatShadowZero] = " Including empty "; 42 name[StatShadowNonZero] = " Including non empty "; 43 name[StatShadowSameSize] = " Including same size "; 44 name[StatShadowIntersect] = " intersect "; 45 name[StatShadowNotIntersect] = " not intersect "; 46 name[StatShadowSameThread] = " Including same thread "; 47 name[StatShadowAnotherThread] = " another thread "; 48 name[StatShadowReplace] = " Including evicted "; 49 50 name[StatFuncEnter] = "Function entries "; 51 name[StatFuncExit] = "Function exits "; 52 name[StatEvents] = "Events collected "; 53 54 name[StatThreadCreate] = "Total threads created "; 55 name[StatThreadFinish] = " threads finished "; 56 name[StatThreadReuse] = " threads reused "; 57 name[StatThreadMaxTid] = " max tid "; 58 name[StatThreadMaxAlive] = " max alive threads "; 59 60 name[StatMutexCreate] = "Mutexes created "; 61 name[StatMutexDestroy] = " destroyed "; 62 name[StatMutexLock] = " lock "; 63 name[StatMutexUnlock] = " unlock "; 64 name[StatMutexRecLock] = " recursive lock "; 65 name[StatMutexRecUnlock] = " recursive unlock "; 66 name[StatMutexReadLock] = " read lock "; 67 name[StatMutexReadUnlock] = " read unlock "; 68 69 name[StatSyncCreated] = "Sync objects created "; 70 name[StatSyncDestroyed] = " destroyed "; 71 name[StatSyncAcquire] = " acquired "; 72 name[StatSyncRelease] = " released "; 73 74 name[StatClockAcquire] = "Clock acquire "; 75 name[StatClockAcquireEmpty] = " empty clock "; 76 name[StatClockAcquireFastRelease] = " fast from release-store "; 77 name[StatClockAcquireFull] = " full (slow) "; 78 name[StatClockAcquiredSomething] = " acquired something "; 79 name[StatClockRelease] = "Clock release "; 80 name[StatClockReleaseResize] = " resize "; 81 name[StatClockReleaseFast] = " fast "; 82 name[StatClockReleaseSlow] = " dirty overflow (slow) "; 83 name[StatClockReleaseFull] = " full (slow) "; 84 name[StatClockReleaseAcquired] = " was acquired "; 85 name[StatClockReleaseClearTail] = " clear tail "; 86 name[StatClockStore] = "Clock release store "; 87 name[StatClockStoreResize] = " resize "; 88 name[StatClockStoreFast] = " fast "; 89 name[StatClockStoreFull] = " slow "; 90 name[StatClockStoreTail] = " clear tail "; 91 name[StatClockAcquireRelease] = "Clock acquire-release "; 92 93 name[StatAtomic] = "Atomic operations "; 94 name[StatAtomicLoad] = " Including load "; 95 name[StatAtomicStore] = " store "; 96 name[StatAtomicExchange] = " exchange "; 97 name[StatAtomicFetchAdd] = " fetch_add "; 98 name[StatAtomicFetchSub] = " fetch_sub "; 99 name[StatAtomicFetchAnd] = " fetch_and "; 100 name[StatAtomicFetchOr] = " fetch_or "; 101 name[StatAtomicFetchXor] = " fetch_xor "; 102 name[StatAtomicFetchNand] = " fetch_nand "; 103 name[StatAtomicCAS] = " compare_exchange "; 104 name[StatAtomicFence] = " fence "; 105 name[StatAtomicRelaxed] = " Including relaxed "; 106 name[StatAtomicConsume] = " consume "; 107 name[StatAtomicAcquire] = " acquire "; 108 name[StatAtomicRelease] = " release "; 109 name[StatAtomicAcq_Rel] = " acq_rel "; 110 name[StatAtomicSeq_Cst] = " seq_cst "; 111 name[StatAtomic1] = " Including size 1 "; 112 name[StatAtomic2] = " size 2 "; 113 name[StatAtomic4] = " size 4 "; 114 name[StatAtomic8] = " size 8 "; 115 name[StatAtomic16] = " size 16 "; 116 117 name[StatAnnotation] = "Dynamic annotations "; 118 name[StatAnnotateHappensBefore] = " HappensBefore "; 119 name[StatAnnotateHappensAfter] = " HappensAfter "; 120 name[StatAnnotateCondVarSignal] = " CondVarSignal "; 121 name[StatAnnotateCondVarSignalAll] = " CondVarSignalAll "; 122 name[StatAnnotateMutexIsNotPHB] = " MutexIsNotPHB "; 123 name[StatAnnotateCondVarWait] = " CondVarWait "; 124 name[StatAnnotateRWLockCreate] = " RWLockCreate "; 125 name[StatAnnotateRWLockCreateStatic] = " StatAnnotateRWLockCreateStatic "; 126 name[StatAnnotateRWLockDestroy] = " RWLockDestroy "; 127 name[StatAnnotateRWLockAcquired] = " RWLockAcquired "; 128 name[StatAnnotateRWLockReleased] = " RWLockReleased "; 129 name[StatAnnotateTraceMemory] = " TraceMemory "; 130 name[StatAnnotateFlushState] = " FlushState "; 131 name[StatAnnotateNewMemory] = " NewMemory "; 132 name[StatAnnotateNoOp] = " NoOp "; 133 name[StatAnnotateFlushExpectedRaces] = " FlushExpectedRaces "; 134 name[StatAnnotateEnableRaceDetection] = " EnableRaceDetection "; 135 name[StatAnnotateMutexIsUsedAsCondVar] = " MutexIsUsedAsCondVar "; 136 name[StatAnnotatePCQGet] = " PCQGet "; 137 name[StatAnnotatePCQPut] = " PCQPut "; 138 name[StatAnnotatePCQDestroy] = " PCQDestroy "; 139 name[StatAnnotatePCQCreate] = " PCQCreate "; 140 name[StatAnnotateExpectRace] = " ExpectRace "; 141 name[StatAnnotateBenignRaceSized] = " BenignRaceSized "; 142 name[StatAnnotateBenignRace] = " BenignRace "; 143 name[StatAnnotateIgnoreReadsBegin] = " IgnoreReadsBegin "; 144 name[StatAnnotateIgnoreReadsEnd] = " IgnoreReadsEnd "; 145 name[StatAnnotateIgnoreWritesBegin] = " IgnoreWritesBegin "; 146 name[StatAnnotateIgnoreWritesEnd] = " IgnoreWritesEnd "; 147 name[StatAnnotateIgnoreSyncBegin] = " IgnoreSyncBegin "; 148 name[StatAnnotateIgnoreSyncEnd] = " IgnoreSyncEnd "; 149 name[StatAnnotatePublishMemoryRange] = " PublishMemoryRange "; 150 name[StatAnnotateUnpublishMemoryRange] = " UnpublishMemoryRange "; 151 name[StatAnnotateThreadName] = " ThreadName "; 152 name[Stat__tsan_mutex_create] = " __tsan_mutex_create "; 153 name[Stat__tsan_mutex_destroy] = " __tsan_mutex_destroy "; 154 name[Stat__tsan_mutex_pre_lock] = " __tsan_mutex_pre_lock "; 155 name[Stat__tsan_mutex_post_lock] = " __tsan_mutex_post_lock "; 156 name[Stat__tsan_mutex_pre_unlock] = " __tsan_mutex_pre_unlock "; 157 name[Stat__tsan_mutex_post_unlock] = " __tsan_mutex_post_unlock "; 158 name[Stat__tsan_mutex_pre_signal] = " __tsan_mutex_pre_signal "; 159 name[Stat__tsan_mutex_post_signal] = " __tsan_mutex_post_signal "; 160 name[Stat__tsan_mutex_pre_divert] = " __tsan_mutex_pre_divert "; 161 name[Stat__tsan_mutex_post_divert] = " __tsan_mutex_post_divert "; 162 163 name[StatMtxTotal] = "Contentionz "; 164 name[StatMtxTrace] = " Trace "; 165 name[StatMtxThreads] = " Threads "; 166 name[StatMtxReport] = " Report "; 167 name[StatMtxSyncVar] = " SyncVar "; 168 name[StatMtxSyncTab] = " SyncTab "; 169 name[StatMtxSlab] = " Slab "; 170 name[StatMtxAtExit] = " Atexit "; 171 name[StatMtxAnnotations] = " Annotations "; 172 name[StatMtxMBlock] = " MBlock "; 173 name[StatMtxDeadlockDetector] = " DeadlockDetector "; 174 name[StatMtxFired] = " FiredSuppressions "; 175 name[StatMtxRacy] = " RacyStacks "; 176 name[StatMtxFD] = " FD "; 177 name[StatMtxGlobalProc] = " GlobalProc "; 178 179 Printf("Statistics:\n"); 180 for (int i = 0; i < StatCnt; i++) 181 Printf("%s: %16zu\n", name[i], (uptr)stat[i]); 182} 183 184#endif 185 186} // namespace __tsan 187