1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 3 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 59 Temple Place - Suite 330, 20 Boston, MA 02111-1307, USA. */ 21 22#include "defs.h" 23#include "doublest.h" 24#include "frame.h" 25#include "frame-unwind.h" 26#include "frame-base.h" 27#include "dwarf2-frame.h" 28#include "inferior.h" 29#include "symtab.h" 30#include "value.h" 31#include "gdbcmd.h" 32#include "gdbcore.h" 33#include "dis-asm.h" 34#include "symfile.h" 35#include "objfiles.h" 36#include "gdb_string.h" 37#include "linespec.h" 38#include "regcache.h" 39#include "reggroups.h" 40#include "arch-utils.h" 41#include "osabi.h" 42#include "block.h" 43 44#include "elf-bfd.h" 45 46#include "alpha-tdep.h" 47 48 49static const char * 50alpha_register_name (int regno) 51{ 52 static const char * const register_names[] = 53 { 54 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", 55 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", 56 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", 57 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", 58 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 59 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 60 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 61 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", 62 "pc", "", "unique" 63 }; 64 65 if (regno < 0) 66 return NULL; 67 if (regno >= (sizeof(register_names) / sizeof(*register_names))) 68 return NULL; 69 return register_names[regno]; 70} 71 72static int 73alpha_cannot_fetch_register (int regno) 74{ 75 return regno == ALPHA_ZERO_REGNUM; 76} 77 78static int 79alpha_cannot_store_register (int regno) 80{ 81 return regno == ALPHA_ZERO_REGNUM; 82} 83 84static struct type * 85alpha_register_type (struct gdbarch *gdbarch, int regno) 86{ 87 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) 88 return builtin_type_void_data_ptr; 89 if (regno == ALPHA_PC_REGNUM) 90 return builtin_type_void_func_ptr; 91 92 /* Don't need to worry about little vs big endian until 93 some jerk tries to port to alpha-unicosmk. */ 94 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) 95 return builtin_type_ieee_double_little; 96 97 return builtin_type_int64; 98} 99 100/* Is REGNUM a member of REGGROUP? */ 101 102static int 103alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 104 struct reggroup *group) 105{ 106 /* Filter out any registers eliminated, but whose regnum is 107 reserved for backward compatibility, e.g. the vfp. */ 108 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') 109 return 0; 110 111 if (group == all_reggroup) 112 return 1; 113 114 /* Zero should not be saved or restored. Technically it is a general 115 register (just as $f31 would be a float if we represented it), but 116 there's no point displaying it during "info regs", so leave it out 117 of all groups except for "all". */ 118 if (regnum == ALPHA_ZERO_REGNUM) 119 return 0; 120 121 /* All other registers are saved and restored. */ 122 if (group == save_reggroup || group == restore_reggroup) 123 return 1; 124 125 /* All other groups are non-overlapping. */ 126 127 /* Since this is really a PALcode memory slot... */ 128 if (regnum == ALPHA_UNIQUE_REGNUM) 129 return group == system_reggroup; 130 131 /* Force the FPCR to be considered part of the floating point state. */ 132 if (regnum == ALPHA_FPCR_REGNUM) 133 return group == float_reggroup; 134 135 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) 136 return group == float_reggroup; 137 else 138 return group == general_reggroup; 139} 140 141static int 142alpha_register_byte (int regno) 143{ 144 return (regno * 8); 145} 146 147static int 148alpha_register_raw_size (int regno) 149{ 150 return 8; 151} 152 153static int 154alpha_register_virtual_size (int regno) 155{ 156 return 8; 157} 158 159/* The following represents exactly the conversion performed by 160 the LDS instruction. This applies to both single-precision 161 floating point and 32-bit integers. */ 162 163static void 164alpha_lds (void *out, const void *in) 165{ 166 ULONGEST mem = extract_unsigned_integer (in, 4); 167 ULONGEST frac = (mem >> 0) & 0x7fffff; 168 ULONGEST sign = (mem >> 31) & 1; 169 ULONGEST exp_msb = (mem >> 30) & 1; 170 ULONGEST exp_low = (mem >> 23) & 0x7f; 171 ULONGEST exp, reg; 172 173 exp = (exp_msb << 10) | exp_low; 174 if (exp_msb) 175 { 176 if (exp_low == 0x7f) 177 exp = 0x7ff; 178 } 179 else 180 { 181 if (exp_low != 0x00) 182 exp |= 0x380; 183 } 184 185 reg = (sign << 63) | (exp << 52) | (frac << 29); 186 store_unsigned_integer (out, 8, reg); 187} 188 189/* Similarly, this represents exactly the conversion performed by 190 the STS instruction. */ 191 192static void 193alpha_sts (void *out, const void *in) 194{ 195 ULONGEST reg, mem; 196 197 reg = extract_unsigned_integer (in, 8); 198 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); 199 store_unsigned_integer (out, 4, mem); 200} 201 202/* The alpha needs a conversion between register and memory format if the 203 register is a floating point register and memory format is float, as the 204 register format must be double or memory format is an integer with 4 205 bytes or less, as the representation of integers in floating point 206 registers is different. */ 207 208static int 209alpha_convert_register_p (int regno, struct type *type) 210{ 211 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); 212} 213 214static void 215alpha_register_to_value (struct frame_info *frame, int regnum, 216 struct type *valtype, void *out) 217{ 218 char in[MAX_REGISTER_SIZE]; 219 frame_register_read (frame, regnum, in); 220 switch (TYPE_LENGTH (valtype)) 221 { 222 case 4: 223 alpha_sts (out, in); 224 break; 225 case 8: 226 memcpy (out, in, 8); 227 break; 228 default: 229 error ("Cannot retrieve value from floating point register"); 230 } 231} 232 233static void 234alpha_value_to_register (struct frame_info *frame, int regnum, 235 struct type *valtype, const void *in) 236{ 237 char out[MAX_REGISTER_SIZE]; 238 switch (TYPE_LENGTH (valtype)) 239 { 240 case 4: 241 alpha_lds (out, in); 242 break; 243 case 8: 244 memcpy (out, in, 8); 245 break; 246 default: 247 error ("Cannot store value in floating point register"); 248 } 249 put_frame_register (frame, regnum, out); 250} 251 252 253/* The alpha passes the first six arguments in the registers, the rest on 254 the stack. The register arguments are stored in ARG_REG_BUFFER, and 255 then moved into the register file; this simplifies the passing of a 256 large struct which extends from the registers to the stack, plus avoids 257 three ptrace invocations per word. 258 259 We don't bother tracking which register values should go in integer 260 regs or fp regs; we load the same values into both. 261 262 If the called function is returning a structure, the address of the 263 structure to be returned is passed as a hidden first argument. */ 264 265static CORE_ADDR 266alpha_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, 267 struct regcache *regcache, CORE_ADDR bp_addr, 268 int nargs, struct value **args, CORE_ADDR sp, 269 int struct_return, CORE_ADDR struct_addr) 270{ 271 int i; 272 int accumulate_size = struct_return ? 8 : 0; 273 struct alpha_arg 274 { 275 char *contents; 276 int len; 277 int offset; 278 }; 279 struct alpha_arg *alpha_args 280 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); 281 struct alpha_arg *m_arg; 282 char arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; 283 int required_arg_regs; 284 285 /* The ABI places the address of the called function in T12. */ 286 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); 287 288 /* Set the return address register to point to the entry point 289 of the program, where a breakpoint lies in wait. */ 290 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); 291 292 /* Lay out the arguments in memory. */ 293 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) 294 { 295 struct value *arg = args[i]; 296 struct type *arg_type = check_typedef (VALUE_TYPE (arg)); 297 298 /* Cast argument to long if necessary as the compiler does it too. */ 299 switch (TYPE_CODE (arg_type)) 300 { 301 case TYPE_CODE_INT: 302 case TYPE_CODE_BOOL: 303 case TYPE_CODE_CHAR: 304 case TYPE_CODE_RANGE: 305 case TYPE_CODE_ENUM: 306 if (TYPE_LENGTH (arg_type) == 4) 307 { 308 /* 32-bit values must be sign-extended to 64 bits 309 even if the base data type is unsigned. */ 310 arg_type = builtin_type_int32; 311 arg = value_cast (arg_type, arg); 312 } 313 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) 314 { 315 arg_type = builtin_type_int64; 316 arg = value_cast (arg_type, arg); 317 } 318 break; 319 320 case TYPE_CODE_FLT: 321 /* "float" arguments loaded in registers must be passed in 322 register format, aka "double". */ 323 if (accumulate_size < sizeof (arg_reg_buffer) 324 && TYPE_LENGTH (arg_type) == 4) 325 { 326 arg_type = builtin_type_ieee_double_little; 327 arg = value_cast (arg_type, arg); 328 } 329 /* Tru64 5.1 has a 128-bit long double, and passes this by 330 invisible reference. No one else uses this data type. */ 331 else if (TYPE_LENGTH (arg_type) == 16) 332 { 333 /* Allocate aligned storage. */ 334 sp = (sp & -16) - 16; 335 336 /* Write the real data into the stack. */ 337 write_memory (sp, VALUE_CONTENTS (arg), 16); 338 339 /* Construct the indirection. */ 340 arg_type = lookup_pointer_type (arg_type); 341 arg = value_from_pointer (arg_type, sp); 342 } 343 break; 344 345 case TYPE_CODE_COMPLEX: 346 /* ??? The ABI says that complex values are passed as two 347 separate scalar values. This distinction only matters 348 for complex float. However, GCC does not implement this. */ 349 350 /* Tru64 5.1 has a 128-bit long double, and passes this by 351 invisible reference. */ 352 if (TYPE_LENGTH (arg_type) == 32) 353 { 354 /* Allocate aligned storage. */ 355 sp = (sp & -16) - 16; 356 357 /* Write the real data into the stack. */ 358 write_memory (sp, VALUE_CONTENTS (arg), 32); 359 360 /* Construct the indirection. */ 361 arg_type = lookup_pointer_type (arg_type); 362 arg = value_from_pointer (arg_type, sp); 363 } 364 break; 365 366 default: 367 break; 368 } 369 m_arg->len = TYPE_LENGTH (arg_type); 370 m_arg->offset = accumulate_size; 371 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; 372 m_arg->contents = VALUE_CONTENTS (arg); 373 } 374 375 /* Determine required argument register loads, loading an argument register 376 is expensive as it uses three ptrace calls. */ 377 required_arg_regs = accumulate_size / 8; 378 if (required_arg_regs > ALPHA_NUM_ARG_REGS) 379 required_arg_regs = ALPHA_NUM_ARG_REGS; 380 381 /* Make room for the arguments on the stack. */ 382 if (accumulate_size < sizeof(arg_reg_buffer)) 383 accumulate_size = 0; 384 else 385 accumulate_size -= sizeof(arg_reg_buffer); 386 sp -= accumulate_size; 387 388 /* Keep sp aligned to a multiple of 16 as the ABI requires. */ 389 sp &= ~15; 390 391 /* `Push' arguments on the stack. */ 392 for (i = nargs; m_arg--, --i >= 0;) 393 { 394 char *contents = m_arg->contents; 395 int offset = m_arg->offset; 396 int len = m_arg->len; 397 398 /* Copy the bytes destined for registers into arg_reg_buffer. */ 399 if (offset < sizeof(arg_reg_buffer)) 400 { 401 if (offset + len <= sizeof(arg_reg_buffer)) 402 { 403 memcpy (arg_reg_buffer + offset, contents, len); 404 continue; 405 } 406 else 407 { 408 int tlen = sizeof(arg_reg_buffer) - offset; 409 memcpy (arg_reg_buffer + offset, contents, tlen); 410 offset += tlen; 411 contents += tlen; 412 len -= tlen; 413 } 414 } 415 416 /* Everything else goes to the stack. */ 417 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); 418 } 419 if (struct_return) 420 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); 421 422 /* Load the argument registers. */ 423 for (i = 0; i < required_arg_regs; i++) 424 { 425 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, 426 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 427 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, 428 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 429 } 430 431 /* Finally, update the stack pointer. */ 432 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); 433 434 return sp; 435} 436 437/* Extract from REGCACHE the value about to be returned from a function 438 and copy it into VALBUF. */ 439 440static void 441alpha_extract_return_value (struct type *valtype, struct regcache *regcache, 442 void *valbuf) 443{ 444 int length = TYPE_LENGTH (valtype); 445 char raw_buffer[ALPHA_REGISTER_SIZE]; 446 ULONGEST l; 447 448 switch (TYPE_CODE (valtype)) 449 { 450 case TYPE_CODE_FLT: 451 switch (length) 452 { 453 case 4: 454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); 455 alpha_sts (valbuf, raw_buffer); 456 break; 457 458 case 8: 459 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 460 break; 461 462 case 16: 463 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 464 read_memory (l, valbuf, 16); 465 break; 466 467 default: 468 internal_error (__FILE__, __LINE__, "unknown floating point width"); 469 } 470 break; 471 472 case TYPE_CODE_COMPLEX: 473 switch (length) 474 { 475 case 8: 476 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 478 break; 479 480 case 16: 481 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 482 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM+1, 483 (char *)valbuf + 8); 484 break; 485 486 case 32: 487 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); 488 read_memory (l, valbuf, 32); 489 break; 490 491 default: 492 internal_error (__FILE__, __LINE__, "unknown floating point width"); 493 } 494 break; 495 496 default: 497 /* Assume everything else degenerates to an integer. */ 498 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 499 store_unsigned_integer (valbuf, length, l); 500 break; 501 } 502} 503 504/* Extract from REGCACHE the address of a structure about to be returned 505 from a function. */ 506 507static CORE_ADDR 508alpha_extract_struct_value_address (struct regcache *regcache) 509{ 510 ULONGEST addr; 511 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); 512 return addr; 513} 514 515/* Insert the given value into REGCACHE as if it was being 516 returned by a function. */ 517 518static void 519alpha_store_return_value (struct type *valtype, struct regcache *regcache, 520 const void *valbuf) 521{ 522 int length = TYPE_LENGTH (valtype); 523 char raw_buffer[ALPHA_REGISTER_SIZE]; 524 ULONGEST l; 525 526 switch (TYPE_CODE (valtype)) 527 { 528 case TYPE_CODE_FLT: 529 switch (length) 530 { 531 case 4: 532 alpha_lds (raw_buffer, valbuf); 533 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); 534 break; 535 536 case 8: 537 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 538 break; 539 540 case 16: 541 /* FIXME: 128-bit long doubles are returned like structures: 542 by writing into indirect storage provided by the caller 543 as the first argument. */ 544 error ("Cannot set a 128-bit long double return value."); 545 546 default: 547 internal_error (__FILE__, __LINE__, "unknown floating point width"); 548 } 549 break; 550 551 case TYPE_CODE_COMPLEX: 552 switch (length) 553 { 554 case 8: 555 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 556 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 557 break; 558 559 case 16: 560 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 561 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM+1, 562 (const char *)valbuf + 8); 563 break; 564 565 case 32: 566 /* FIXME: 128-bit long doubles are returned like structures: 567 by writing into indirect storage provided by the caller 568 as the first argument. */ 569 error ("Cannot set a 128-bit long double return value."); 570 571 default: 572 internal_error (__FILE__, __LINE__, "unknown floating point width"); 573 } 574 break; 575 576 default: 577 /* Assume everything else degenerates to an integer. */ 578 /* 32-bit values must be sign-extended to 64 bits 579 even if the base data type is unsigned. */ 580 if (length == 4) 581 valtype = builtin_type_int32; 582 l = unpack_long (valtype, valbuf); 583 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); 584 break; 585 } 586} 587 588 589static const unsigned char * 590alpha_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) 591{ 592 static const unsigned char alpha_breakpoint[] = 593 { 0x80, 0, 0, 0 }; /* call_pal bpt */ 594 595 *lenptr = sizeof(alpha_breakpoint); 596 return (alpha_breakpoint); 597} 598 599 600/* This returns the PC of the first insn after the prologue. 601 If we can't find the prologue, then return 0. */ 602 603CORE_ADDR 604alpha_after_prologue (CORE_ADDR pc) 605{ 606 struct symtab_and_line sal; 607 CORE_ADDR func_addr, func_end; 608 609 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 610 return 0; 611 612 sal = find_pc_line (func_addr, 0); 613 if (sal.end < func_end) 614 return sal.end; 615 616 /* The line after the prologue is after the end of the function. In this 617 case, tell the caller to find the prologue the hard way. */ 618 return 0; 619} 620 621/* Read an instruction from memory at PC, looking through breakpoints. */ 622 623unsigned int 624alpha_read_insn (CORE_ADDR pc) 625{ 626 char buf[4]; 627 int status; 628 629 status = read_memory_nobpt (pc, buf, 4); 630 if (status) 631 memory_error (status, pc); 632 return extract_unsigned_integer (buf, 4); 633} 634 635/* To skip prologues, I use this predicate. Returns either PC itself 636 if the code at PC does not look like a function prologue; otherwise 637 returns an address that (if we're lucky) follows the prologue. If 638 LENIENT, then we must skip everything which is involved in setting 639 up the frame (it's OK to skip more, just so long as we don't skip 640 anything which might clobber the registers which are being saved. */ 641 642static CORE_ADDR 643alpha_skip_prologue (CORE_ADDR pc) 644{ 645 unsigned long inst; 646 int offset; 647 CORE_ADDR post_prologue_pc; 648 char buf[4]; 649 650 /* Silently return the unaltered pc upon memory errors. 651 This could happen on OSF/1 if decode_line_1 tries to skip the 652 prologue for quickstarted shared library functions when the 653 shared library is not yet mapped in. 654 Reading target memory is slow over serial lines, so we perform 655 this check only if the target has shared libraries (which all 656 Alpha targets do). */ 657 if (target_read_memory (pc, buf, 4)) 658 return pc; 659 660 /* See if we can determine the end of the prologue via the symbol table. 661 If so, then return either PC, or the PC after the prologue, whichever 662 is greater. */ 663 664 post_prologue_pc = alpha_after_prologue (pc); 665 if (post_prologue_pc != 0) 666 return max (pc, post_prologue_pc); 667 668 /* Can't determine prologue from the symbol table, need to examine 669 instructions. */ 670 671 /* Skip the typical prologue instructions. These are the stack adjustment 672 instruction and the instructions that save registers on the stack 673 or in the gcc frame. */ 674 for (offset = 0; offset < 100; offset += 4) 675 { 676 inst = alpha_read_insn (pc + offset); 677 678 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ 679 continue; 680 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ 681 continue; 682 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 683 continue; 684 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ 685 continue; 686 687 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ 688 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ 689 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ 690 continue; 691 692 if (inst == 0x47de040f) /* bis sp,sp,fp */ 693 continue; 694 if (inst == 0x47fe040f) /* bis zero,sp,fp */ 695 continue; 696 697 break; 698 } 699 return pc + offset; 700} 701 702 703/* Figure out where the longjmp will land. 704 We expect the first arg to be a pointer to the jmp_buf structure from 705 which we extract the PC (JB_PC) that we will land at. The PC is copied 706 into the "pc". This routine returns true on success. */ 707 708static int 709alpha_get_longjmp_target (CORE_ADDR *pc) 710{ 711 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 712 CORE_ADDR jb_addr; 713 char raw_buffer[ALPHA_REGISTER_SIZE]; 714 715 jb_addr = read_register (ALPHA_A0_REGNUM); 716 717 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), 718 raw_buffer, tdep->jb_elt_size)) 719 return 0; 720 721 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); 722 return 1; 723} 724 725 726/* Frame unwinder for signal trampolines. We use alpha tdep bits that 727 describe the location and shape of the sigcontext structure. After 728 that, all registers are in memory, so it's easy. */ 729/* ??? Shouldn't we be able to do this generically, rather than with 730 OSABI data specific to Alpha? */ 731 732struct alpha_sigtramp_unwind_cache 733{ 734 CORE_ADDR sigcontext_addr; 735}; 736 737static struct alpha_sigtramp_unwind_cache * 738alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, 739 void **this_prologue_cache) 740{ 741 struct alpha_sigtramp_unwind_cache *info; 742 struct gdbarch_tdep *tdep; 743 744 if (*this_prologue_cache) 745 return *this_prologue_cache; 746 747 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); 748 *this_prologue_cache = info; 749 750 tdep = gdbarch_tdep (current_gdbarch); 751 info->sigcontext_addr = tdep->sigcontext_addr (next_frame); 752 753 return info; 754} 755 756/* Return the address of REGNUM in a sigtramp frame. Since this is 757 all arithmetic, it doesn't seem worthwhile to cache it. */ 758 759static CORE_ADDR 760alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum) 761{ 762 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 763 764 if (regnum >= 0 && regnum < 32) 765 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; 766 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) 767 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; 768 else if (regnum == ALPHA_PC_REGNUM) 769 return sigcontext_addr + tdep->sc_pc_offset; 770 771 return 0; 772} 773 774/* Given a GDB frame, determine the address of the calling function's 775 frame. This will be used to create a new GDB frame struct. */ 776 777static void 778alpha_sigtramp_frame_this_id (struct frame_info *next_frame, 779 void **this_prologue_cache, 780 struct frame_id *this_id) 781{ 782 struct alpha_sigtramp_unwind_cache *info 783 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 784 struct gdbarch_tdep *tdep; 785 CORE_ADDR stack_addr, code_addr; 786 787 /* If the OSABI couldn't locate the sigcontext, give up. */ 788 if (info->sigcontext_addr == 0) 789 return; 790 791 /* If we have dynamic signal trampolines, find their start. 792 If we do not, then we must assume there is a symbol record 793 that can provide the start address. */ 794 tdep = gdbarch_tdep (current_gdbarch); 795 if (tdep->dynamic_sigtramp_offset) 796 { 797 int offset; 798 code_addr = frame_pc_unwind (next_frame); 799 offset = tdep->dynamic_sigtramp_offset (code_addr); 800 if (offset >= 0) 801 code_addr -= offset; 802 else 803 code_addr = 0; 804 } 805 else 806 code_addr = frame_func_unwind (next_frame); 807 808 /* The stack address is trivially read from the sigcontext. */ 809 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, 810 ALPHA_SP_REGNUM); 811 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, 812 ALPHA_REGISTER_SIZE); 813 814 *this_id = frame_id_build (stack_addr, code_addr); 815} 816 817/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 818 819static void 820alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, 821 void **this_prologue_cache, 822 int regnum, int *optimizedp, 823 enum lval_type *lvalp, CORE_ADDR *addrp, 824 int *realnump, void *bufferp) 825{ 826 struct alpha_sigtramp_unwind_cache *info 827 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 828 CORE_ADDR addr; 829 830 if (info->sigcontext_addr != 0) 831 { 832 /* All integer and fp registers are stored in memory. */ 833 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); 834 if (addr != 0) 835 { 836 *optimizedp = 0; 837 *lvalp = lval_memory; 838 *addrp = addr; 839 *realnump = -1; 840 if (bufferp != NULL) 841 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); 842 return; 843 } 844 } 845 846 /* This extra register may actually be in the sigcontext, but our 847 current description of it in alpha_sigtramp_frame_unwind_cache 848 doesn't include it. Too bad. Fall back on whatever's in the 849 outer frame. */ 850 frame_register (next_frame, regnum, optimizedp, lvalp, addrp, 851 realnump, bufferp); 852} 853 854static const struct frame_unwind alpha_sigtramp_frame_unwind = { 855 SIGTRAMP_FRAME, 856 alpha_sigtramp_frame_this_id, 857 alpha_sigtramp_frame_prev_register 858}; 859 860static const struct frame_unwind * 861alpha_sigtramp_frame_sniffer (struct frame_info *next_frame) 862{ 863 CORE_ADDR pc = frame_pc_unwind (next_frame); 864 char *name; 865 866 /* We shouldn't even bother to try if the OSABI didn't register 867 a sigcontext_addr handler. */ 868 if (!gdbarch_tdep (current_gdbarch)->sigcontext_addr) 869 return NULL; 870 871 /* Otherwise we should be in a signal frame. */ 872 find_pc_partial_function (pc, &name, NULL, NULL); 873 if (PC_IN_SIGTRAMP (pc, name)) 874 return &alpha_sigtramp_frame_unwind; 875 876 return NULL; 877} 878 879/* Fallback alpha frame unwinder. Uses instruction scanning and knows 880 something about the traditional layout of alpha stack frames. */ 881 882struct alpha_heuristic_unwind_cache 883{ 884 CORE_ADDR *saved_regs; 885 CORE_ADDR vfp; 886 CORE_ADDR start_pc; 887 int return_reg; 888}; 889 890/* Heuristic_proc_start may hunt through the text section for a long 891 time across a 2400 baud serial line. Allows the user to limit this 892 search. */ 893static unsigned int heuristic_fence_post = 0; 894 895/* Attempt to locate the start of the function containing PC. We assume that 896 the previous function ends with an about_to_return insn. Not foolproof by 897 any means, since gcc is happy to put the epilogue in the middle of a 898 function. But we're guessing anyway... */ 899 900static CORE_ADDR 901alpha_heuristic_proc_start (CORE_ADDR pc) 902{ 903 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 904 CORE_ADDR last_non_nop = pc; 905 CORE_ADDR fence = pc - heuristic_fence_post; 906 CORE_ADDR orig_pc = pc; 907 CORE_ADDR func; 908 909 if (pc == 0) 910 return 0; 911 912 /* First see if we can find the start of the function from minimal 913 symbol information. This can succeed with a binary that doesn't 914 have debug info, but hasn't been stripped. */ 915 func = get_pc_function_start (pc); 916 if (func) 917 return func; 918 919 if (heuristic_fence_post == UINT_MAX 920 || fence < tdep->vm_min_address) 921 fence = tdep->vm_min_address; 922 923 /* Search back for previous return; also stop at a 0, which might be 924 seen for instance before the start of a code section. Don't include 925 nops, since this usually indicates padding between functions. */ 926 for (pc -= 4; pc >= fence; pc -= 4) 927 { 928 unsigned int insn = alpha_read_insn (pc); 929 switch (insn) 930 { 931 case 0: /* invalid insn */ 932 case 0x6bfa8001: /* ret $31,($26),1 */ 933 return last_non_nop; 934 935 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ 936 case 0x47ff041f: /* nop: bis $31,$31,$31 */ 937 break; 938 939 default: 940 last_non_nop = pc; 941 break; 942 } 943 } 944 945 /* It's not clear to me why we reach this point when stopping quietly, 946 but with this test, at least we don't print out warnings for every 947 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ 948 if (stop_soon == NO_STOP_QUIETLY) 949 { 950 static int blurb_printed = 0; 951 952 if (fence == tdep->vm_min_address) 953 warning ("Hit beginning of text section without finding"); 954 else 955 warning ("Hit heuristic-fence-post without finding"); 956 warning ("enclosing function for address 0x%s", paddr_nz (orig_pc)); 957 958 if (!blurb_printed) 959 { 960 printf_filtered ("\ 961This warning occurs if you are debugging a function without any symbols\n\ 962(for example, in a stripped executable). In that case, you may wish to\n\ 963increase the size of the search with the `set heuristic-fence-post' command.\n\ 964\n\ 965Otherwise, you told GDB there was a function where there isn't one, or\n\ 966(more likely) you have encountered a bug in GDB.\n"); 967 blurb_printed = 1; 968 } 969 } 970 971 return 0; 972} 973 974static struct alpha_heuristic_unwind_cache * 975alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, 976 void **this_prologue_cache, 977 CORE_ADDR start_pc) 978{ 979 struct alpha_heuristic_unwind_cache *info; 980 ULONGEST val; 981 CORE_ADDR limit_pc, cur_pc; 982 int frame_reg, frame_size, return_reg, reg; 983 984 if (*this_prologue_cache) 985 return *this_prologue_cache; 986 987 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); 988 *this_prologue_cache = info; 989 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); 990 991 limit_pc = frame_pc_unwind (next_frame); 992 if (start_pc == 0) 993 start_pc = alpha_heuristic_proc_start (limit_pc); 994 info->start_pc = start_pc; 995 996 frame_reg = ALPHA_SP_REGNUM; 997 frame_size = 0; 998 return_reg = -1; 999 1000 /* If we've identified a likely place to start, do code scanning. */ 1001 if (start_pc != 0) 1002 { 1003 /* Limit the forward search to 50 instructions. */ 1004 if (start_pc + 200 < limit_pc) 1005 limit_pc = start_pc + 200; 1006 1007 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) 1008 { 1009 unsigned int word = alpha_read_insn (cur_pc); 1010 1011 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 1012 { 1013 if (word & 0x8000) 1014 { 1015 /* Consider only the first stack allocation instruction 1016 to contain the static size of the frame. */ 1017 if (frame_size == 0) 1018 frame_size = (-word) & 0xffff; 1019 } 1020 else 1021 { 1022 /* Exit loop if a positive stack adjustment is found, which 1023 usually means that the stack cleanup code in the function 1024 epilogue is reached. */ 1025 break; 1026 } 1027 } 1028 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1029 { 1030 reg = (word & 0x03e00000) >> 21; 1031 1032 /* Ignore this instruction if we have already encountered 1033 an instruction saving the same register earlier in the 1034 function code. The current instruction does not tell 1035 us where the original value upon function entry is saved. 1036 All it says is that the function we are scanning reused 1037 that register for some computation of its own, and is now 1038 saving its result. */ 1039 if (info->saved_regs[reg]) 1040 continue; 1041 1042 if (reg == 31) 1043 continue; 1044 1045 /* Do not compute the address where the register was saved yet, 1046 because we don't know yet if the offset will need to be 1047 relative to $sp or $fp (we can not compute the address 1048 relative to $sp if $sp is updated during the execution of 1049 the current subroutine, for instance when doing some alloca). 1050 So just store the offset for the moment, and compute the 1051 address later when we know whether this frame has a frame 1052 pointer or not. */ 1053 /* Hack: temporarily add one, so that the offset is non-zero 1054 and we can tell which registers have save offsets below. */ 1055 info->saved_regs[reg] = (word & 0xffff) + 1; 1056 1057 /* Starting with OSF/1-3.2C, the system libraries are shipped 1058 without local symbols, but they still contain procedure 1059 descriptors without a symbol reference. GDB is currently 1060 unable to find these procedure descriptors and uses 1061 heuristic_proc_desc instead. 1062 As some low level compiler support routines (__div*, __add*) 1063 use a non-standard return address register, we have to 1064 add some heuristics to determine the return address register, 1065 or stepping over these routines will fail. 1066 Usually the return address register is the first register 1067 saved on the stack, but assembler optimization might 1068 rearrange the register saves. 1069 So we recognize only a few registers (t7, t9, ra) within 1070 the procedure prologue as valid return address registers. 1071 If we encounter a return instruction, we extract the 1072 the return address register from it. 1073 1074 FIXME: Rewriting GDB to access the procedure descriptors, 1075 e.g. via the minimal symbol table, might obviate this hack. */ 1076 if (return_reg == -1 1077 && cur_pc < (start_pc + 80) 1078 && (reg == ALPHA_T7_REGNUM 1079 || reg == ALPHA_T9_REGNUM 1080 || reg == ALPHA_RA_REGNUM)) 1081 return_reg = reg; 1082 } 1083 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1084 return_reg = (word >> 16) & 0x1f; 1085 else if (word == 0x47de040f) /* bis sp,sp,fp */ 1086 frame_reg = ALPHA_GCC_FP_REGNUM; 1087 else if (word == 0x47fe040f) /* bis zero,sp,fp */ 1088 frame_reg = ALPHA_GCC_FP_REGNUM; 1089 } 1090 1091 /* If we haven't found a valid return address register yet, keep 1092 searching in the procedure prologue. */ 1093 if (return_reg == -1) 1094 { 1095 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) 1096 { 1097 unsigned int word = alpha_read_insn (cur_pc); 1098 1099 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1100 { 1101 reg = (word & 0x03e00000) >> 21; 1102 if (reg == ALPHA_T7_REGNUM 1103 || reg == ALPHA_T9_REGNUM 1104 || reg == ALPHA_RA_REGNUM) 1105 { 1106 return_reg = reg; 1107 break; 1108 } 1109 } 1110 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1111 { 1112 return_reg = (word >> 16) & 0x1f; 1113 break; 1114 } 1115 1116 cur_pc += 4; 1117 } 1118 } 1119 } 1120 1121 /* Failing that, do default to the customary RA. */ 1122 if (return_reg == -1) 1123 return_reg = ALPHA_RA_REGNUM; 1124 info->return_reg = return_reg; 1125 1126 frame_unwind_unsigned_register (next_frame, frame_reg, &val); 1127 info->vfp = val + frame_size; 1128 1129 /* Convert offsets to absolute addresses. See above about adding 1130 one to the offsets to make all detected offsets non-zero. */ 1131 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) 1132 if (info->saved_regs[reg]) 1133 info->saved_regs[reg] += val - 1; 1134 1135 return info; 1136} 1137 1138/* Given a GDB frame, determine the address of the calling function's 1139 frame. This will be used to create a new GDB frame struct. */ 1140 1141static void 1142alpha_heuristic_frame_this_id (struct frame_info *next_frame, 1143 void **this_prologue_cache, 1144 struct frame_id *this_id) 1145{ 1146 struct alpha_heuristic_unwind_cache *info 1147 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1148 1149 *this_id = frame_id_build (info->vfp, info->start_pc); 1150} 1151 1152/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 1153 1154static void 1155alpha_heuristic_frame_prev_register (struct frame_info *next_frame, 1156 void **this_prologue_cache, 1157 int regnum, int *optimizedp, 1158 enum lval_type *lvalp, CORE_ADDR *addrp, 1159 int *realnump, void *bufferp) 1160{ 1161 struct alpha_heuristic_unwind_cache *info 1162 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1163 1164 /* The PC of the previous frame is stored in the link register of 1165 the current frame. Frob regnum so that we pull the value from 1166 the correct place. */ 1167 if (regnum == ALPHA_PC_REGNUM) 1168 regnum = info->return_reg; 1169 1170 /* For all registers known to be saved in the current frame, 1171 do the obvious and pull the value out. */ 1172 if (info->saved_regs[regnum]) 1173 { 1174 *optimizedp = 0; 1175 *lvalp = lval_memory; 1176 *addrp = info->saved_regs[regnum]; 1177 *realnump = -1; 1178 if (bufferp != NULL) 1179 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); 1180 return; 1181 } 1182 1183 /* The stack pointer of the previous frame is computed by popping 1184 the current stack frame. */ 1185 if (regnum == ALPHA_SP_REGNUM) 1186 { 1187 *optimizedp = 0; 1188 *lvalp = not_lval; 1189 *addrp = 0; 1190 *realnump = -1; 1191 if (bufferp != NULL) 1192 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); 1193 return; 1194 } 1195 1196 /* Otherwise assume the next frame has the same register value. */ 1197 frame_register (next_frame, regnum, optimizedp, lvalp, addrp, 1198 realnump, bufferp); 1199} 1200 1201static const struct frame_unwind alpha_heuristic_frame_unwind = { 1202 NORMAL_FRAME, 1203 alpha_heuristic_frame_this_id, 1204 alpha_heuristic_frame_prev_register 1205}; 1206 1207static const struct frame_unwind * 1208alpha_heuristic_frame_sniffer (struct frame_info *next_frame) 1209{ 1210 return &alpha_heuristic_frame_unwind; 1211} 1212 1213static CORE_ADDR 1214alpha_heuristic_frame_base_address (struct frame_info *next_frame, 1215 void **this_prologue_cache) 1216{ 1217 struct alpha_heuristic_unwind_cache *info 1218 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1219 1220 return info->vfp; 1221} 1222 1223static const struct frame_base alpha_heuristic_frame_base = { 1224 &alpha_heuristic_frame_unwind, 1225 alpha_heuristic_frame_base_address, 1226 alpha_heuristic_frame_base_address, 1227 alpha_heuristic_frame_base_address 1228}; 1229 1230/* Just like reinit_frame_cache, but with the right arguments to be 1231 callable as an sfunc. Used by the "set heuristic-fence-post" command. */ 1232 1233static void 1234reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) 1235{ 1236 reinit_frame_cache (); 1237} 1238 1239 1240/* ALPHA stack frames are almost impenetrable. When execution stops, 1241 we basically have to look at symbol information for the function 1242 that we stopped in, which tells us *which* register (if any) is 1243 the base of the frame pointer, and what offset from that register 1244 the frame itself is at. 1245 1246 This presents a problem when trying to examine a stack in memory 1247 (that isn't executing at the moment), using the "frame" command. We 1248 don't have a PC, nor do we have any registers except SP. 1249 1250 This routine takes two arguments, SP and PC, and tries to make the 1251 cached frames look as if these two arguments defined a frame on the 1252 cache. This allows the rest of info frame to extract the important 1253 arguments without difficulty. */ 1254 1255struct frame_info * 1256alpha_setup_arbitrary_frame (int argc, CORE_ADDR *argv) 1257{ 1258 if (argc != 2) 1259 error ("ALPHA frame specifications require two arguments: sp and pc"); 1260 1261 return create_new_frame (argv[0], argv[1]); 1262} 1263 1264/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 1265 dummy frame. The frame ID's base needs to match the TOS value 1266 saved by save_dummy_frame_tos(), and the PC match the dummy frame's 1267 breakpoint. */ 1268 1269static struct frame_id 1270alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 1271{ 1272 ULONGEST base; 1273 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); 1274 return frame_id_build (base, frame_pc_unwind (next_frame)); 1275} 1276 1277static CORE_ADDR 1278alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 1279{ 1280 ULONGEST pc; 1281 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); 1282 return pc; 1283} 1284 1285 1286/* Helper routines for alpha*-nat.c files to move register sets to and 1287 from core files. The UNIQUE pointer is allowed to be NULL, as most 1288 targets don't supply this value in their core files. */ 1289 1290void 1291alpha_supply_int_regs (int regno, const void *r0_r30, 1292 const void *pc, const void *unique) 1293{ 1294 int i; 1295 1296 for (i = 0; i < 31; ++i) 1297 if (regno == i || regno == -1) 1298 supply_register (i, (const char *)r0_r30 + i*8); 1299 1300 if (regno == ALPHA_ZERO_REGNUM || regno == -1) 1301 supply_register (ALPHA_ZERO_REGNUM, NULL); 1302 1303 if (regno == ALPHA_PC_REGNUM || regno == -1) 1304 supply_register (ALPHA_PC_REGNUM, pc); 1305 1306 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) 1307 supply_register (ALPHA_UNIQUE_REGNUM, unique); 1308} 1309 1310void 1311alpha_fill_int_regs (int regno, void *r0_r30, void *pc, void *unique) 1312{ 1313 int i; 1314 1315 for (i = 0; i < 31; ++i) 1316 if (regno == i || regno == -1) 1317 regcache_collect (i, (char *)r0_r30 + i*8); 1318 1319 if (regno == ALPHA_PC_REGNUM || regno == -1) 1320 regcache_collect (ALPHA_PC_REGNUM, pc); 1321 1322 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) 1323 regcache_collect (ALPHA_UNIQUE_REGNUM, unique); 1324} 1325 1326void 1327alpha_supply_fp_regs (int regno, const void *f0_f30, const void *fpcr) 1328{ 1329 int i; 1330 1331 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1332 if (regno == i || regno == -1) 1333 supply_register (i, (const char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); 1334 1335 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1336 supply_register (ALPHA_FPCR_REGNUM, fpcr); 1337} 1338 1339void 1340alpha_fill_fp_regs (int regno, void *f0_f30, void *fpcr) 1341{ 1342 int i; 1343 1344 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1345 if (regno == i || regno == -1) 1346 regcache_collect (i, (char *)f0_f30 + (i - ALPHA_FP0_REGNUM) * 8); 1347 1348 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1349 regcache_collect (ALPHA_FPCR_REGNUM, fpcr); 1350} 1351 1352 1353/* alpha_software_single_step() is called just before we want to resume 1354 the inferior, if we want to single-step it but there is no hardware 1355 or kernel single-step support (NetBSD on Alpha, for example). We find 1356 the target of the coming instruction and breakpoint it. 1357 1358 single_step is also called just after the inferior stops. If we had 1359 set up a simulated single-step, we undo our damage. */ 1360 1361static CORE_ADDR 1362alpha_next_pc (CORE_ADDR pc) 1363{ 1364 unsigned int insn; 1365 unsigned int op; 1366 int offset; 1367 LONGEST rav; 1368 1369 insn = alpha_read_insn (pc); 1370 1371 /* Opcode is top 6 bits. */ 1372 op = (insn >> 26) & 0x3f; 1373 1374 if (op == 0x1a) 1375 { 1376 /* Jump format: target PC is: 1377 RB & ~3 */ 1378 return (read_register ((insn >> 16) & 0x1f) & ~3); 1379 } 1380 1381 if ((op & 0x30) == 0x30) 1382 { 1383 /* Branch format: target PC is: 1384 (new PC) + (4 * sext(displacement)) */ 1385 if (op == 0x30 || /* BR */ 1386 op == 0x34) /* BSR */ 1387 { 1388 branch_taken: 1389 offset = (insn & 0x001fffff); 1390 if (offset & 0x00100000) 1391 offset |= 0xffe00000; 1392 offset *= 4; 1393 return (pc + 4 + offset); 1394 } 1395 1396 /* Need to determine if branch is taken; read RA. */ 1397 rav = (LONGEST) read_register ((insn >> 21) & 0x1f); 1398 switch (op) 1399 { 1400 case 0x38: /* BLBC */ 1401 if ((rav & 1) == 0) 1402 goto branch_taken; 1403 break; 1404 case 0x3c: /* BLBS */ 1405 if (rav & 1) 1406 goto branch_taken; 1407 break; 1408 case 0x39: /* BEQ */ 1409 if (rav == 0) 1410 goto branch_taken; 1411 break; 1412 case 0x3d: /* BNE */ 1413 if (rav != 0) 1414 goto branch_taken; 1415 break; 1416 case 0x3a: /* BLT */ 1417 if (rav < 0) 1418 goto branch_taken; 1419 break; 1420 case 0x3b: /* BLE */ 1421 if (rav <= 0) 1422 goto branch_taken; 1423 break; 1424 case 0x3f: /* BGT */ 1425 if (rav > 0) 1426 goto branch_taken; 1427 break; 1428 case 0x3e: /* BGE */ 1429 if (rav >= 0) 1430 goto branch_taken; 1431 break; 1432 1433 /* ??? Missing floating-point branches. */ 1434 } 1435 } 1436 1437 /* Not a branch or branch not taken; target PC is: 1438 pc + 4 */ 1439 return (pc + 4); 1440} 1441 1442void 1443alpha_software_single_step (enum target_signal sig, int insert_breakpoints_p) 1444{ 1445 static CORE_ADDR next_pc; 1446 typedef char binsn_quantum[BREAKPOINT_MAX]; 1447 static binsn_quantum break_mem; 1448 CORE_ADDR pc; 1449 1450 if (insert_breakpoints_p) 1451 { 1452 pc = read_pc (); 1453 next_pc = alpha_next_pc (pc); 1454 1455 target_insert_breakpoint (next_pc, break_mem); 1456 } 1457 else 1458 { 1459 target_remove_breakpoint (next_pc, break_mem); 1460 write_pc (next_pc); 1461 } 1462} 1463 1464 1465/* Initialize the current architecture based on INFO. If possible, re-use an 1466 architecture from ARCHES, which is a list of architectures already created 1467 during this debugging session. 1468 1469 Called e.g. at program startup, when reading a core file, and when reading 1470 a binary file. */ 1471 1472static struct gdbarch * 1473alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1474{ 1475 struct gdbarch_tdep *tdep; 1476 struct gdbarch *gdbarch; 1477 1478 /* Try to determine the ABI of the object we are loading. */ 1479 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) 1480 { 1481 /* If it's an ECOFF file, assume it's OSF/1. */ 1482 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) 1483 info.osabi = GDB_OSABI_OSF1; 1484 } 1485 1486 /* Find a candidate among extant architectures. */ 1487 arches = gdbarch_list_lookup_by_info (arches, &info); 1488 if (arches != NULL) 1489 return arches->gdbarch; 1490 1491 tdep = xmalloc (sizeof (struct gdbarch_tdep)); 1492 gdbarch = gdbarch_alloc (&info, tdep); 1493 1494 /* Lowest text address. This is used by heuristic_proc_start() 1495 to decide when to stop looking. */ 1496 tdep->vm_min_address = (CORE_ADDR) 0x120000000; 1497 1498 tdep->dynamic_sigtramp_offset = NULL; 1499 tdep->sigcontext_addr = NULL; 1500 tdep->sc_pc_offset = 2 * 8; 1501 tdep->sc_regs_offset = 4 * 8; 1502 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; 1503 1504 tdep->jb_pc = -1; /* longjmp support not enabled by default */ 1505 1506 /* Type sizes */ 1507 set_gdbarch_short_bit (gdbarch, 16); 1508 set_gdbarch_int_bit (gdbarch, 32); 1509 set_gdbarch_long_bit (gdbarch, 64); 1510 set_gdbarch_long_long_bit (gdbarch, 64); 1511 set_gdbarch_float_bit (gdbarch, 32); 1512 set_gdbarch_double_bit (gdbarch, 64); 1513 set_gdbarch_long_double_bit (gdbarch, 64); 1514 set_gdbarch_ptr_bit (gdbarch, 64); 1515 1516 /* Register info */ 1517 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); 1518 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); 1519 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); 1520 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); 1521 1522 set_gdbarch_register_name (gdbarch, alpha_register_name); 1523 set_gdbarch_deprecated_register_byte (gdbarch, alpha_register_byte); 1524 set_gdbarch_deprecated_register_raw_size (gdbarch, alpha_register_raw_size); 1525 set_gdbarch_deprecated_register_virtual_size (gdbarch, alpha_register_virtual_size); 1526 set_gdbarch_register_type (gdbarch, alpha_register_type); 1527 1528 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); 1529 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); 1530 1531 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); 1532 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); 1533 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); 1534 1535 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); 1536 1537 /* Prologue heuristics. */ 1538 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); 1539 1540 /* Disassembler. */ 1541 set_gdbarch_print_insn (gdbarch, print_insn_alpha); 1542 1543 /* Call info. */ 1544 1545 set_gdbarch_use_struct_convention (gdbarch, always_use_struct_convention); 1546 set_gdbarch_extract_return_value (gdbarch, alpha_extract_return_value); 1547 set_gdbarch_store_return_value (gdbarch, alpha_store_return_value); 1548 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, alpha_extract_struct_value_address); 1549 1550 /* Settings for calling functions in the inferior. */ 1551 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); 1552 1553 /* Methods for saving / extracting a dummy frame's ID. */ 1554 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); 1555 1556 /* Return the unwound PC value. */ 1557 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); 1558 1559 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1560 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); 1561 1562 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); 1563 set_gdbarch_decr_pc_after_break (gdbarch, 4); 1564 1565 /* Hook in ABI-specific overrides, if they have been registered. */ 1566 gdbarch_init_osabi (info, gdbarch); 1567 1568 /* Now that we have tuned the configuration, set a few final things 1569 based on what the OS ABI has told us. */ 1570 1571 if (tdep->jb_pc >= 0) 1572 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); 1573 1574 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer); 1575 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer); 1576 1577 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); 1578 1579 return gdbarch; 1580} 1581 1582void 1583alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) 1584{ 1585 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); 1586 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); 1587} 1588 1589extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ 1590 1591void 1592_initialize_alpha_tdep (void) 1593{ 1594 struct cmd_list_element *c; 1595 1596 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); 1597 1598 /* Let the user set the fence post for heuristic_proc_start. */ 1599 1600 /* We really would like to have both "0" and "unlimited" work, but 1601 command.c doesn't deal with that. So make it a var_zinteger 1602 because the user can always use "999999" or some such for unlimited. */ 1603 c = add_set_cmd ("heuristic-fence-post", class_support, var_zinteger, 1604 (char *) &heuristic_fence_post, 1605 "\ 1606Set the distance searched for the start of a function.\n\ 1607If you are debugging a stripped executable, GDB needs to search through the\n\ 1608program for the start of a function. This command sets the distance of the\n\ 1609search. The only need to set it is when debugging a stripped executable.", 1610 &setlist); 1611 /* We need to throw away the frame cache when we set this, since it 1612 might change our ability to get backtraces. */ 1613 set_cmd_sfunc (c, reinit_frame_cache_sfunc); 1614 add_show_from_set (c, &showlist); 1615} 1616