1132718Skan;; Scheduling description for IBM RS64 processors. 2169689Skan;; Copyright (C) 2003, 2004 Free Software Foundation, Inc. 3132718Skan;; 4132718Skan;; This file is part of GCC. 5132718Skan 6132718Skan;; GCC is free software; you can redistribute it and/or modify it 7132718Skan;; under the terms of the GNU General Public License as published 8132718Skan;; by the Free Software Foundation; either version 2, or (at your 9132718Skan;; option) any later version. 10132718Skan 11132718Skan;; GCC is distributed in the hope that it will be useful, but WITHOUT 12132718Skan;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13132718Skan;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14132718Skan;; License for more details. 15132718Skan 16132718Skan;; You should have received a copy of the GNU General Public License 17132718Skan;; along with GCC; see the file COPYING. If not, write to the 18169689Skan;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, 19169689Skan;; MA 02110-1301, USA. 20132718Skan 21132718Skan(define_automaton "rs64,rs64fp") 22132718Skan(define_cpu_unit "iu_rs64" "rs64") 23132718Skan(define_cpu_unit "mciu_rs64" "rs64") 24132718Skan(define_cpu_unit "fpu_rs64" "rs64fp") 25132718Skan(define_cpu_unit "lsu_rs64,bpu_rs64" "rs64") 26132718Skan 27132718Skan;; RS64a 64-bit IU, LSU, FPU, BPU 28132718Skan 29132718Skan(define_insn_reservation "rs64a-load" 2 30132718Skan (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u") 31132718Skan (eq_attr "cpu" "rs64a")) 32132718Skan "lsu_rs64") 33132718Skan 34169689Skan(define_insn_reservation "rs64a-store" 2 35132718Skan (and (eq_attr "type" "store,store_ux,store_u,fpstore,fpstore_ux,fpstore_u") 36132718Skan (eq_attr "cpu" "rs64a")) 37132718Skan "lsu_rs64") 38132718Skan 39132718Skan(define_insn_reservation "rs64a-fpload" 3 40132718Skan (and (eq_attr "type" "fpload,fpload_ux,fpload_u") 41132718Skan (eq_attr "cpu" "rs64a")) 42132718Skan "lsu_rs64") 43132718Skan 44169689Skan(define_insn_reservation "rs64a-llsc" 2 45169689Skan (and (eq_attr "type" "load_l,store_c") 46169689Skan (eq_attr "cpu" "rs64a")) 47169689Skan "lsu_rs64") 48169689Skan 49132718Skan(define_insn_reservation "rs64a-integer" 1 50132718Skan (and (eq_attr "type" "integer,insert_word") 51132718Skan (eq_attr "cpu" "rs64a")) 52132718Skan "iu_rs64") 53132718Skan 54169689Skan(define_insn_reservation "rs64a-two" 1 55169689Skan (and (eq_attr "type" "two") 56169689Skan (eq_attr "cpu" "rs64a")) 57169689Skan "iu_rs64,iu_rs64") 58169689Skan 59169689Skan(define_insn_reservation "rs64a-three" 1 60169689Skan (and (eq_attr "type" "three") 61169689Skan (eq_attr "cpu" "rs64a")) 62169689Skan "iu_rs64,iu_rs64,iu_rs64") 63169689Skan 64132718Skan(define_insn_reservation "rs64a-imul" 20 65132718Skan (and (eq_attr "type" "imul,imul_compare") 66132718Skan (eq_attr "cpu" "rs64a")) 67132718Skan "mciu_rs64*13") 68132718Skan 69132718Skan(define_insn_reservation "rs64a-imul2" 12 70132718Skan (and (eq_attr "type" "imul2") 71132718Skan (eq_attr "cpu" "rs64a")) 72132718Skan "mciu_rs64*5") 73132718Skan 74132718Skan(define_insn_reservation "rs64a-imul3" 8 75132718Skan (and (eq_attr "type" "imul3") 76132718Skan (eq_attr "cpu" "rs64a")) 77132718Skan "mciu_rs64*2") 78132718Skan 79132718Skan(define_insn_reservation "rs64a-lmul" 34 80132718Skan (and (eq_attr "type" "lmul,lmul_compare") 81132718Skan (eq_attr "cpu" "rs64a")) 82132718Skan "mciu_rs64*34") 83132718Skan 84132718Skan(define_insn_reservation "rs64a-idiv" 66 85132718Skan (and (eq_attr "type" "idiv") 86132718Skan (eq_attr "cpu" "rs64a")) 87132718Skan "mciu_rs64*66") 88132718Skan 89132718Skan(define_insn_reservation "rs64a-ldiv" 66 90132718Skan (and (eq_attr "type" "ldiv") 91132718Skan (eq_attr "cpu" "rs64a")) 92132718Skan "mciu_rs64*66") 93132718Skan 94132718Skan(define_insn_reservation "rs64a-compare" 3 95132718Skan (and (eq_attr "type" "cmp,fast_compare,compare,delayed_compare") 96132718Skan (eq_attr "cpu" "rs64a")) 97132718Skan "iu_rs64,nothing,bpu_rs64") 98132718Skan 99132718Skan(define_insn_reservation "rs64a-fpcompare" 5 100132718Skan (and (eq_attr "type" "fpcompare") 101132718Skan (eq_attr "cpu" "rs64a")) 102132718Skan "mciu_rs64,fpu_rs64,bpu_rs64") 103132718Skan 104132718Skan(define_insn_reservation "rs64a-fp" 4 105132718Skan (and (eq_attr "type" "fp,dmul") 106132718Skan (eq_attr "cpu" "rs64a")) 107132718Skan "mciu_rs64,fpu_rs64") 108132718Skan 109132718Skan(define_insn_reservation "rs64a-sdiv" 31 110132718Skan (and (eq_attr "type" "sdiv,ddiv") 111132718Skan (eq_attr "cpu" "rs64a")) 112132718Skan "mciu_rs64,fpu_rs64*31") 113132718Skan 114132718Skan(define_insn_reservation "rs64a-sqrt" 49 115132718Skan (and (eq_attr "type" "ssqrt,dsqrt") 116132718Skan (eq_attr "cpu" "rs64a")) 117132718Skan "mciu_rs64,fpu_rs64*49") 118132718Skan 119132718Skan(define_insn_reservation "rs64a-mfcr" 2 120132718Skan (and (eq_attr "type" "mfcr") 121132718Skan (eq_attr "cpu" "rs64a")) 122132718Skan "lsu_rs64") 123132718Skan 124132718Skan(define_insn_reservation "rs64a-mtcr" 3 125132718Skan (and (eq_attr "type" "mtcr") 126132718Skan (eq_attr "cpu" "rs64a")) 127132718Skan "lsu_rs64") 128132718Skan 129132718Skan(define_insn_reservation "rs64a-mtjmpr" 3 130132718Skan (and (eq_attr "type" "mtjmpr") 131132718Skan (eq_attr "cpu" "rs64a")) 132132718Skan "lsu_rs64") 133132718Skan 134132718Skan(define_insn_reservation "rs64a-mfjmpr" 2 135132718Skan (and (eq_attr "type" "mfjmpr") 136132718Skan (eq_attr "cpu" "rs64a")) 137132718Skan "lsu_rs64") 138132718Skan 139132718Skan(define_insn_reservation "rs64a-jmpreg" 1 140132718Skan (and (eq_attr "type" "jmpreg,branch,cr_logical,delayed_cr") 141132718Skan (eq_attr "cpu" "rs64a")) 142132718Skan "bpu_rs64") 143132718Skan 144169689Skan(define_insn_reservation "rs64a-isync" 6 145169689Skan (and (eq_attr "type" "isync") 146169689Skan (eq_attr "cpu" "rs64a")) 147169689Skan "bpu_rs64") 148169689Skan 149169689Skan(define_insn_reservation "rs64a-sync" 1 150169689Skan (and (eq_attr "type" "sync") 151169689Skan (eq_attr "cpu" "rs64a")) 152169689Skan "lsu_rs64") 153169689Skan 154