1; Options for the rs6000 port of the compiler
2;
3; Copyright (C) 2005 Free Software Foundation, Inc.
4; Contributed by Aldy Hernandez <aldy@quesejoda.com>.
5;
6; This file is part of GCC.
7;
8; GCC is free software; you can redistribute it and/or modify it under
9; the terms of the GNU General Public License as published by the Free
10; Software Foundation; either version 2, or (at your option) any later
11; version.
12;
13; GCC is distributed in the hope that it will be useful, but WITHOUT
14; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16; License for more details.
17;
18; You should have received a copy of the GNU General Public License
19; along with GCC; see the file COPYING.  If not, write to the Free
20; Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21; 02110-1301, USA.
22
23mpower
24Target Report RejectNegative Mask(POWER)
25Use POWER instruction set
26
27mno-power
28Target Report RejectNegative
29Do not use POWER instruction set
30
31mpower2
32Target Report Mask(POWER2)
33Use POWER2 instruction set
34
35mpowerpc
36Target Report RejectNegative Mask(POWERPC)
37Use PowerPC instruction set
38
39mno-powerpc
40Target Report RejectNegative
41Do not use PowerPC instruction set
42
43mpowerpc64
44Target Report Mask(POWERPC64)
45Use PowerPC-64 instruction set
46
47mpowerpc-gpopt
48Target Report Mask(PPC_GPOPT)
49Use PowerPC General Purpose group optional instructions
50
51mpowerpc-gfxopt
52Target Report Mask(PPC_GFXOPT)
53Use PowerPC Graphics group optional instructions
54
55mmfcrf
56Target Report Mask(MFCRF)
57Use PowerPC V2.01 single field mfcr instruction
58
59mpopcntb
60Target Report Mask(POPCNTB)
61Use PowerPC V2.02 popcntb instruction
62
63mfprnd
64Target Report Mask(FPRND)
65Use PowerPC V2.02 floating point rounding instructions
66
67maltivec
68Target Report Mask(ALTIVEC)
69Use AltiVec instructions
70
71mmulhw
72Target Report Mask(MULHW)
73Use 4xx half-word multiply instructions
74
75mdlmzb
76Target Report Mask(DLMZB)
77Use 4xx string-search dlmzb instruction
78
79mmultiple
80Target Report Mask(MULTIPLE)
81Generate load/store multiple instructions
82
83mstring
84Target Report Mask(STRING)
85Generate string instructions for block moves
86
87mnew-mnemonics
88Target Report RejectNegative Mask(NEW_MNEMONICS)
89Use new mnemonics for PowerPC architecture
90
91mold-mnemonics
92Target Report RejectNegative InverseMask(NEW_MNEMONICS)
93Use old mnemonics for PowerPC architecture
94
95msoft-float
96Target Report RejectNegative Mask(SOFT_FLOAT)
97Do not use hardware floating point
98
99mhard-float
100Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT)
101Use hardware floating point
102
103mno-update
104Target Report RejectNegative Mask(NO_UPDATE)
105Do not generate load/store with update instructions
106
107mupdate
108Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE)
109Generate load/store with update instructions
110
111mno-fused-madd
112Target Report RejectNegative Mask(NO_FUSED_MADD)
113Do not generate fused multiply/add instructions
114
115mfused-madd
116Target Report RejectNegative InverseMask(NO_FUSED_MADD, FUSED_MADD)
117Generate fused multiply/add instructions
118
119msched-prolog
120Target Report Var(TARGET_SCHED_PROLOG) Init(1)
121Schedule the start and end of the procedure
122
123msched-epilog
124Target Undocumented Var(TARGET_SCHED_PROLOG) VarExists
125
126maix-struct-return
127Target Report RejectNegative Var(aix_struct_return)
128Return all structures in memory (AIX default)
129
130msvr4-struct-return
131Target Report RejectNegative Var(aix_struct_return,0) VarExists
132Return small structures in registers (SVR4 default)
133
134mxl-compat
135Target Report Var(TARGET_XL_COMPAT)
136Conform more closely to IBM XLC semantics
137
138mswdiv
139Target Report Var(swdiv)
140Generate software floating point divide for better throughput
141
142mno-fp-in-toc
143Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC)
144Do not place floating point constants in TOC
145
146mfp-in-toc
147Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0)
148Place floating point constants in TOC
149
150mno-sum-in-toc
151Target RejectNegative Var(TARGET_NO_SUM_IN_TOC)
152Do not place symbol+offset constants in TOC
153
154msum-in-toc
155Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) VarExists
156Place symbol+offset constants in TOC
157
158;  Output only one TOC entry per module.  Normally linking fails if
159;   there are more than 16K unique variables/constants in an executable.  With
160;   this option, linking fails only if there are more than 16K modules, or
161;   if there are more than 16K unique variables/constant in a single module.
162;
163;   This is at the cost of having 2 extra loads and one extra store per
164;   function, and one less allocable register.
165mminimal-toc
166Target Report Mask(MINIMAL_TOC)
167Use only one TOC entry per procedure
168
169mfull-toc
170Target Report
171Put everything in the regular TOC
172
173mvrsave
174Target Report Var(TARGET_ALTIVEC_VRSAVE)
175Generate VRSAVE instructions when generating AltiVec code
176
177mvrsave=
178Target RejectNegative Joined
179-mvrsave=yes/no	Deprecated option.  Use -mvrsave/-mno-vrsave instead
180
181misel
182Target Var(rs6000_isel)
183Generate isel instructions
184
185misel=
186Target RejectNegative Joined
187-misel=yes/no	Deprecated option.  Use -misel/-mno-isel instead
188
189mspe
190Target Var(rs6000_spe)
191Generate SPE SIMD instructions on E500
192
193mspe=
194Target RejectNegative Joined
195-mspe=yes/no	Deprecated option.  Use -mspe/-mno-spe instead
196
197mdebug=
198Target RejectNegative Joined
199-mdebug=	Enable debug output
200
201mabi=
202Target RejectNegative Joined
203-mabi=	Specify ABI to use
204
205mcpu=
206Target RejectNegative Joined
207-mcpu=	Use features of and schedule code for given CPU
208
209mtune=
210Target RejectNegative Joined
211-mtune=	Schedule code for given CPU
212
213mtraceback=
214Target RejectNegative Joined
215-mtraceback=	Select full, part, or no traceback table
216
217mlongcall
218Target Report Var(rs6000_default_long_calls)
219Avoid all range limits on call instructions
220
221mwarn-altivec-long
222Target Var(rs6000_warn_altivec_long) Init(1)
223Warn about deprecated 'vector long ...' AltiVec type usage
224
225mfloat-gprs=
226Target RejectNegative Joined
227-mfloat-gprs=	Select GPR floating point method
228
229mlong-double-
230Target RejectNegative Joined UInteger
231-mlong-double-<n>	Specify size of long double (64 or 128 bits)
232
233msched-costly-dep=
234Target RejectNegative Joined 
235Determine which dependences between insns are considered costly
236
237minsert-sched-nops=
238Target RejectNegative Joined
239Specify which post scheduling nop insertion scheme to apply
240
241malign-
242Target RejectNegative Joined
243Specify alignment of structure fields default/natural
244
245mprioritize-restricted-insns=
246Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority)
247Specify scheduling priority for dispatch slot restricted insns
248