1/* Select disassembly routine for specified architecture. 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 3 2004, 2005, 2006 Free Software Foundation, Inc. 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 18 19#include "sysdep.h" 20#include "dis-asm.h" 21 22#ifdef ARCH_all 23#define ARCH_alpha 24#define ARCH_arc 25#define ARCH_arm 26#define ARCH_avr 27#define ARCH_bfin 28#define ARCH_cr16 29#define ARCH_cris 30#define ARCH_crx 31#define ARCH_d10v 32#define ARCH_d30v 33#define ARCH_dlx 34#define ARCH_fr30 35#define ARCH_frv 36#define ARCH_h8300 37#define ARCH_h8500 38#define ARCH_hppa 39#define ARCH_i370 40#define ARCH_i386 41#define ARCH_i860 42#define ARCH_i960 43#define ARCH_ia64 44#define ARCH_ip2k 45#define ARCH_iq2000 46#define ARCH_m32c 47#define ARCH_m32r 48#define ARCH_m68hc11 49#define ARCH_m68hc12 50#define ARCH_m68k 51#define ARCH_m88k 52#define ARCH_maxq 53#define ARCH_mcore 54#define ARCH_mep 55#define ARCH_mips 56#define ARCH_mmix 57#define ARCH_mn10200 58#define ARCH_mn10300 59#define ARCH_mt 60#define ARCH_msp430 61#define ARCH_ns32k 62#define ARCH_openrisc 63#define ARCH_or32 64#define ARCH_pdp11 65#define ARCH_pj 66#define ARCH_powerpc 67#define ARCH_rs6000 68#define ARCH_s390 69#define ARCH_score 70#define ARCH_sh 71#define ARCH_sparc 72#define ARCH_spu 73#define ARCH_tic30 74#define ARCH_tic4x 75#define ARCH_tic54x 76#define ARCH_tic80 77#define ARCH_v850 78#define ARCH_vax 79#define ARCH_w65 80#define ARCH_xstormy16 81#define ARCH_xc16x 82#define ARCH_xtensa 83#define ARCH_z80 84#define ARCH_z8k 85#define INCLUDE_SHMEDIA 86#endif 87 88#ifdef ARCH_m32c 89#include "m32c-desc.h" 90#endif 91 92disassembler_ftype 93disassembler (abfd) 94 bfd *abfd; 95{ 96 enum bfd_architecture a = bfd_get_arch (abfd); 97 disassembler_ftype disassemble; 98 99 switch (a) 100 { 101 /* If you add a case to this table, also add it to the 102 ARCH_all definition right above this function. */ 103#ifdef ARCH_alpha 104 case bfd_arch_alpha: 105 disassemble = print_insn_alpha; 106 break; 107#endif 108#ifdef ARCH_arc 109 case bfd_arch_arc: 110 { 111 disassemble = arc_get_disassembler (abfd); 112 break; 113 } 114#endif 115#ifdef ARCH_arm 116 case bfd_arch_arm: 117 if (bfd_big_endian (abfd)) 118 disassemble = print_insn_big_arm; 119 else 120 disassemble = print_insn_little_arm; 121 break; 122#endif 123#ifdef ARCH_avr 124 case bfd_arch_avr: 125 disassemble = print_insn_avr; 126 break; 127#endif 128#ifdef ARCH_bfin 129 case bfd_arch_bfin: 130 disassemble = print_insn_bfin; 131 break; 132#endif 133#ifdef ARCH_cr16 134 case bfd_arch_cr16: 135 disassemble = print_insn_cr16; 136 break; 137#endif 138#ifdef ARCH_cris 139 case bfd_arch_cris: 140 disassemble = cris_get_disassembler (abfd); 141 break; 142#endif 143#ifdef ARCH_crx 144 case bfd_arch_crx: 145 disassemble = print_insn_crx; 146 break; 147#endif 148#ifdef ARCH_d10v 149 case bfd_arch_d10v: 150 disassemble = print_insn_d10v; 151 break; 152#endif 153#ifdef ARCH_d30v 154 case bfd_arch_d30v: 155 disassemble = print_insn_d30v; 156 break; 157#endif 158#ifdef ARCH_dlx 159 case bfd_arch_dlx: 160 /* As far as I know we only handle big-endian DLX objects. */ 161 disassemble = print_insn_dlx; 162 break; 163#endif 164#ifdef ARCH_h8300 165 case bfd_arch_h8300: 166 if (bfd_get_mach (abfd) == bfd_mach_h8300h 167 || bfd_get_mach (abfd) == bfd_mach_h8300hn) 168 disassemble = print_insn_h8300h; 169 else if (bfd_get_mach (abfd) == bfd_mach_h8300s 170 || bfd_get_mach (abfd) == bfd_mach_h8300sn 171 || bfd_get_mach (abfd) == bfd_mach_h8300sx 172 || bfd_get_mach (abfd) == bfd_mach_h8300sxn) 173 disassemble = print_insn_h8300s; 174 else 175 disassemble = print_insn_h8300; 176 break; 177#endif 178#ifdef ARCH_h8500 179 case bfd_arch_h8500: 180 disassemble = print_insn_h8500; 181 break; 182#endif 183#ifdef ARCH_hppa 184 case bfd_arch_hppa: 185 disassemble = print_insn_hppa; 186 break; 187#endif 188#ifdef ARCH_i370 189 case bfd_arch_i370: 190 disassemble = print_insn_i370; 191 break; 192#endif 193#ifdef ARCH_i386 194 case bfd_arch_i386: 195 disassemble = print_insn_i386; 196 break; 197#endif 198#ifdef ARCH_i860 199 case bfd_arch_i860: 200 disassemble = print_insn_i860; 201 break; 202#endif 203#ifdef ARCH_i960 204 case bfd_arch_i960: 205 disassemble = print_insn_i960; 206 break; 207#endif 208#ifdef ARCH_ia64 209 case bfd_arch_ia64: 210 disassemble = print_insn_ia64; 211 break; 212#endif 213#ifdef ARCH_ip2k 214 case bfd_arch_ip2k: 215 disassemble = print_insn_ip2k; 216 break; 217#endif 218#ifdef ARCH_fr30 219 case bfd_arch_fr30: 220 disassemble = print_insn_fr30; 221 break; 222#endif 223#ifdef ARCH_m32r 224 case bfd_arch_m32r: 225 disassemble = print_insn_m32r; 226 break; 227#endif 228#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) 229 case bfd_arch_m68hc11: 230 disassemble = print_insn_m68hc11; 231 break; 232 case bfd_arch_m68hc12: 233 disassemble = print_insn_m68hc12; 234 break; 235#endif 236#ifdef ARCH_m68k 237 case bfd_arch_m68k: 238 disassemble = print_insn_m68k; 239 break; 240#endif 241#ifdef ARCH_m88k 242 case bfd_arch_m88k: 243 disassemble = print_insn_m88k; 244 break; 245#endif 246#ifdef ARCH_maxq 247 case bfd_arch_maxq: 248 disassemble = print_insn_maxq_little; 249 break; 250#endif 251#ifdef ARCH_mt 252 case bfd_arch_mt: 253 disassemble = print_insn_mt; 254 break; 255#endif 256#ifdef ARCH_msp430 257 case bfd_arch_msp430: 258 disassemble = print_insn_msp430; 259 break; 260#endif 261#ifdef ARCH_ns32k 262 case bfd_arch_ns32k: 263 disassemble = print_insn_ns32k; 264 break; 265#endif 266#ifdef ARCH_mcore 267 case bfd_arch_mcore: 268 disassemble = print_insn_mcore; 269 break; 270#endif 271#ifdef ARCH_mep 272 case bfd_arch_mep: 273 disassemble = print_insn_mep; 274 break; 275#endif 276#ifdef ARCH_mips 277 case bfd_arch_mips: 278 if (bfd_big_endian (abfd)) 279 disassemble = print_insn_big_mips; 280 else 281 disassemble = print_insn_little_mips; 282 break; 283#endif 284#ifdef ARCH_mmix 285 case bfd_arch_mmix: 286 disassemble = print_insn_mmix; 287 break; 288#endif 289#ifdef ARCH_mn10200 290 case bfd_arch_mn10200: 291 disassemble = print_insn_mn10200; 292 break; 293#endif 294#ifdef ARCH_mn10300 295 case bfd_arch_mn10300: 296 disassemble = print_insn_mn10300; 297 break; 298#endif 299#ifdef ARCH_openrisc 300 case bfd_arch_openrisc: 301 disassemble = print_insn_openrisc; 302 break; 303#endif 304#ifdef ARCH_or32 305 case bfd_arch_or32: 306 if (bfd_big_endian (abfd)) 307 disassemble = print_insn_big_or32; 308 else 309 disassemble = print_insn_little_or32; 310 break; 311#endif 312#ifdef ARCH_pdp11 313 case bfd_arch_pdp11: 314 disassemble = print_insn_pdp11; 315 break; 316#endif 317#ifdef ARCH_pj 318 case bfd_arch_pj: 319 disassemble = print_insn_pj; 320 break; 321#endif 322#ifdef ARCH_powerpc 323 case bfd_arch_powerpc: 324 if (bfd_big_endian (abfd)) 325 disassemble = print_insn_big_powerpc; 326 else 327 disassemble = print_insn_little_powerpc; 328 break; 329#endif 330#ifdef ARCH_rs6000 331 case bfd_arch_rs6000: 332 if (bfd_get_mach (abfd) == bfd_mach_ppc_620) 333 disassemble = print_insn_big_powerpc; 334 else 335 disassemble = print_insn_rs6000; 336 break; 337#endif 338#ifdef ARCH_s390 339 case bfd_arch_s390: 340 disassemble = print_insn_s390; 341 break; 342#endif 343#ifdef ARCH_score 344 case bfd_arch_score: 345 if (bfd_big_endian (abfd)) 346 disassemble = print_insn_big_score; 347 else 348 disassemble = print_insn_little_score; 349 break; 350#endif 351#ifdef ARCH_sh 352 case bfd_arch_sh: 353 disassemble = print_insn_sh; 354 break; 355#endif 356#ifdef ARCH_sparc 357 case bfd_arch_sparc: 358 disassemble = print_insn_sparc; 359 break; 360#endif 361#ifdef ARCH_spu 362 case bfd_arch_spu: 363 disassemble = print_insn_spu; 364 break; 365#endif 366#ifdef ARCH_tic30 367 case bfd_arch_tic30: 368 disassemble = print_insn_tic30; 369 break; 370#endif 371#ifdef ARCH_tic4x 372 case bfd_arch_tic4x: 373 disassemble = print_insn_tic4x; 374 break; 375#endif 376#ifdef ARCH_tic54x 377 case bfd_arch_tic54x: 378 disassemble = print_insn_tic54x; 379 break; 380#endif 381#ifdef ARCH_tic80 382 case bfd_arch_tic80: 383 disassemble = print_insn_tic80; 384 break; 385#endif 386#ifdef ARCH_v850 387 case bfd_arch_v850: 388 disassemble = print_insn_v850; 389 break; 390#endif 391#ifdef ARCH_w65 392 case bfd_arch_w65: 393 disassemble = print_insn_w65; 394 break; 395#endif 396#ifdef ARCH_xstormy16 397 case bfd_arch_xstormy16: 398 disassemble = print_insn_xstormy16; 399 break; 400#endif 401#ifdef ARCH_xc16x 402 case bfd_arch_xc16x: 403 disassemble = print_insn_xc16x; 404 break; 405#endif 406#ifdef ARCH_xtensa 407 case bfd_arch_xtensa: 408 disassemble = print_insn_xtensa; 409 break; 410#endif 411#ifdef ARCH_z80 412 case bfd_arch_z80: 413 disassemble = print_insn_z80; 414 break; 415#endif 416#ifdef ARCH_z8k 417 case bfd_arch_z8k: 418 if (bfd_get_mach(abfd) == bfd_mach_z8001) 419 disassemble = print_insn_z8001; 420 else 421 disassemble = print_insn_z8002; 422 break; 423#endif 424#ifdef ARCH_vax 425 case bfd_arch_vax: 426 disassemble = print_insn_vax; 427 break; 428#endif 429#ifdef ARCH_frv 430 case bfd_arch_frv: 431 disassemble = print_insn_frv; 432 break; 433#endif 434#ifdef ARCH_iq2000 435 case bfd_arch_iq2000: 436 disassemble = print_insn_iq2000; 437 break; 438#endif 439#ifdef ARCH_m32c 440 case bfd_arch_m32c: 441 disassemble = print_insn_m32c; 442 break; 443#endif 444 default: 445 return 0; 446 } 447 return disassemble; 448} 449 450void 451disassembler_usage (stream) 452 FILE * stream ATTRIBUTE_UNUSED; 453{ 454#ifdef ARCH_arm 455 print_arm_disassembler_options (stream); 456#endif 457#ifdef ARCH_mips 458 print_mips_disassembler_options (stream); 459#endif 460#ifdef ARCH_powerpc 461 print_ppc_disassembler_options (stream); 462#endif 463#ifdef ARCH_i386 464 print_i386_disassembler_options (stream); 465#endif 466 467 return; 468} 469 470void 471disassemble_init_for_target (struct disassemble_info * info) 472{ 473 if (info == NULL) 474 return; 475 476 switch (info->arch) 477 { 478#ifdef ARCH_arm 479 case bfd_arch_arm: 480 info->symbol_is_valid = arm_symbol_is_valid; 481 info->disassembler_needs_relocs = TRUE; 482 break; 483#endif 484#ifdef ARCH_ia64 485 case bfd_arch_ia64: 486 info->skip_zeroes = 16; 487 break; 488#endif 489#ifdef ARCH_tic4x 490 case bfd_arch_tic4x: 491 info->skip_zeroes = 32; 492 break; 493#endif 494#ifdef ARCH_mep 495 case bfd_arch_mep: 496 info->skip_zeroes = 256; 497 info->skip_zeroes_at_end = 0; 498 break; 499#endif 500#ifdef ARCH_m32c 501 case bfd_arch_m32c: 502 info->endian = BFD_ENDIAN_BIG; 503 if (! info->insn_sets) 504 { 505 info->insn_sets = cgen_bitset_create (ISA_MAX); 506 if (info->mach == bfd_mach_m16c) 507 cgen_bitset_set (info->insn_sets, ISA_M16C); 508 else 509 cgen_bitset_set (info->insn_sets, ISA_M32C); 510 } 511 break; 512#endif 513 default: 514 break; 515 } 516} 517