1/*-
2 * Copyright (c) 2003-2012 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in
13 *    the documentation and/or other materials provided with the
14 *    distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: releng/10.3/sys/mips/nlm/board_cpld.c 255368 2013-09-07 18:26:16Z jchandra $");
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/endian.h>
34
35#include <mips/nlm/hal/mips-extns.h>
36#include <mips/nlm/hal/haldefs.h>
37#include <mips/nlm/hal/iomap.h>
38#include <mips/nlm/hal/gbu.h>
39
40#include <mips/nlm/board.h>
41
42#define CPLD_REVISION		0x0
43#define CPLD_RESET		0x1
44#define CPLD_CTRL		0x2
45#define CPLD_RSVD		0x3
46#define CPLD_PWR_CTRL		0x4
47#define CPLD_MISC		0x5
48#define CPLD_CTRL_STATUS	0x6
49#define CPLD_PWR_INTR_STATUS	0x7
50#define CPLD_DATA		0x8
51
52static __inline
53int nlm_cpld_read(uint64_t base, int reg)
54{
55	uint16_t val;
56
57	val = *(volatile uint16_t *)(long)(base + reg * 2);
58	return le16toh(val);
59}
60
61static __inline void
62nlm_cpld_write(uint64_t base, int reg, uint16_t data)
63{
64	data = htole16(data);
65	*(volatile uint16_t *)(long)(base + reg * 2) = data;
66}
67
68int
69nlm_board_cpld_majorversion(uint64_t base)
70{
71	return (nlm_cpld_read(base, CPLD_REVISION) >> 8);
72}
73
74int
75nlm_board_cpld_minorversion(uint64_t base)
76{
77	return (nlm_cpld_read(base, CPLD_REVISION) & 0xff);
78}
79
80uint64_t nlm_board_cpld_base(int node, int chipselect)
81{
82	uint64_t gbubase, cpld_phys;
83
84	gbubase = nlm_get_gbu_regbase(node);
85	cpld_phys = nlm_read_gbu_reg(gbubase, GBU_CS_BASEADDR(chipselect));
86	return (MIPS_PHYS_TO_KSEG1(cpld_phys << 8));
87}
88
89void
90nlm_board_cpld_reset(uint64_t base)
91{
92
93	nlm_cpld_write(base, CPLD_RESET, 1 << 15);
94	for(;;)
95		__asm __volatile("wait");
96}
97
98/* get daughter board type */
99int
100nlm_board_cpld_dboard_type(uint64_t base, int slot)
101{
102	uint16_t val;
103	int shift = 0;
104
105	switch (slot) {
106	case 0: shift = 0; break;
107	case 1: shift = 4; break;
108	case 2: shift = 2; break;
109	case 3: shift = 6; break;
110	}
111	val = nlm_cpld_read(base, CPLD_CTRL_STATUS) >> shift;
112	return (val & 0x3);
113}
114