1/*-
2 * Copyright (c) 2002-2010 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: releng/10.3/sys/ia64/include/mca.h 209671 2010-07-03 20:19:20Z marcel $
27 */
28
29#ifndef _MACHINE_MCA_H_
30#define _MACHINE_MCA_H_
31
32struct mca_record_header {
33	uint64_t	rh_seqnr;		/* Record id. */
34	uint8_t		rh_major;		/* BCD (=02). */
35	uint8_t		rh_minor;		/* BCD (=00). */
36	uint8_t		rh_error;		/* Error severity. */
37#define	MCA_RH_ERROR_RECOVERABLE	0
38#define	MCA_RH_ERROR_FATAL		1
39#define	MCA_RH_ERROR_CORRECTED		2
40	uint8_t		rh_flags;
41#define	MCA_RH_FLAGS_PLATFORM_ID	0x01	/* Platform_id present. */
42#define	MCA_RH_FLAGS_TIME_STAMP		0x02	/* Timestamp invalid. */
43	uint32_t	rh_length;		/* Size including header. */
44	uint8_t		rh_time[8];
45#define	MCA_RH_TIME_SEC		0
46#define	MCA_RH_TIME_MIN		1
47#define	MCA_RH_TIME_HOUR	2
48#define	MCA_RH_TIME_MDAY	4
49#define	MCA_RH_TIME_MON		5
50#define	MCA_RH_TIME_YEAR	6
51#define	MCA_RH_TIME_CENT	7
52	struct uuid	rh_platform;
53};
54
55struct mca_section_header {
56	struct uuid	sh_uuid;
57	uint8_t		sh_major;		/* BCD (=02). */
58	uint8_t		sh_minor;		/* BCD (=00). */
59	uint8_t		sh_flags;
60#define	MCA_SH_FLAGS_CORRECTED	0x01		/* Error has been corrected. */
61#define	MCA_SH_FLAGS_PROPAGATE	0x02		/* Possible propagation. */
62#define	MCA_SH_FLAGS_RESET	0x04		/* Reset device before use. */
63#define	MCA_SH_FLAGS_VALID	0x80		/* Flags are valid. */
64	uint8_t		__reserved;
65	uint32_t	sh_length;		/* Size including header. */
66};
67
68struct mca_cpu_record {
69	uint64_t	cpu_flags;
70#define	MCA_CPU_FLAGS_ERRMAP		(1ULL << 0)
71#define	MCA_CPU_FLAGS_STATE		(1ULL << 1)
72#define	MCA_CPU_FLAGS_CR_LID		(1ULL << 2)
73#define	MCA_CPU_FLAGS_PSI_STRUCT	(1ULL << 3)
74#define	MCA_CPU_FLAGS_CACHE(x)		(((x) >> 4) & 15)
75#define	MCA_CPU_FLAGS_TLB(x)		(((x) >> 8) & 15)
76#define	MCA_CPU_FLAGS_BUS(x)		(((x) >> 12) & 15)
77#define	MCA_CPU_FLAGS_REG(x)		(((x) >> 16) & 15)
78#define	MCA_CPU_FLAGS_MS(x)		(((x) >> 20) & 15)
79#define	MCA_CPU_FLAGS_CPUID		(1ULL << 24)
80	uint64_t	cpu_errmap;
81	uint64_t	cpu_state;
82	uint64_t	cpu_cr_lid;
83	/* Nx cpu_mod (cache). */
84	/* Nx cpu_mod (TLB). */
85	/* Nx cpu_mod (bus). */
86	/* Nx cpu_mod (reg). */
87	/* Nx cpu_mod (MS). */
88	/* cpu_cpuid. */
89	/* cpu_psi. */
90};
91
92struct mca_cpu_cpuid {
93	uint64_t	cpuid[6];
94};
95
96struct mca_cpu_mod {
97	uint64_t	cpu_mod_flags;
98#define	MCA_CPU_MOD_FLAGS_INFO	(1ULL << 0)
99#define	MCA_CPU_MOD_FLAGS_REQID	(1ULL << 1)
100#define	MCA_CPU_MOD_FLAGS_RSPID	(1ULL << 2)
101#define	MCA_CPU_MOD_FLAGS_TGTID	(1ULL << 3)
102#define	MCA_CPU_MOD_FLAGS_IP	(1ULL << 4)
103	uint64_t	cpu_mod_info;
104	uint64_t	cpu_mod_reqid;
105	uint64_t	cpu_mod_rspid;
106	uint64_t	cpu_mod_tgtid;
107	uint64_t	cpu_mod_ip;
108};
109
110struct mca_cpu_psi {
111	uint64_t	cpu_psi_flags;
112#define	MCA_CPU_PSI_FLAGS_STATE	(1ULL << 0)
113#define	MCA_CPU_PSI_FLAGS_BR	(1ULL << 1)
114#define	MCA_CPU_PSI_FLAGS_CR	(1ULL << 2)
115#define	MCA_CPU_PSI_FLAGS_AR	(1ULL << 3)
116#define	MCA_CPU_PSI_FLAGS_RR	(1ULL << 4)
117#define	MCA_CPU_PSI_FLAGS_FR	(1ULL << 5)
118	uint8_t		cpu_psi_state[1024];	/* XXX variable? */
119	uint64_t	cpu_psi_br[8];
120	uint64_t	cpu_psi_cr[128];	/* XXX variable? */
121	uint64_t	cpu_psi_ar[128];	/* XXX variable? */
122	uint64_t	cpu_psi_rr[8];
123	uint64_t	cpu_psi_fr[256];	/* 16 bytes per register! */
124};
125
126struct mca_mem_record {
127	uint64_t	mem_flags;
128#define	MCA_MEM_FLAGS_STATUS		(1ULL << 0)
129#define	MCA_MEM_FLAGS_ADDR		(1ULL << 1)
130#define	MCA_MEM_FLAGS_ADDRMASK		(1ULL << 2)
131#define	MCA_MEM_FLAGS_NODE		(1ULL << 3)
132#define	MCA_MEM_FLAGS_CARD		(1ULL << 4)
133#define	MCA_MEM_FLAGS_MODULE		(1ULL << 5)
134#define	MCA_MEM_FLAGS_BANK		(1ULL << 6)
135#define	MCA_MEM_FLAGS_DEVICE		(1ULL << 7)
136#define	MCA_MEM_FLAGS_ROW		(1ULL << 8)
137#define	MCA_MEM_FLAGS_COLUMN		(1ULL << 9)
138#define	MCA_MEM_FLAGS_BITPOS		(1ULL << 10)
139#define	MCA_MEM_FLAGS_REQID		(1ULL << 11)
140#define	MCA_MEM_FLAGS_RSPID		(1ULL << 12)
141#define	MCA_MEM_FLAGS_TGTID		(1ULL << 13)
142#define	MCA_MEM_FLAGS_BUSDATA		(1ULL << 14)
143#define	MCA_MEM_FLAGS_OEM_ID		(1ULL << 15)
144#define	MCA_MEM_FLAGS_OEM_DATA		(1ULL << 16)
145	uint64_t	mem_status;
146	uint64_t	mem_addr;
147	uint64_t	mem_addrmask;
148	uint16_t	mem_node;
149	uint16_t	mem_card;
150	uint16_t	mem_module;
151	uint16_t	mem_bank;
152	uint16_t	mem_device;
153	uint16_t	mem_row;
154	uint16_t	mem_column;
155	uint16_t	mem_bitpos;
156	uint64_t	mem_reqid;
157	uint64_t	mem_rspid;
158	uint64_t	mem_tgtid;
159	uint64_t	mem_busdata;
160	struct uuid	mem_oem_id;
161	uint16_t	mem_oem_length;		/* Size of OEM data. */
162	/* N bytes of OEM platform data. */
163};
164
165struct mca_pcibus_record {
166	uint64_t	pcibus_flags;
167#define	MCA_PCIBUS_FLAGS_STATUS		(1ULL << 0)
168#define	MCA_PCIBUS_FLAGS_ERROR		(1ULL << 1)
169#define	MCA_PCIBUS_FLAGS_BUS		(1ULL << 2)
170#define	MCA_PCIBUS_FLAGS_ADDR		(1ULL << 3)
171#define	MCA_PCIBUS_FLAGS_DATA		(1ULL << 4)
172#define	MCA_PCIBUS_FLAGS_CMD		(1ULL << 5)
173#define	MCA_PCIBUS_FLAGS_REQID		(1ULL << 6)
174#define	MCA_PCIBUS_FLAGS_RSPID		(1ULL << 7)
175#define	MCA_PCIBUS_FLAGS_TGTID		(1ULL << 8)
176#define	MCA_PCIBUS_FLAGS_OEM_ID		(1ULL << 9)
177#define	MCA_PCIBUS_FLAGS_OEM_DATA	(1ULL << 10)
178	uint64_t	pcibus_status;
179	uint16_t	pcibus_error;
180	uint16_t	pcibus_bus;
181	uint32_t	__reserved;
182	uint64_t	pcibus_addr;
183	uint64_t	pcibus_data;
184	uint64_t	pcibus_cmd;
185	uint64_t	pcibus_reqid;
186	uint64_t	pcibus_rspid;
187	uint64_t	pcibus_tgtid;
188	struct uuid	pcibus_oem_id;
189	uint16_t	pcibus_oem_length;	/* Size of OEM data. */
190	/* N bytes of OEM platform data. */
191};
192
193struct mca_pcidev_record {
194	uint64_t	pcidev_flags;
195#define	MCA_PCIDEV_FLAGS_STATUS		(1ULL << 0)
196#define	MCA_PCIDEV_FLAGS_INFO		(1ULL << 1)
197#define	MCA_PCIDEV_FLAGS_REG_MEM	(1ULL << 2)
198#define	MCA_PCIDEV_FLAGS_REG_IO		(1ULL << 3)
199#define	MCA_PCIDEV_FLAGS_REG_DATA	(1ULL << 4)
200#define	MCA_PCIDEV_FLAGS_OEM_DATA	(1ULL << 5)
201	uint64_t	pcidev_status;
202	struct {
203		uint16_t	info_vendor;
204		uint16_t	info_device;
205		uint32_t	info_ccfn;	/* Class code & funct. nr. */
206#define	MCA_PCIDEV_INFO_CLASS(x)	((x) & 0xffffff)
207#define	MCA_PCIDEV_INFO_FUNCTION(x)	(((x) >> 24) & 0xff)
208		uint8_t		info_slot;
209		uint8_t		info_bus;
210		uint8_t		info_segment;
211		uint8_t		__res0;
212		uint32_t	__res1;
213	} pcidev_info;
214	uint32_t	pcidev_reg_mem;
215	uint32_t	pcidev_reg_io;
216	/* Nx pcidev_reg. */
217	/* M bytes of OEM platform data. */
218};
219
220struct mca_pcidev_reg {
221	uint64_t	pcidev_reg_addr;
222	uint64_t	pcidev_reg_data;
223};
224
225#define	MCA_UUID_CPU		\
226	{0xe429faf1,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
227#define	MCA_UUID_MEMORY		\
228	{0xe429faf2,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
229#define	MCA_UUID_SEL		\
230	{0xe429faf3,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
231#define	MCA_UUID_PCI_BUS	\
232	{0xe429faf4,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
233#define	MCA_UUID_SMBIOS		\
234	{0xe429faf5,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
235#define	MCA_UUID_PCI_DEV	\
236	{0xe429faf6,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
237#define	MCA_UUID_GENERIC	\
238	{0xe429faf7,0x3cb7,0x11d4,0xbc,0xa7,{0x00,0x80,0xc7,0x3c,0x88,0x81}}
239
240#ifdef _KERNEL
241
242void ia64_mca_init(void);
243void ia64_mca_init_ap(void);
244void ia64_mca_save_state(int);
245
246#endif /* _KERNEL */
247
248#endif /* _MACHINE_MCA_H_ */
249