1/* 2 * Copyright (C) 2013 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include "imx6sl.dtsi" 14 15/ { 16 model = "Freescale i.MX6 SoloLite EVK Board"; 17 compatible = "fsl,imx6sl-evk", "fsl,imx6sl"; 18 19 memory { 20 reg = <0x80000000 0x40000000>; 21 }; 22 23 backlight { 24 compatible = "pwm-backlight"; 25 pwms = <&pwm1 0 5000000>; 26 brightness-levels = <0 4 8 16 32 64 128 255>; 27 default-brightness-level = <6>; 28 }; 29 30 leds { 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&pinctrl_led>; 34 35 user { 36 label = "debug"; 37 gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; 38 linux,default-trigger = "heartbeat"; 39 }; 40 }; 41 42 regulators { 43 compatible = "simple-bus"; 44 #address-cells = <1>; 45 #size-cells = <0>; 46 47 reg_usb_otg1_vbus: regulator@0 { 48 compatible = "regulator-fixed"; 49 reg = <0>; 50 regulator-name = "usb_otg1_vbus"; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 gpio = <&gpio4 0 0>; 54 enable-active-high; 55 }; 56 57 reg_usb_otg2_vbus: regulator@1 { 58 compatible = "regulator-fixed"; 59 reg = <1>; 60 regulator-name = "usb_otg2_vbus"; 61 regulator-min-microvolt = <5000000>; 62 regulator-max-microvolt = <5000000>; 63 gpio = <&gpio4 2 0>; 64 enable-active-high; 65 }; 66 67 reg_aud3v: regulator@2 { 68 compatible = "regulator-fixed"; 69 reg = <2>; 70 regulator-name = "wm8962-supply-3v15"; 71 regulator-min-microvolt = <3150000>; 72 regulator-max-microvolt = <3150000>; 73 regulator-boot-on; 74 }; 75 76 reg_aud4v: regulator@3 { 77 compatible = "regulator-fixed"; 78 reg = <3>; 79 regulator-name = "wm8962-supply-4v2"; 80 regulator-min-microvolt = <4325000>; 81 regulator-max-microvolt = <4325000>; 82 regulator-boot-on; 83 }; 84 85 reg_lcd_3v3: regulator@4 { 86 compatible = "regulator-fixed"; 87 reg = <4>; 88 regulator-name = "lcd-3v3"; 89 gpio = <&gpio4 3 0>; 90 enable-active-high; 91 }; 92 }; 93 94 sound { 95 compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962"; 96 model = "wm8962-audio"; 97 ssi-controller = <&ssi2>; 98 audio-codec = <&codec>; 99 audio-routing = 100 "Headphone Jack", "HPOUTL", 101 "Headphone Jack", "HPOUTR", 102 "Ext Spk", "SPKOUTL", 103 "Ext Spk", "SPKOUTR", 104 "AMIC", "MICBIAS", 105 "IN3R", "AMIC"; 106 mux-int-port = <2>; 107 mux-ext-port = <3>; 108 }; 109}; 110 111&audmux { 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pinctrl_audmux3>; 114 status = "okay"; 115}; 116 117&ecspi1 { 118 fsl,spi-num-chipselects = <1>; 119 cs-gpios = <&gpio4 11 0>; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&pinctrl_ecspi1>; 122 status = "okay"; 123 124 flash: m25p80@0 { 125 #address-cells = <1>; 126 #size-cells = <1>; 127 compatible = "st,m25p32"; 128 spi-max-frequency = <20000000>; 129 reg = <0>; 130 }; 131}; 132 133&fec { 134 pinctrl-names = "default", "sleep"; 135 pinctrl-0 = <&pinctrl_fec>; 136 pinctrl-1 = <&pinctrl_fec_sleep>; 137 phy-mode = "rmii"; 138 status = "okay"; 139}; 140 141&i2c1 { 142 clock-frequency = <100000>; 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_i2c1>; 145 status = "okay"; 146 147 pmic: pfuze100@08 { 148 compatible = "fsl,pfuze100"; 149 reg = <0x08>; 150 151 regulators { 152 sw1a_reg: sw1ab { 153 regulator-min-microvolt = <300000>; 154 regulator-max-microvolt = <1875000>; 155 regulator-boot-on; 156 regulator-always-on; 157 regulator-ramp-delay = <6250>; 158 }; 159 160 sw1c_reg: sw1c { 161 regulator-min-microvolt = <300000>; 162 regulator-max-microvolt = <1875000>; 163 regulator-boot-on; 164 regulator-always-on; 165 regulator-ramp-delay = <6250>; 166 }; 167 168 sw2_reg: sw2 { 169 regulator-min-microvolt = <800000>; 170 regulator-max-microvolt = <3300000>; 171 regulator-boot-on; 172 regulator-always-on; 173 }; 174 175 sw3a_reg: sw3a { 176 regulator-min-microvolt = <400000>; 177 regulator-max-microvolt = <1975000>; 178 regulator-boot-on; 179 regulator-always-on; 180 }; 181 182 sw3b_reg: sw3b { 183 regulator-min-microvolt = <400000>; 184 regulator-max-microvolt = <1975000>; 185 regulator-boot-on; 186 regulator-always-on; 187 }; 188 189 sw4_reg: sw4 { 190 regulator-min-microvolt = <800000>; 191 regulator-max-microvolt = <3300000>; 192 }; 193 194 swbst_reg: swbst { 195 regulator-min-microvolt = <5000000>; 196 regulator-max-microvolt = <5150000>; 197 }; 198 199 snvs_reg: vsnvs { 200 regulator-min-microvolt = <1000000>; 201 regulator-max-microvolt = <3000000>; 202 regulator-boot-on; 203 regulator-always-on; 204 }; 205 206 vref_reg: vrefddr { 207 regulator-boot-on; 208 regulator-always-on; 209 }; 210 211 vgen1_reg: vgen1 { 212 regulator-min-microvolt = <800000>; 213 regulator-max-microvolt = <1550000>; 214 regulator-always-on; 215 }; 216 217 vgen2_reg: vgen2 { 218 regulator-min-microvolt = <800000>; 219 regulator-max-microvolt = <1550000>; 220 }; 221 222 vgen3_reg: vgen3 { 223 regulator-min-microvolt = <1800000>; 224 regulator-max-microvolt = <3300000>; 225 }; 226 227 vgen4_reg: vgen4 { 228 regulator-min-microvolt = <1800000>; 229 regulator-max-microvolt = <3300000>; 230 regulator-always-on; 231 }; 232 233 vgen5_reg: vgen5 { 234 regulator-min-microvolt = <1800000>; 235 regulator-max-microvolt = <3300000>; 236 regulator-always-on; 237 }; 238 239 vgen6_reg: vgen6 { 240 regulator-min-microvolt = <1800000>; 241 regulator-max-microvolt = <3300000>; 242 regulator-always-on; 243 }; 244 }; 245 }; 246}; 247 248&i2c2 { 249 clock-frequency = <100000>; 250 pinctrl-names = "default"; 251 pinctrl-0 = <&pinctrl_i2c2>; 252 status = "okay"; 253 254 codec: wm8962@1a { 255 compatible = "wlf,wm8962"; 256 reg = <0x1a>; 257 clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>; 258 DCVDD-supply = <&vgen3_reg>; 259 DBVDD-supply = <®_aud3v>; 260 AVDD-supply = <&vgen3_reg>; 261 CPVDD-supply = <&vgen3_reg>; 262 MICVDD-supply = <®_aud3v>; 263 PLLVDD-supply = <&vgen3_reg>; 264 SPKVDD1-supply = <®_aud4v>; 265 SPKVDD2-supply = <®_aud4v>; 266 }; 267}; 268 269&iomuxc { 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_hog>; 272 273 imx6sl-evk { 274 pinctrl_hog: hoggrp { 275 fsl,pins = < 276 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059 277 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059 278 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 279 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 280 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 281 MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000 282 MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000 283 MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0 284 >; 285 }; 286 287 pinctrl_audmux3: audmux3grp { 288 fsl,pins = < 289 MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0 290 MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0 291 MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0 292 MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0 293 >; 294 }; 295 296 pinctrl_ecspi1: ecspi1grp { 297 fsl,pins = < 298 MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1 299 MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1 300 MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1 301 MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000 302 >; 303 }; 304 305 pinctrl_fec: fecgrp { 306 fsl,pins = < 307 MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 308 MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 309 MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0 310 MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0 311 MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0 312 MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0 313 MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0 314 MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0 315 MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8 316 >; 317 }; 318 319 pinctrl_fec_sleep: fecgrp-sleep { 320 fsl,pins = < 321 MX6SL_PAD_FEC_MDC__GPIO4_IO23 0x3080 322 MX6SL_PAD_FEC_CRS_DV__GPIO4_IO25 0x3080 323 MX6SL_PAD_FEC_RXD0__GPIO4_IO17 0x3080 324 MX6SL_PAD_FEC_RXD1__GPIO4_IO18 0x3080 325 MX6SL_PAD_FEC_TX_EN__GPIO4_IO22 0x3080 326 MX6SL_PAD_FEC_TXD0__GPIO4_IO24 0x3080 327 MX6SL_PAD_FEC_TXD1__GPIO4_IO16 0x3080 328 MX6SL_PAD_FEC_REF_CLK__GPIO4_IO26 0x3080 329 >; 330 }; 331 332 pinctrl_i2c1: i2c1grp { 333 fsl,pins = < 334 MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 335 MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 336 >; 337 }; 338 339 340 pinctrl_i2c2: i2c2grp { 341 fsl,pins = < 342 MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 343 MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1 344 >; 345 }; 346 347 pinctrl_kpp: kppgrp { 348 fsl,pins = < 349 MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010 350 MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010 351 MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0 352 MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0 353 MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0 354 MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0 355 >; 356 }; 357 358 pinctrl_lcd: lcdgrp { 359 fsl,pins = < 360 MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0 361 MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0 362 MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0 363 MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0 364 MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0 365 MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0 366 MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0 367 MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0 368 MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0 369 MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0 370 MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0 371 MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0 372 MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0 373 MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0 374 MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0 375 MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0 376 MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0 377 MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0 378 MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0 379 MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0 380 MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0 381 MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0 382 MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0 383 MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0 384 MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0 385 MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0 386 MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0 387 MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0 388 >; 389 }; 390 391 pinctrl_led: ledgrp { 392 fsl,pins = < 393 MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059 394 >; 395 }; 396 397 pinctrl_pwm1: pwmgrp { 398 fsl,pins = < 399 MX6SL_PAD_PWM1__PWM1_OUT 0x110b0 400 >; 401 }; 402 403 pinctrl_uart1: uart1grp { 404 fsl,pins = < 405 MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 406 MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 407 >; 408 }; 409 410 pinctrl_usbotg1: usbotg1grp { 411 fsl,pins = < 412 MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059 413 >; 414 }; 415 416 pinctrl_usdhc1: usdhc1grp { 417 fsl,pins = < 418 MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059 419 MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059 420 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059 421 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059 422 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059 423 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059 424 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059 425 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059 426 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059 427 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 428 >; 429 }; 430 431 pinctrl_usdhc1_100mhz: usdhc1grp100mhz { 432 fsl,pins = < 433 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9 434 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9 435 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9 436 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9 437 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9 438 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9 439 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9 440 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9 441 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9 442 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9 443 >; 444 }; 445 446 pinctrl_usdhc1_200mhz: usdhc1grp200mhz { 447 fsl,pins = < 448 MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9 449 MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9 450 MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 451 MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 452 MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 453 MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 454 MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9 455 MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9 456 MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9 457 MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9 458 >; 459 }; 460 461 pinctrl_usdhc2: usdhc2grp { 462 fsl,pins = < 463 MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 464 MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059 465 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 466 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 467 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 468 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 469 >; 470 }; 471 472 pinctrl_usdhc2_100mhz: usdhc2grp100mhz { 473 fsl,pins = < 474 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9 475 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9 476 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 477 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 478 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 479 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 480 >; 481 }; 482 483 pinctrl_usdhc2_200mhz: usdhc2grp200mhz { 484 fsl,pins = < 485 MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9 486 MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9 487 MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 488 MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 489 MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 490 MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 491 >; 492 }; 493 494 pinctrl_usdhc3: usdhc3grp { 495 fsl,pins = < 496 MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059 497 MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059 498 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059 499 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059 500 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059 501 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 502 >; 503 }; 504 505 pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 506 fsl,pins = < 507 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9 508 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9 509 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 510 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 511 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 512 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 513 >; 514 }; 515 516 pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 517 fsl,pins = < 518 MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9 519 MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9 520 MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 521 MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 522 MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 523 MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 524 >; 525 }; 526 }; 527}; 528 529&kpp { 530 pinctrl-names = "default"; 531 pinctrl-0 = <&pinctrl_kpp>; 532 linux,keymap = < 533 MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */ 534 MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */ 535 MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */ 536 MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */ 537 MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */ 538 MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */ 539 MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */ 540 MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */ 541 >; 542 status = "okay"; 543}; 544 545&lcdif { 546 pinctrl-names = "default"; 547 pinctrl-0 = <&pinctrl_lcd>; 548 lcd-supply = <®_lcd_3v3>; 549 display = <&display0>; 550 status = "okay"; 551 552 display0: display0 { 553 bits-per-pixel = <32>; 554 bus-width = <24>; 555 556 display-timings { 557 native-mode = <&timing0>; 558 timing0: timing0 { 559 clock-frequency = <33500000>; 560 hactive = <800>; 561 vactive = <480>; 562 hback-porch = <89>; 563 hfront-porch = <164>; 564 vback-porch = <23>; 565 vfront-porch = <10>; 566 hsync-len = <10>; 567 vsync-len = <10>; 568 hsync-active = <0>; 569 vsync-active = <0>; 570 de-active = <1>; 571 pixelclk-active = <0>; 572 }; 573 }; 574 }; 575}; 576 577&pwm1 { 578 pinctrl-names = "default"; 579 pinctrl-0 = <&pinctrl_pwm1>; 580 status = "okay"; 581}; 582 583&snvs_poweroff { 584 status = "okay"; 585}; 586 587&ssi2 { 588 status = "okay"; 589}; 590 591&uart1 { 592 pinctrl-names = "default"; 593 pinctrl-0 = <&pinctrl_uart1>; 594 status = "okay"; 595}; 596 597&usbotg1 { 598 vbus-supply = <®_usb_otg1_vbus>; 599 pinctrl-names = "default"; 600 pinctrl-0 = <&pinctrl_usbotg1>; 601 disable-over-current; 602 status = "okay"; 603}; 604 605&usbotg2 { 606 vbus-supply = <®_usb_otg2_vbus>; 607 dr_mode = "host"; 608 disable-over-current; 609 status = "okay"; 610}; 611 612&usdhc1 { 613 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 614 pinctrl-0 = <&pinctrl_usdhc1>; 615 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 616 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 617 bus-width = <8>; 618 cd-gpios = <&gpio4 7 0>; 619 wp-gpios = <&gpio4 6 0>; 620 status = "okay"; 621}; 622 623&usdhc2 { 624 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 625 pinctrl-0 = <&pinctrl_usdhc2>; 626 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 627 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 628 cd-gpios = <&gpio5 0 0>; 629 wp-gpios = <&gpio4 29 0>; 630 status = "okay"; 631}; 632 633&usdhc3 { 634 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 635 pinctrl-0 = <&pinctrl_usdhc3>; 636 pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 637 pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 638 cd-gpios = <&gpio3 22 0>; 639 status = "okay"; 640}; 641