1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 *  Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16	model = "Atmel AT91SAM9261 family SoC";
17	compatible = "atmel,at91sam9261";
18	interrupt-parent = <&aic>;
19
20	aliases {
21		serial0 = &dbgu;
22		serial1 = &usart0;
23		serial2 = &usart1;
24		serial3 = &usart2;
25		gpio0 = &pioA;
26		gpio1 = &pioB;
27		gpio2 = &pioC;
28		tcb0 = &tcb0;
29		i2c0 = &i2c0;
30		ssc0 = &ssc0;
31		ssc1 = &ssc1;
32		ssc2 = &ssc2;
33	};
34
35	cpus {
36		#address-cells = <0>;
37		#size-cells = <0>;
38
39		cpu {
40			compatible = "arm,arm926ej-s";
41			device_type = "cpu";
42		};
43	};
44
45	memory {
46		reg = <0x20000000 0x08000000>;
47	};
48
49	clocks {
50		main_xtal: main_xtal {
51			compatible = "fixed-clock";
52			#clock-cells = <0>;
53			clock-frequency = <0>;
54		};
55
56		slow_xtal: slow_xtal {
57			compatible = "fixed-clock";
58			#clock-cells = <0>;
59			clock-frequency = <0>;
60		};
61	};
62
63	sram: sram@00300000 {
64		compatible = "mmio-sram";
65		reg = <0x00300000 0x28000>;
66	};
67
68	ahb {
69		compatible = "simple-bus";
70		#address-cells = <1>;
71		#size-cells = <1>;
72		ranges;
73
74		usb0: ohci@00500000 {
75			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
76			reg = <0x00500000 0x100000>;
77			interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
78			clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
79			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
80			status = "disabled";
81		};
82
83		fb0: fb@0x00600000 {
84			compatible = "atmel,at91sam9261-lcdc";
85			reg = <0x00600000 0x1000>;
86			interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
87			pinctrl-names = "default";
88			pinctrl-0 = <&pinctrl_fb>;
89			clocks = <&lcd_clk>, <&hclk1>;
90			clock-names = "lcdc_clk", "hclk";
91			status = "disabled";
92		};
93
94		nand0: nand@40000000 {
95			compatible = "atmel,at91rm9200-nand";
96			#address-cells = <1>;
97			#size-cells = <1>;
98			reg = <0x40000000 0x10000000>;
99			atmel,nand-addr-offset = <22>;
100			atmel,nand-cmd-offset = <21>;
101			pinctrl-names = "default";
102			pinctrl-0 = <&pinctrl_nand>;
103
104			gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
105				<&pioC 14 GPIO_ACTIVE_HIGH>,
106				<0>;
107			status = "disabled";
108		};
109
110		apb {
111			compatible = "simple-bus";
112			#address-cells = <1>;
113			#size-cells = <1>;
114			ranges;
115
116			tcb0: timer@fffa0000 {
117				compatible = "atmel,at91rm9200-tcb";
118				reg = <0xfffa0000 0x100>;
119				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
120					     <18 IRQ_TYPE_LEVEL_HIGH 0>,
121					     <19 IRQ_TYPE_LEVEL_HIGH 0>;
122				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
123				clock-names = "t0_clk", "t1_clk", "t2_clk";
124			};
125
126			usb1: gadget@fffa4000 {
127				compatible = "atmel,at91rm9200-udc";
128				reg = <0xfffa4000 0x4000>;
129				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130				clocks = <&usb>, <&udc_clk>, <&udpck>;
131				clock-names = "usb_clk", "udc_clk", "udpck";
132				status = "disabled";
133			};
134
135			mmc0: mmc@fffa8000 {
136				compatible = "atmel,hsmci";
137				reg = <0xfffa8000 0x600>;
138				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
139				pinctrl-names = "default";
140				pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
141				#address-cells = <1>;
142				#size-cells = <0>;
143				clocks = <&mci0_clk>;
144				clock-names = "mci_clk";
145				status = "disabled";
146			};
147
148			i2c0: i2c@fffac000 {
149				compatible = "atmel,at91sam9261-i2c";
150				pinctrl-names = "default";
151				pinctrl-0 = <&pinctrl_i2c_twi>;
152				reg = <0xfffac000 0x100>;
153				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
154				#address-cells = <1>;
155				#size-cells = <0>;
156				clocks = <&twi0_clk>;
157				status = "disabled";
158			};
159
160			usart0: serial@fffb0000 {
161				compatible = "atmel,at91sam9260-usart";
162				reg = <0xfffb0000 0x200>;
163				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
164				atmel,use-dma-rx;
165				atmel,use-dma-tx;
166				pinctrl-names = "default";
167				pinctrl-0 = <&pinctrl_usart0>;
168				clocks = <&usart0_clk>;
169				clock-names = "usart";
170				status = "disabled";
171			};
172
173			usart1: serial@fffb4000 {
174				compatible = "atmel,at91sam9260-usart";
175				reg = <0xfffb4000 0x200>;
176				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
177				atmel,use-dma-rx;
178				atmel,use-dma-tx;
179				pinctrl-names = "default";
180				pinctrl-0 = <&pinctrl_usart1>;
181				clocks = <&usart1_clk>;
182				clock-names = "usart";
183				status = "disabled";
184			};
185
186			usart2: serial@fffb8000{
187				compatible = "atmel,at91sam9260-usart";
188				reg = <0xfffb8000 0x200>;
189				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
190				atmel,use-dma-rx;
191				atmel,use-dma-tx;
192				pinctrl-names = "default";
193				pinctrl-0 = <&pinctrl_usart2>;
194				clocks = <&usart2_clk>;
195				clock-names = "usart";
196				status = "disabled";
197			};
198
199			ssc0: ssc@fffbc000 {
200				compatible = "atmel,at91rm9200-ssc";
201				reg = <0xfffbc000 0x4000>;
202				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
203				pinctrl-names = "default";
204				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
205				clocks = <&ssc0_clk>;
206				clock-names = "pclk";
207				status = "disabled";
208			};
209
210			ssc1: ssc@fffc0000 {
211				compatible = "atmel,at91rm9200-ssc";
212				reg = <0xfffc0000 0x4000>;
213				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
214				pinctrl-names = "default";
215				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
216				clocks = <&ssc1_clk>;
217				clock-names = "pclk";
218				status = "disabled";
219			};
220
221			ssc2: ssc@fffc4000 {
222				compatible = "atmel,at91rm9200-ssc";
223				reg = <0xfffc4000 0x4000>;
224				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
225				pinctrl-names = "default";
226				pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
227				clocks = <&ssc2_clk>;
228				clock-names = "pclk";
229				status = "disabled";
230			};
231
232			spi0: spi@fffc8000 {
233				#address-cells = <1>;
234				#size-cells = <0>;
235				compatible = "atmel,at91rm9200-spi";
236				reg = <0xfffc8000 0x200>;
237				cs-gpios = <0>, <0>, <0>, <0>;
238				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
239				pinctrl-names = "default";
240				pinctrl-0 = <&pinctrl_spi0>;
241				clocks = <&spi0_clk>;
242				clock-names = "spi_clk";
243				status = "disabled";
244			};
245
246			spi1: spi@fffcc000 {
247				#address-cells = <1>;
248				#size-cells = <0>;
249				compatible = "atmel,at91rm9200-spi";
250				reg = <0xfffcc000 0x200>;
251				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
252				pinctrl-names = "default";
253				pinctrl-0 = <&pinctrl_spi1>;
254				clocks = <&spi1_clk>;
255				clock-names = "spi_clk";
256				status = "disabled";
257			};
258
259			ramc: ramc@ffffea00 {
260				compatible = "atmel,at91sam9260-sdramc";
261				reg = <0xffffea00 0x200>;
262			};
263
264			matrix: matrix@ffffee00 {
265				compatible = "atmel,at91sam9260-bus-matrix";
266				reg = <0xffffee00 0x200>;
267			};
268
269			aic: interrupt-controller@fffff000 {
270				#interrupt-cells = <3>;
271				compatible = "atmel,at91rm9200-aic";
272				interrupt-controller;
273				reg = <0xfffff000 0x200>;
274				atmel,external-irqs = <29 30 31>;
275			};
276
277			dbgu: serial@fffff200 {
278				compatible = "atmel,at91sam9260-usart";
279				reg = <0xfffff200 0x200>;
280				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
281				pinctrl-names = "default";
282				pinctrl-0 = <&pinctrl_dbgu>;
283				clocks = <&mck>;
284				clock-names = "usart";
285				status = "disabled";
286			};
287
288			pinctrl@fffff400 {
289				#address-cells = <1>;
290				#size-cells = <1>;
291				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
292				ranges = <0xfffff400 0xfffff400 0x600>;
293
294				atmel,mux-mask =
295				      /*    A         B     */
296				      <0xffffffff 0xfffffff7>,  /* pioA */
297				      <0xffffffff 0xfffffff4>,  /* pioB */
298				      <0xffffffff 0xffffff07>;  /* pioC */
299
300				/* shared pinctrl settings */
301				dbgu {
302					pinctrl_dbgu: dbgu-0 {
303						atmel,pins =
304							<AT91_PIOA 9  AT91_PERIPH_A AT91_PINCTRL_NONE>,
305							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
306					};
307				};
308
309				usart0 {
310					pinctrl_usart0: usart0-0 {
311						atmel,pins =
312							<AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
313							<AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
314					};
315
316					pinctrl_usart0_rts: usart0_rts-0 {
317						atmel,pins =
318							<AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
319					};
320
321					pinctrl_usart0_cts: usart0_cts-0 {
322						atmel,pins =
323							<AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
324					};
325				};
326
327				usart1 {
328					pinctrl_usart1: usart1-0 {
329						atmel,pins =
330							<AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
331							<AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
332					};
333
334					pinctrl_usart1_rts: usart1_rts-0 {
335						atmel,pins =
336							<AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
337					};
338
339					pinctrl_usart1_cts: usart1_cts-0 {
340						atmel,pins =
341							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
342					};
343				};
344
345				usart2 {
346					pinctrl_usart2: usart2-0 {
347						atmel,pins =
348							<AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
349							<AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
350					};
351
352					pinctrl_usart2_rts: usart2_rts-0 {
353						atmel,pins =
354							<AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
355					};
356
357					pinctrl_usart2_cts: usart2_cts-0 {
358						atmel,pins =
359							<AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
360					};
361				};
362
363				nand {
364					pinctrl_nand: nand-0 {
365						atmel,pins =
366							<AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
367							<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
368					};
369				};
370
371				mmc0 {
372					pinctrl_mmc0_clk: mmc0_clk-0 {
373						atmel,pins =
374							<AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
375					};
376
377					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
378						atmel,pins =
379							<AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
380							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
381					};
382
383					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
384						atmel,pins =
385							<AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
386							<AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
387							<AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
388					};
389					};
390
391				ssc0 {
392					pinctrl_ssc0_tx: ssc0_tx-0 {
393						atmel,pins =
394							<AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
395							<AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
396							<AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
397					};
398
399					pinctrl_ssc0_rx: ssc0_rx-0 {
400						atmel,pins =
401							<AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
402							<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403							<AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
404					};
405				};
406
407				ssc1 {
408					pinctrl_ssc1_tx: ssc1_tx-0 {
409						atmel,pins =
410							<AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
411							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
412							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413					};
414
415					pinctrl_ssc1_rx: ssc1_rx-0 {
416						atmel,pins =
417							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
418							<AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
419							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420					};
421				};
422
423				ssc2 {
424					pinctrl_ssc2_tx: ssc2_tx-0 {
425						atmel,pins =
426							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
427							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
428							<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429					};
430
431					pinctrl_ssc2_rx: ssc2_rx-0 {
432						atmel,pins =
433							<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
434							<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435							<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436					};
437				};
438
439				spi0 {
440					pinctrl_spi0: spi0-0 {
441						atmel,pins =
442							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
443							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
444							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
445					};
446					};
447
448				spi1 {
449					pinctrl_spi1: spi1-0 {
450						atmel,pins =
451							<AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
452							<AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453							<AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454					};
455				};
456
457				tcb0 {
458					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
459						atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
460					};
461
462					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
463						atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
464					};
465
466					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
467						atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468					};
469
470					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
471						atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472					};
473
474					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
475						atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476					};
477
478					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
479						atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480					};
481
482					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
483						atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484					};
485
486					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
487						atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488					};
489
490					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
491						atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492					};
493				};
494
495				i2c0 {
496					pinctrl_i2c_bitbang: i2c-0-bitbang {
497						atmel,pins =
498							<AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
499							<AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
500					};
501					pinctrl_i2c_twi: i2c-0-twi {
502						atmel,pins =
503							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
504							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
505					};
506				};
507
508				fb {
509					pinctrl_fb: fb-0 {
510						atmel,pins =
511							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
512							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
513							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
514							<AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
515							<AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
516							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
517							<AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518							<AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
519							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
520							<AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
521							<AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
522							<AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
523							<AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
524							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
525							<AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
526							<AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
527							<AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
528							<AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
529							<AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
530							<AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
531							<AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
532					};
533				};
534
535				pioA: gpio@fffff400 {
536					compatible = "atmel,at91rm9200-gpio";
537					reg = <0xfffff400 0x200>;
538					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
539					#gpio-cells = <2>;
540					gpio-controller;
541					interrupt-controller;
542					#interrupt-cells = <2>;
543					clocks = <&pioA_clk>;
544				};
545
546				pioB: gpio@fffff600 {
547					compatible = "atmel,at91rm9200-gpio";
548					reg = <0xfffff600 0x200>;
549					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
550					#gpio-cells = <2>;
551					gpio-controller;
552					interrupt-controller;
553					#interrupt-cells = <2>;
554					clocks = <&pioB_clk>;
555				};
556
557				pioC: gpio@fffff800 {
558					compatible = "atmel,at91rm9200-gpio";
559					reg = <0xfffff800 0x200>;
560					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
561					#gpio-cells = <2>;
562					gpio-controller;
563					interrupt-controller;
564					#interrupt-cells = <2>;
565					clocks = <&pioC_clk>;
566				};
567			};
568
569			pmc: pmc@fffffc00 {
570				compatible = "atmel,at91rm9200-pmc";
571				reg = <0xfffffc00 0x100>;
572				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
573				interrupt-controller;
574				#address-cells = <1>;
575				#size-cells = <0>;
576				#interrupt-cells = <1>;
577
578				main_osc: main_osc {
579					compatible = "atmel,at91rm9200-clk-main-osc";
580					#clock-cells = <0>;
581					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
582					clocks = <&main_xtal>;
583				};
584
585				main: mainck {
586					compatible = "atmel,at91rm9200-clk-main";
587					#clock-cells = <0>;
588					clocks = <&main_osc>;
589				};
590
591				plla: pllack {
592					compatible = "atmel,at91rm9200-clk-pll";
593					#clock-cells = <0>;
594					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
595					clocks = <&main>;
596					reg = <0>;
597					atmel,clk-input-range = <1000000 32000000>;
598					#atmel,pll-clk-output-range-cells = <4>;
599					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
600								<190000000 240000000 2 1>;
601				};
602
603				pllb: pllbck {
604					compatible = "atmel,at91rm9200-clk-pll";
605					#clock-cells = <0>;
606					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
607					clocks = <&main>;
608					reg = <1>;
609					atmel,clk-input-range = <1000000 5000000>;
610					#atmel,pll-clk-output-range-cells = <4>;
611					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
612				};
613
614				mck: masterck {
615					compatible = "atmel,at91rm9200-clk-master";
616					#clock-cells = <0>;
617					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
618					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
619					atmel,clk-output-range = <0 94000000>;
620					atmel,clk-divisors = <1 2 4 0>;
621				};
622
623				usb: usbck {
624					compatible = "atmel,at91rm9200-clk-usb";
625					#clock-cells = <0>;
626					atmel,clk-divisors = <1 2 4 0>;
627					clocks = <&pllb>;
628				};
629
630				prog: progck {
631					compatible = "atmel,at91rm9200-clk-programmable";
632					#address-cells = <1>;
633					#size-cells = <0>;
634					interrupt-parent = <&pmc>;
635					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
636
637					prog0: prog0 {
638						#clock-cells = <0>;
639						reg = <0>;
640						interrupts = <AT91_PMC_PCKRDY(0)>;
641					};
642
643					prog1: prog1 {
644						#clock-cells = <0>;
645						reg = <1>;
646						interrupts = <AT91_PMC_PCKRDY(1)>;
647					};
648
649					prog2: prog2 {
650						#clock-cells = <0>;
651						reg = <2>;
652						interrupts = <AT91_PMC_PCKRDY(2)>;
653					};
654
655					prog3: prog3 {
656						#clock-cells = <0>;
657						reg = <3>;
658						interrupts = <AT91_PMC_PCKRDY(3)>;
659					};
660				};
661
662				systemck {
663					compatible = "atmel,at91rm9200-clk-system";
664					#address-cells = <1>;
665					#size-cells = <0>;
666
667					uhpck: uhpck {
668						#clock-cells = <0>;
669						reg = <6>;
670						clocks = <&usb>;
671					};
672
673					udpck: udpck {
674						#clock-cells = <0>;
675						reg = <7>;
676						clocks = <&usb>;
677					};
678
679					pck0: pck0 {
680						#clock-cells = <0>;
681						reg = <8>;
682						clocks = <&prog0>;
683					};
684
685					pck1: pck1 {
686						#clock-cells = <0>;
687						reg = <9>;
688						clocks = <&prog1>;
689					};
690
691					pck2: pck2 {
692						#clock-cells = <0>;
693						reg = <10>;
694						clocks = <&prog2>;
695					};
696
697					pck3: pck3 {
698						#clock-cells = <0>;
699						reg = <11>;
700						clocks = <&prog3>;
701					};
702
703					hclk0: hclk0 {
704						#clock-cells = <0>;
705						reg = <16>;
706						clocks = <&mck>;
707					};
708
709					hclk1: hclk1 {
710						#clock-cells = <0>;
711						reg = <17>;
712						clocks = <&mck>;
713					};
714				};
715
716				periphck {
717					compatible = "atmel,at91rm9200-clk-peripheral";
718					#address-cells = <1>;
719					#size-cells = <0>;
720					clocks = <&mck>;
721
722					pioA_clk: pioA_clk {
723						#clock-cells = <0>;
724						reg = <2>;
725					};
726
727					pioB_clk: pioB_clk {
728						#clock-cells = <0>;
729						reg = <3>;
730					};
731
732					pioC_clk: pioC_clk {
733						#clock-cells = <0>;
734						reg = <4>;
735					};
736
737					usart0_clk: usart0_clk {
738						#clock-cells = <0>;
739						reg = <6>;
740					};
741
742					usart1_clk: usart1_clk {
743						#clock-cells = <0>;
744						reg = <7>;
745					};
746
747					usart2_clk: usart2_clk {
748						#clock-cells = <0>;
749						reg = <8>;
750					};
751
752					mci0_clk: mci0_clk {
753						#clock-cells = <0>;
754						reg = <9>;
755					};
756
757					udc_clk: udc_clk {
758						#clock-cells = <0>;
759						reg = <10>;
760					};
761
762					twi0_clk: twi0_clk {
763						reg = <11>;
764						#clock-cells = <0>;
765					};
766
767					spi0_clk: spi0_clk {
768						#clock-cells = <0>;
769						reg = <12>;
770					};
771
772					spi1_clk: spi1_clk {
773						#clock-cells = <0>;
774						reg = <13>;
775					};
776
777					ssc0_clk: ssc0_clk {
778						#clock-cells = <0>;
779						reg = <14>;
780					};
781
782					ssc1_clk: ssc1_clk {
783						#clock-cells = <0>;
784						reg = <15>;
785					};
786
787					ssc2_clk: ssc2_clk {
788						#clock-cells = <0>;
789						reg = <16>;
790					};
791
792					tc0_clk: tc0_clk {
793						#clock-cells = <0>;
794						reg = <17>;
795					};
796
797					tc1_clk: tc1_clk {
798						#clock-cells = <0>;
799						reg = <18>;
800					};
801
802					tc2_clk: tc2_clk {
803						#clock-cells = <0>;
804						reg = <19>;
805					};
806
807					ohci_clk: ohci_clk {
808						#clock-cells = <0>;
809						reg = <20>;
810					};
811
812					lcd_clk: lcd_clk {
813						#clock-cells = <0>;
814						reg = <21>;
815					};
816				};
817			};
818
819			rstc@fffffd00 {
820				compatible = "atmel,at91sam9260-rstc";
821				reg = <0xfffffd00 0x10>;
822			};
823
824			shdwc@fffffd10 {
825				compatible = "atmel,at91sam9260-shdwc";
826				reg = <0xfffffd10 0x10>;
827			};
828
829			pit: timer@fffffd30 {
830				compatible = "atmel,at91sam9260-pit";
831				reg = <0xfffffd30 0xf>;
832				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
833				clocks = <&mck>;
834			};
835
836			rtc@fffffd20 {
837				compatible = "atmel,at91sam9260-rtt";
838				reg = <0xfffffd20 0x10>;
839				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
840				clocks = <&slow_xtal>;
841				status = "disabled";
842			};
843
844			watchdog@fffffd40 {
845				compatible = "atmel,at91sam9260-wdt";
846				reg = <0xfffffd40 0x10>;
847				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
848				status = "disabled";
849			};
850
851			gpbr: syscon@fffffd50 {
852				compatible = "atmel,at91sam9260-gpbr", "syscon";
853				reg = <0xfffffd50 0x10>;
854				status = "disabled";
855			};
856		};
857	};
858
859	i2c@0 {
860		compatible = "i2c-gpio";
861		pinctrl-names = "default";
862		pinctrl-0 = <&pinctrl_i2c_bitbang>;
863		gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
864			<&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
865		i2c-gpio,sda-open-drain;
866		i2c-gpio,scl-open-drain;
867		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
868		#address-cells = <1>;
869		#size-cells = <0>;
870		status = "disabled";
871	};
872};
873