1/*- 2 * Copyright(c) 2002-2011 Exar Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification are permitted provided the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Exar Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31/*$FreeBSD: releng/10.3/sys/dev/vxge/vxge-osdep.h 228443 2011-12-12 18:43:24Z mdf $*/ 32 33/* LINTLIBRARY */ 34 35#ifndef _VXGE_OSDEP_H_ 36#define _VXGE_OSDEP_H_ 37 38#include <sys/param.h> 39#include <sys/systm.h> 40 41#if __FreeBSD_version >= 800000 42#include <sys/buf_ring.h> 43#endif 44 45#include <sys/mbuf.h> 46#include <sys/protosw.h> 47#include <sys/socket.h> 48#include <sys/malloc.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/bus.h> 52#include <sys/sockio.h> 53#include <sys/lock.h> 54#include <sys/mutex.h> 55#include <sys/rman.h> 56#include <sys/stddef.h> 57#include <sys/proc.h> 58#include <sys/endian.h> 59#include <sys/sysctl.h> 60#include <sys/pcpu.h> 61#include <sys/smp.h> 62 63#include <net/if.h> 64#include <net/if_arp.h> 65#include <net/bpf.h> 66#include <net/ethernet.h> 67#include <net/if_dl.h> 68#include <net/if_media.h> 69#include <net/if_types.h> 70#include <net/if_var.h> 71#include <net/if_vlan_var.h> 72 73#include <netinet/in_systm.h> 74#include <netinet/in.h> 75#include <netinet/if_ether.h> 76#include <netinet/ip.h> 77#include <netinet/ip6.h> 78#include <netinet/tcp.h> 79#include <netinet/tcp_lro.h> 80#include <netinet/udp.h> 81 82#include <machine/bus.h> 83#include <machine/resource.h> 84#include <machine/clock.h> 85#include <machine/stdarg.h> 86#include <machine/in_cksum.h> 87 88#include <vm/vm.h> 89#include <vm/pmap.h> 90 91#include <dev/pci/pcivar.h> 92#include <dev/pci/pcireg.h> 93#include <dev/pci/pci_private.h> 94 95#include <dev/vxge/include/vxge-defs.h> 96 97/* 98 * ------------------------- includes and defines ------------------------- 99 */ 100 101#if BYTE_ORDER == BIG_ENDIAN 102#define VXGE_OS_HOST_BIG_ENDIAN 103#else 104#define VXGE_OS_HOST_LITTLE_ENDIAN 105#endif 106 107#if __LONG_BIT == 64 108#define VXGE_OS_PLATFORM_64BIT 109#else 110#define VXGE_OS_PLATFORM_32BIT 111#endif 112 113#define VXGE_OS_PCI_CONFIG_SIZE 256 114#define VXGE_OS_HOST_PAGE_SIZE 4096 115#define VXGE_LL_IP_FAST_CSUM(hdr, len) 0 116 117#ifndef __DECONST 118#define __DECONST(type, var) ((type)(uintrptr_t)(const void *)(var)) 119#endif 120 121typedef struct ifnet *ifnet_t; 122typedef struct mbuf *mbuf_t; 123typedef struct mbuf *OS_NETSTACK_BUF; 124 125typedef struct _vxge_bus_res_t { 126 127 u_long bus_res_len; 128 bus_space_tag_t bus_space_tag; /* DMA Tag */ 129 bus_space_handle_t bus_space_handle; /* Bus handle */ 130 struct resource *bar_start_addr; /* BAR address */ 131 132} vxge_bus_res_t; 133 134typedef struct _vxge_dma_alloc_t { 135 136 bus_addr_t dma_paddr; /* Physical Address */ 137 caddr_t dma_vaddr; /* Virtual Address */ 138 bus_dma_tag_t dma_tag; /* DMA Tag */ 139 bus_dmamap_t dma_map; /* DMA Map */ 140 bus_dma_segment_t dma_segment; /* DMA Segment */ 141 bus_size_t dma_size; /* Size */ 142 int dma_nseg; /* scatter-gather */ 143 144} vxge_dma_alloc_t; 145 146typedef struct _vxge_pci_info { 147 148 device_t ndev; /* Device */ 149 void *reg_map[3]; /* BAR Resource */ 150 struct resource *bar_info[3]; /* BAR tag and handle */ 151 152} vxge_pci_info_t; 153 154/* 155 * ---------------------- fixed size primitive types ----------------------- 156 */ 157typedef size_t ptr_t; 158typedef int8_t s8; 159typedef uint8_t u8; 160typedef uint16_t u16; 161typedef int32_t s32; 162typedef uint32_t u32; 163typedef unsigned long long int u64; 164#ifndef __bool_true_false_are_defined 165typedef boolean_t bool; 166#endif 167typedef bus_addr_t dma_addr_t; 168typedef struct mtx spinlock_t; 169typedef struct resource *pci_irq_h; 170typedef vxge_pci_info_t *pci_dev_h; 171typedef vxge_pci_info_t *pci_cfg_h; 172typedef vxge_bus_res_t *pci_reg_h; 173typedef vxge_dma_alloc_t pci_dma_h; 174typedef vxge_dma_alloc_t pci_dma_acc_h; 175 176/* 177 * -------------------------- "libc" functionality ------------------------- 178 */ 179#define vxge_os_curr_time systime 180#define vxge_os_strcpy strcpy 181#define vxge_os_strlcpy strlcpy 182#define vxge_os_strlen strlen 183#define vxge_os_sprintf sprintf 184#define vxge_os_snprintf snprintf 185#define vxge_os_println(buf) printf("%s\n", buf) 186#define vxge_os_memzero bzero 187#define vxge_os_memcmp memcmp 188#define vxge_os_memcpy(dst, src, size) bcopy(src, dst, size) 189 190#define vxge_os_timestamp(buff) { \ 191 struct timeval cur_time; \ 192 gettimeofday(&cur_time, 0); \ 193 snprintf(buff, sizeof(buff), "%08li.%08li: ", \ 194 cur_time.tv_sec, cur_time.tv_usec); \ 195} 196 197#define vxge_os_printf(fmt...) { \ 198 printf(fmt); \ 199 printf("\n"); \ 200} 201 202#define vxge_os_vaprintf(fmt...) \ 203 vxge_os_printf(fmt); 204 205#define vxge_os_vasprintf(fmt...) { \ 206 vxge_os_printf(fmt); \ 207} 208 209#define vxge_trace(trace, fmt, args...) \ 210 vxge_debug_uld(VXGE_COMPONENT_ULD, \ 211 trace, hldev, vpid, fmt, ## args) 212 213/* 214 * -------------------- synchronization primitives ------------------------- 215 */ 216/* Initialize the spin lock */ 217#define vxge_os_spin_lock_init(lockp, ctxh) { \ 218 if (mtx_initialized(lockp) == 0) \ 219 mtx_init((lockp), "vxge", NULL, MTX_DEF); \ 220} 221 222/* Initialize the spin lock (IRQ version) */ 223#define vxge_os_spin_lock_init_irq(lockp, ctxh) { \ 224 if (mtx_initialized(lockp) == 0) \ 225 mtx_init((lockp), "vxge", NULL, MTX_DEF); \ 226} 227 228/* Destroy the lock */ 229#define vxge_os_spin_lock_destroy(lockp, ctxh) { \ 230 if (mtx_initialized(lockp) != 0) \ 231 mtx_destroy(lockp); \ 232} 233 234/* Destroy the lock (IRQ version) */ 235#define vxge_os_spin_lock_destroy_irq(lockp, ctxh) { \ 236 if (mtx_initialized(lockp) != 0) \ 237 mtx_destroy(lockp); \ 238} 239 240/* Acquire the lock */ 241#define vxge_os_spin_lock(lockp) { \ 242 if (mtx_owned(lockp) == 0) \ 243 mtx_lock(lockp); \ 244} 245 246/* Release the lock */ 247#define vxge_os_spin_unlock(lockp) mtx_unlock(lockp) 248 249/* Acquire the lock (IRQ version) */ 250#define vxge_os_spin_lock_irq(lockp, flags) { \ 251 flags = MTX_QUIET; \ 252 if (mtx_owned(lockp) == 0) \ 253 mtx_lock_flags(lockp, flags); \ 254} 255 256/* Release the lock (IRQ version) */ 257#define vxge_os_spin_unlock_irq(lockp, flags) { \ 258 flags = MTX_QUIET; \ 259 mtx_unlock_flags(lockp, flags); \ 260} 261 262/* Write memory barrier */ 263#if __FreeBSD_version < 800000 264#if defined(__i386__) || defined(__amd64__) 265#define mb() __asm volatile("mfence" ::: "memory") 266#define wmb() __asm volatile("sfence" ::: "memory") 267#define rmb() __asm volatile("lfence" ::: "memory") 268#else 269#define mb() 270#define rmb() 271#define wmb() 272#endif 273#endif 274 275#define vxge_os_wmb() wmb() 276#define vxge_os_udelay(x) DELAY(x) 277#define vxge_os_stall(x) DELAY(x) 278#define vxge_os_mdelay(x) DELAY(x * 1000) 279#define vxge_os_xchg (targetp, newval) 280 281/* 282 * ------------------------- misc primitives ------------------------------- 283 */ 284#define vxge_os_be32 u32 285#define vxge_os_unlikely(x) (x) 286#define vxge_os_prefetch(x) (x = x) 287#define vxge_os_prefetchw(x) (x = x) 288#define vxge_os_bug vxge_os_printf 289 290#define vxge_os_ntohs ntohs 291#define vxge_os_ntohl ntohl 292#define vxge_os_ntohll be64toh 293 294#define vxge_os_htons htons 295#define vxge_os_htonl htonl 296#define vxge_os_htonll htobe64 297 298#define vxge_os_in_multicast IN_MULTICAST 299#define VXGE_OS_INADDR_BROADCAST INADDR_BROADCAST 300/* 301 * -------------------------- compiler stuff ------------------------------ 302 */ 303#define __vxge_os_cacheline_size CACHE_LINE_SIZE 304#define __vxge_os_attr_cacheline_aligned __aligned(__vxge_os_cacheline_size) 305 306/* 307 * ---------------------- memory primitives -------------------------------- 308 */ 309#if defined(VXGE_OS_MEMORY_CHECK) 310 311typedef struct _vxge_os_malloc_t { 312 313 u_long line; 314 u_long size; 315 void *ptr; 316 const char *file; 317 318} vxge_os_malloc_t; 319 320#define VXGE_OS_MALLOC_CNT_MAX 64*1024 321 322extern u32 g_malloc_cnt; 323extern vxge_os_malloc_t g_malloc_arr[VXGE_OS_MALLOC_CNT_MAX]; 324 325#define VXGE_OS_MEMORY_CHECK_MALLOC(_vaddr, _size, _file, _line) { \ 326 if (_vaddr) { \ 327 u32 i; \ 328 for (i = 0; i < g_malloc_cnt; i++) { \ 329 if (g_malloc_arr[i].ptr == NULL) \ 330 break; \ 331 } \ 332 if (i == g_malloc_cnt) { \ 333 g_malloc_cnt++; \ 334 if (g_malloc_cnt >= VXGE_OS_MALLOC_CNT_MAX) { \ 335 vxge_os_bug("g_malloc_cnt exceed %d\n", \ 336 VXGE_OS_MALLOC_CNT_MAX); \ 337 } else { \ 338 g_malloc_arr[i].ptr = _vaddr; \ 339 g_malloc_arr[i].size = _size; \ 340 g_malloc_arr[i].file = _file; \ 341 g_malloc_arr[i].line = _line; \ 342 } \ 343 } \ 344 } \ 345} 346 347#define VXGE_OS_MEMORY_CHECK_FREE(_vaddr, _size, _file, _line) { \ 348 u32 i; \ 349 for (i = 0; i < VXGE_OS_MALLOC_CNT_MAX; i++) { \ 350 if (g_malloc_arr[i].ptr == _vaddr) { \ 351 g_malloc_arr[i].ptr = NULL; \ 352 if (_size && g_malloc_arr[i].size != _size) { \ 353 vxge_os_printf("freeing wrong size " \ 354 "%lu allocated %s:%lu:" \ 355 VXGE_OS_LLXFMT":%lu\n", \ 356 _size, \ 357 g_malloc_arr[i].file, \ 358 g_malloc_arr[i].line, \ 359 (u64)(u_long) g_malloc_arr[i].ptr, \ 360 g_malloc_arr[i].size); \ 361 } \ 362 break; \ 363 } \ 364 } \ 365} 366 367#else 368#define VXGE_OS_MEMORY_CHECK_MALLOC(prt, size, file, line) 369#define VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) 370#endif 371 372static inline void * 373vxge_mem_alloc_ex(u_long size, const char *file, int line) 374{ 375 void *vaddr = NULL; 376 vaddr = malloc(size, M_DEVBUF, M_ZERO | M_NOWAIT); 377 if (NULL != vaddr) { 378 VXGE_OS_MEMORY_CHECK_MALLOC((void *)vaddr, size, file, line) 379 vxge_os_memzero(vaddr, size); 380 } 381 382 return (vaddr); 383} 384 385static inline void 386vxge_mem_free_ex(const void *vaddr, u_long size, const char *file, int line) 387{ 388 if (NULL != vaddr) { 389 VXGE_OS_MEMORY_CHECK_FREE(vaddr, size, file, line) 390 free(__DECONST(void *, vaddr), M_DEVBUF); 391 } 392} 393 394#define vxge_os_malloc(pdev, size) \ 395 vxge_mem_alloc_ex(size, __FILE__, __LINE__) 396 397#define vxge_os_free(pdev, vaddr, size) \ 398 vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) 399 400#define vxge_mem_alloc(size) \ 401 vxge_mem_alloc_ex(size, __FILE__, __LINE__) 402 403#define vxge_mem_free(vaddr, size) \ 404 vxge_mem_free_ex(vaddr, size, __FILE__, __LINE__) 405 406#define vxge_free_packet(x) \ 407 if (NULL != x) { m_freem(x); x = NULL; } 408 409/* 410 * --------------------------- pci primitives ------------------------------ 411 */ 412#define vxge_os_pci_read8(pdev, cfgh, where, val) \ 413 (*(val) = pci_read_config(pdev->ndev, where, 1)) 414 415#define vxge_os_pci_write8(pdev, cfgh, where, val) \ 416 pci_write_config(pdev->ndev, where, val, 1) 417 418#define vxge_os_pci_read16(pdev, cfgh, where, val) \ 419 (*(val) = pci_read_config(pdev->ndev, where, 2)) 420 421#define vxge_os_pci_write16(pdev, cfgh, where, val) \ 422 pci_write_config(pdev->ndev, where, val, 2) 423 424#define vxge_os_pci_read32(pdev, cfgh, where, val) \ 425 (*(val) = pci_read_config(pdev->ndev, where, 4)) 426 427#define vxge_os_pci_write32(pdev, cfgh, where, val) \ 428 pci_write_config(pdev->ndev, where, val, 4) 429 430static inline u32 431vxge_os_pci_res_len(pci_dev_h pdev, pci_reg_h regh) 432{ 433 return (((vxge_bus_res_t *) regh)->bus_res_len); 434} 435 436static inline u8 437vxge_os_pio_mem_read8(pci_dev_h pdev, pci_reg_h regh, void *addr) 438{ 439 caddr_t vaddr = 440 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 441 442 return bus_space_read_1(((vxge_bus_res_t *) regh)->bus_space_tag, 443 ((vxge_bus_res_t *) regh)->bus_space_handle, 444 (bus_size_t) ((caddr_t) (addr) - vaddr)); 445} 446 447static inline u16 448vxge_os_pio_mem_read16(pci_dev_h pdev, pci_reg_h regh, void *addr) 449{ 450 caddr_t vaddr = 451 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 452 453 return bus_space_read_2(((vxge_bus_res_t *) regh)->bus_space_tag, 454 ((vxge_bus_res_t *) regh)->bus_space_handle, 455 (bus_size_t) ((caddr_t) (addr) - vaddr)); 456} 457 458static inline u32 459vxge_os_pio_mem_read32(pci_dev_h pdev, pci_reg_h regh, void *addr) 460{ 461 caddr_t vaddr = 462 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 463 464 return bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 465 ((vxge_bus_res_t *) regh)->bus_space_handle, 466 (bus_size_t) ((caddr_t) (addr) - vaddr)); 467} 468 469static inline u64 470vxge_os_pio_mem_read64(pci_dev_h pdev, pci_reg_h regh, void *addr) 471{ 472 u64 val, val_l, val_u; 473 474 caddr_t vaddr = 475 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 476 477 val_l = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 478 ((vxge_bus_res_t *) regh)->bus_space_handle, 479 (bus_size_t) (((caddr_t) addr) + 4 - vaddr)); 480 481 val_u = bus_space_read_4(((vxge_bus_res_t *) regh)->bus_space_tag, 482 ((vxge_bus_res_t *) regh)->bus_space_handle, 483 (bus_size_t) ((caddr_t) (addr) - vaddr)); 484 485 val = ((val_l << 32) | val_u); 486 return (val); 487} 488 489static inline void 490vxge_os_pio_mem_write8(pci_dev_h pdev, pci_reg_h regh, u8 val, void *addr) 491{ 492 caddr_t vaddr = 493 (caddr_t) (((vxge_bus_res_t *) regh)->bar_start_addr); 494 495 bus_space_write_1(((vxge_bus_res_t *) regh)->bus_space_tag, 496 ((vxge_bus_res_t *) regh)->bus_space_handle, 497 (bus_size_t) ((caddr_t) (addr) - vaddr), val); 498} 499 500static inline void 501vxge_os_pio_mem_write16(pci_dev_h pdev, pci_reg_h regh, u16 val, void *addr) 502{ 503 caddr_t vaddr = 504 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 505 506 bus_space_write_2(((vxge_bus_res_t *) regh)->bus_space_tag, 507 ((vxge_bus_res_t *) regh)->bus_space_handle, 508 (bus_size_t) ((caddr_t) (addr) - vaddr), val); 509} 510 511static inline void 512vxge_os_pio_mem_write32(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr) 513{ 514 caddr_t vaddr = 515 (caddr_t) (((vxge_bus_res_t *) (regh))->bar_start_addr); 516 517 bus_space_write_4(((vxge_bus_res_t *) regh)->bus_space_tag, 518 ((vxge_bus_res_t *) regh)->bus_space_handle, 519 (bus_size_t) ((caddr_t) (addr) - vaddr), val); 520} 521 522static inline void 523vxge_os_pio_mem_write64(pci_dev_h pdev, pci_reg_h regh, u64 val, void *addr) 524{ 525 u32 val_l = (u32) (val & 0xffffffff); 526 u32 val_u = (u32) (val >> 32); 527 528 vxge_os_pio_mem_write32(pdev, regh, val_l, addr); 529 vxge_os_pio_mem_write32(pdev, regh, val_u, (caddr_t) addr + 4); 530} 531 532#define vxge_os_flush_bridge vxge_os_pio_mem_read64 533 534/* 535 * --------------------------- dma primitives ----------------------------- 536 */ 537#define VXGE_OS_DMA_DIR_TODEVICE 0 538#define VXGE_OS_DMA_DIR_FROMDEVICE 1 539#define VXGE_OS_DMA_DIR_BIDIRECTIONAL 2 540#define VXGE_OS_INVALID_DMA_ADDR ((bus_addr_t)0) 541 542static void 543vxge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 544{ 545 if (error) 546 return; 547 548 *(bus_addr_t *) arg = segs->ds_addr; 549} 550 551static inline void * 552vxge_os_dma_malloc(pci_dev_h pdev, u_long bytes, int dma_flags, 553 pci_dma_h * p_dmah, pci_dma_acc_h * p_dma_acch) 554{ 555 int error = 0; 556 bus_addr_t bus_addr = BUS_SPACE_MAXADDR; 557 bus_size_t boundary, max_size, alignment = PAGE_SIZE; 558 559 if (bytes > PAGE_SIZE) { 560 boundary = 0; 561 max_size = bytes; 562 } else { 563 boundary = PAGE_SIZE; 564 max_size = PAGE_SIZE; 565 } 566 567 error = bus_dma_tag_create( 568 bus_get_dma_tag(pdev->ndev), /* Parent */ 569 alignment, /* Alignment */ 570 boundary, /* Bounds */ 571 bus_addr, /* Low Address */ 572 bus_addr, /* High Address */ 573 NULL, /* Filter Func */ 574 NULL, /* Filter Func Argument */ 575 bytes, /* Maximum Size */ 576 1, /* Number of Segments */ 577 max_size, /* Maximum Segment Size */ 578 BUS_DMA_ALLOCNOW, /* Flags */ 579 NULL, /* Lock Func */ 580 NULL, /* Lock Func Arguments */ 581 &(p_dmah->dma_tag)); /* DMA Tag */ 582 583 if (error != 0) { 584 device_printf(pdev->ndev, "bus_dma_tag_create failed\n"); 585 goto _exit0; 586 } 587 588 p_dmah->dma_size = bytes; 589 error = bus_dmamem_alloc(p_dmah->dma_tag, (void **)&p_dmah->dma_vaddr, 590 (BUS_DMA_NOWAIT | BUS_DMA_ZERO | BUS_DMA_COHERENT), 591 &p_dmah->dma_map); 592 if (error != 0) { 593 device_printf(pdev->ndev, "bus_dmamem_alloc failed\n"); 594 goto _exit1; 595 } 596 597 VXGE_OS_MEMORY_CHECK_MALLOC(p_dmah->dma_vaddr, p_dmah->dma_size, 598 __FILE__, __LINE__); 599 600 return (p_dmah->dma_vaddr); 601 602_exit1: 603 bus_dma_tag_destroy(p_dmah->dma_tag); 604_exit0: 605 return (NULL); 606} 607 608static inline void 609vxge_dma_free(pci_dev_h pdev, const void *vaddr, u_long size, 610 pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch, 611 const char *file, int line) 612{ 613 VXGE_OS_MEMORY_CHECK_FREE(p_dmah->dma_vaddr, size, file, line) 614 615 bus_dmamem_free(p_dmah->dma_tag, p_dmah->dma_vaddr, p_dmah->dma_map); 616 bus_dma_tag_destroy(p_dmah->dma_tag); 617 618 p_dmah->dma_map = NULL; 619 p_dmah->dma_tag = NULL; 620 p_dmah->dma_vaddr = NULL; 621} 622 623extern void 624vxge_hal_blockpool_block_add(void *, void *, u32, pci_dma_h *, pci_dma_acc_h *); 625 626static inline void 627vxge_os_dma_malloc_async(pci_dev_h pdev, void *devh, 628 u_long size, int dma_flags) 629{ 630 pci_dma_h dma_h; 631 pci_dma_acc_h acc_handle; 632 633 void *block_addr = NULL; 634 635 block_addr = vxge_os_dma_malloc(pdev, size, dma_flags, 636 &dma_h, &acc_handle); 637 638 vxge_hal_blockpool_block_add(devh, block_addr, size, 639 &dma_h, &acc_handle); 640} 641 642static inline void 643vxge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, 644 u64 dma_offset, size_t length, int dir) 645{ 646 bus_dmasync_op_t dmasync_op; 647 648 switch (dir) { 649 case VXGE_OS_DMA_DIR_TODEVICE: 650 dmasync_op = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTWRITE; 651 break; 652 653 case VXGE_OS_DMA_DIR_FROMDEVICE: 654 dmasync_op = BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD; 655 break; 656 657 default: 658 case VXGE_OS_DMA_DIR_BIDIRECTIONAL: 659 dmasync_op = BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE; 660 break; 661 } 662 663 bus_dmamap_sync(dmah.dma_tag, dmah.dma_map, dmasync_op); 664} 665 666static inline dma_addr_t 667vxge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, void *vaddr, u_long size, 668 int dir, int dma_flags) 669{ 670 int error; 671 672 error = bus_dmamap_load(dmah.dma_tag, dmah.dma_map, dmah.dma_vaddr, 673 dmah.dma_size, vxge_dmamap_cb, &(dmah.dma_paddr), BUS_DMA_NOWAIT); 674 675 if (error != 0) 676 return (VXGE_OS_INVALID_DMA_ADDR); 677 678 dmah.dma_size = size; 679 return (dmah.dma_paddr); 680} 681 682static inline void 683vxge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_paddr, 684 u32 size, int dir) 685{ 686 bus_dmamap_unload(dmah.dma_tag, dmah.dma_map); 687} 688 689#define vxge_os_dma_free(pdev, vaddr, size, dma_flags, p_dma_acch, p_dmah) \ 690 vxge_dma_free(pdev, vaddr, size, p_dma_acch, p_dmah, \ 691 __FILE__, __LINE__) 692 693static inline int 694vxge_os_is_my_packet(void *pdev, unsigned long addr) 695{ 696 return (0); 697} 698 699#endif /* _VXGE_OSDEP_H_ */ 700