pci.c revision 8263
1/************************************************************************** 2** 3** $Id: pci.c,v 1.21 1995/03/23 06:14:44 davidg Exp $ 4** 5** General subroutines for the PCI bus. 6** pci_configure () 7** 8** FreeBSD 9** 10**------------------------------------------------------------------------- 11** 12** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13** 14** Redistribution and use in source and binary forms, with or without 15** modification, are permitted provided that the following conditions 16** are met: 17** 1. Redistributions of source code must retain the above copyright 18** notice, this list of conditions and the following disclaimer. 19** 2. Redistributions in binary form must reproduce the above copyright 20** notice, this list of conditions and the following disclaimer in the 21** documentation and/or other materials provided with the distribution. 22** 3. The name of the author may not be used to endorse or promote products 23** derived from this software without specific prior written permission. 24** 25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35** 36*************************************************************************** 37*/ 38 39#define __PCI_C__ "pl13 95/03/21" 40 41#include <pci.h> 42#if NPCI > 0 43 44/*======================================================== 45** 46** #includes and declarations 47** 48**======================================================== 49*/ 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/malloc.h> 54#include <sys/errno.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 57#include <sys/devconf.h> 58 59#include <machine/cpu.h> /* bootverbose */ 60 61#include <vm/vm.h> 62#include <vm/vm_param.h> 63 64#include <machine/pmap.h> 65#include <sys/devconf.h> 66 67#include <pci/pcivar.h> 68#include <pci/pcireg.h> 69#include <pci/pcibus.h> 70 71#define PCI_MAX_IRQ (16) 72 73 74/*======================================================== 75** 76** Structs and Functions 77** 78**======================================================== 79*/ 80 81struct pci_devconf { 82 struct kern_devconf pdc_kdc; 83 struct pci_info pdc_pi; 84}; 85 86struct pcicb { 87 struct pcicb *pcicb_next; 88 struct pcicb *pcicb_up; 89 struct pcicb *pcicb_down; 90 pcici_t pcicb_bridge; 91 92 u_long pcicb_seen; 93 u_char pcicb_bus; 94 u_char pcicb_subordinate; 95 u_char pcicb_flags; 96#define PCICB_ISAMEM 0x01 97 u_int pcicb_mfrom; 98 u_int pcicb_mupto; 99 u_int pcicb_mamount; 100 u_short pcicb_pfrom; 101 u_short pcicb_pupto; 102 u_short pcicb_pamount; 103 u_char pcicb_bfrom; 104 u_char pcicb_bupto; 105 106 u_long pcicb_iobase; 107 u_long pcicb_iolimit; 108 u_long pcicb_membase; 109 u_long pcicb_memlimit; 110 u_long pcicb_p_membase; 111 u_long pcicb_p_memlimit; 112}; 113 114static int 115pci_externalize (struct proc *, struct kern_devconf *, void *, size_t); 116 117static int 118pci_internalize (struct proc *, struct kern_devconf *, void *, size_t); 119 120static void 121not_supported (pcici_t tag, u_long type); 122 123static void 124pci_bus_config (void); 125 126static void 127pci_bridge_config (void); 128 129/*======================================================== 130** 131** Variables 132** 133**======================================================== 134*/ 135 136/* 137** log2 of safe burst len (in words) 138*/ 139 140unsigned pci_max_burst_len = 2; 141unsigned pci_mechanism = 0; 142unsigned pci_maxdevice = 0; 143struct pcibus* pcibus; 144 145/*-------------------------------------------------------- 146** 147** Local variables. 148** 149**-------------------------------------------------------- 150*/ 151 152static int pci_conf_count; 153static int pci_info_done; 154static struct pcicb pcibus0 = { 155 NULL, NULL, NULL, 156 { 0 }, 157 0, 0, 0, 0, 158 0, 0, 0, 0, 0, 0, 0, 0, /* real allocation */ 159 0, 0xFFFF, /* iobase/limit */ 160 0x4000000, 0xFFFFFFFFu, /* nonprefetch membase/limit */ 161 0x4000000, 0xFFFFFFFFu /* prefetch membase/limit */ 162}; 163static struct pcicb *pcicb; 164 165/*======================================================== 166** 167** pci_configure () 168** 169** Autoconfiguration of pci devices. 170** 171** May be called more than once. 172** Any device is attached only once. 173** 174** Has to take care of mirrored devices, which are 175** entailed by incomplete decoding of pci address lines. 176** 177**======================================================== 178*/ 179 180void pci_configure() 181{ 182 int i; 183 184 /* 185 ** check pci bus present 186 */ 187 188 for (i=0; i<pcibus_set.ls_length; i++) { 189 if (pci_maxdevice) break; 190 pcibus = (struct pcibus*) pcibus_set.ls_items[i]; 191 pcibus->pb_setup (); 192 } 193 if (!pci_maxdevice) return; 194 195 /* 196 ** hello world .. 197 */ 198 199 for (pcicb = &pcibus0; pcicb != NULL;) { 200 pci_bus_config (); 201 202 if (pcicb->pcicb_down) { 203 pcicb = pcicb->pcicb_down; 204 continue; 205 }; 206 207 while (pcicb && !pcicb->pcicb_next) 208 pcicb = pcicb->pcicb_up; 209 210 if (pcicb) 211 pcicb = pcicb->pcicb_next; 212 } 213 pci_conf_count++; 214} 215 216/*======================================================== 217** 218** Subroutines for configuration. 219** 220**======================================================== 221*/ 222 223static void 224pci_register_io (struct pcicb * cb, u_int base, u_int limit) 225{ 226#ifdef PCI_BRIDGE_DEBUG 227 printf ("register_io: bus=%d base=%x limit=%x\n", 228 cb->pcicb_bus, base, limit); 229#endif 230 231 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 232 cb->pcicb_pfrom = base; 233 if (limit > cb->pcicb_pupto) 234 cb->pcicb_pupto = limit; 235 236 /* 237 ** XXX should set bridge io mapping here 238 ** but it can be mapped in 4k blocks only, 239 ** leading to conflicts with isa/eisa .. 240 */ 241} 242 243static void 244pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 245{ 246#ifdef PCI_BRIDGE_DEBUG 247 printf ("register_mem: bus=%d base=%x limit=%x\n", 248 cb->pcicb_bus, base, limit); 249#endif 250 251 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 252 cb->pcicb_mfrom = base; 253 if (limit > cb->pcicb_mupto) 254 cb->pcicb_mupto = limit; 255 /* 256 ** set the bridges mapping 257 ** 258 ** XXX should handle the 1Mb granularity. 259 */ 260 if (cb->pcicb_bridge.tag) { 261 pci_conf_write(cb->pcicb_bridge, 262 PCI_PCI_BRIDGE_MEM_REG, 263 (cb->pcicb_memlimit & 0xffff0000) | 264 (cb->pcicb_membase >> 16)); 265 printf ("\t[pci%d uses memory from %x to %x]\n", 266 cb->pcicb_bus, 267 (unsigned) cb->pcicb_membase, 268 (unsigned) cb->pcicb_memlimit); 269 } 270} 271 272/* 273** XXX This function is neither complete nor tested. 274** It's only used if the bios hasn't done it's job 275** of mapping the pci devices in the physical memory. 276*/ 277 278static u_int 279pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 280{ 281 u_int result = 0, limit=0, newbase=0; 282#ifdef PCI_BRIDGE_DEBUG 283 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 284 cb->pcicb_bus, addr, size); 285#endif 286 287 if (!cb) goto done; 288 289 if (!cb->pcicb_membase) { 290 printf ("memalloc: bus%d: membase not set.\n", 291 cb->pcicb_bus); 292 goto done; 293 } 294 295 /* 296 ** get upper allocation limit 297 */ 298 limit = cb->pcicb_memlimit; 299 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 300 limit = cb->pcicb_mfrom-1; 301 302 /* 303 ** address fixed, and impossible to allocate ? 304 */ 305 if (addr && addr+size-1 > limit) 306 goto done; 307 308 /* 309 ** get possible address 310 */ 311 312 result = addr; 313 if (!result) result = ((limit + 1) / size - 1) * size; 314 315 /* 316 ** if not local available, request from parent. 317 */ 318 319 if (result < cb->pcicb_membase) { 320 newbase = pci_memalloc (cb->pcicb_up, result, size); 321 if (newbase) cb->pcicb_membase = result; 322 else result=0; 323 } 324done: 325 if (result) 326 pci_register_memory (cb, result, result+size-1); 327 328#ifdef PCI_BRIDGE_DEBUG 329 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 330 cb->pcicb_bus, addr, size, result, limit); 331#endif 332 333 return (result); 334} 335 336/*======================================================== 337** 338** pci_bus_config() 339** 340** Autoconfiguration of one pci bus. 341** 342**======================================================== 343*/ 344 345static void 346pci_bus_config (void) 347{ 348 u_char device; 349 u_char reg; 350 pcici_t tag, mtag; 351 pcidi_t type; 352 u_long data; 353 int unit; 354 int pciint; 355 int irq; 356 char* name=0; 357 358 int dvi; 359 struct pci_device *dvp=0; 360 361 struct pci_devconf *pdcp; 362 363 /* 364 ** first initialize the bridge (bus controller chip) 365 */ 366 pci_bridge_config (); 367 368#ifndef PCI_QUIET 369 printf ("Probing for devices on the %s%d bus:\n", 370 pcibus->pb_name, pcicb->pcicb_bus); 371 if (!pci_info_done) { 372 pci_info_done=1; 373 printf ("\tconfiguration mode %d allows %d devices.\n", 374 pci_mechanism, pci_maxdevice); 375 }; 376#endif 377 for (device=0; device<pci_maxdevice; device ++) { 378 379 if ((pcicb->pcicb_seen >> device) & 1) 380 continue; 381 382 tag = pcibus->pb_tag (pcicb->pcicb_bus, device, 0); 383 type = pcibus->pb_read (tag, PCI_ID_REG); 384 385 if ((!type) || (type==0xfffffffful)) continue; 386 387 /* 388 ** lookup device in ioconfiguration: 389 */ 390 391 for (dvi=0; dvi<pcidevice_set.ls_length; dvi++) { 392 dvp = (struct pci_device*) pcidevice_set.ls_items[dvi]; 393 if ((name=(*dvp->pd_probe)(tag, type))) 394 break; 395 dvp = NULL; 396 }; 397 398 /* 399 ** check for mirrored devices. 400 */ 401 if (device & 0x10) { 402 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 403 (u_char)(device & ~0x10), 0); 404 } else if (device & 0x08) { 405 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 406 (u_char)(device & ~0x08), 0); 407 } else goto real_device; 408 409 if (type!=pcibus->pb_read (mtag, PCI_ID_REG)) 410 goto real_device; 411 412 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 413 if (pcibus->pb_read(tag,reg)!=pcibus->pb_read(mtag,reg)) 414 goto real_device; 415 416#ifndef PCI_QUIET 417 if (dvp==NULL) continue; 418 printf ("%s? <%s> mirrored on pci%d:%d\n", 419 dvp->pd_name, name, pcicb->pcicb_bus, device); 420#endif 421 continue; 422 423 real_device: 424 425 if (dvp==NULL) { 426#ifndef PCI_QUIET 427 if (pci_conf_count) 428 continue; 429 printf("%s%d:%d: ", pcibus->pb_name, 430 pcicb->pcicb_bus, device); 431 not_supported (tag, type); 432#endif 433 continue; 434 }; 435 436 pcicb->pcicb_seen |= (1ul << device); 437 /* 438 ** Get and increment the unit. 439 */ 440 441 unit = (*dvp->pd_count)++; 442 443 /* 444 ** ignore device ? 445 */ 446 447 if (!*name) continue; 448 449 /* 450 ** Announce this device 451 */ 452 453 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 454 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 455 456 /* 457 ** Get the int pin number (pci interrupt number a-d) 458 ** from the pci configuration space. 459 */ 460 461 data = pcibus->pb_read (tag, PCI_INTERRUPT_REG); 462 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 463 464 if (pciint) { 465 466 printf (" int %c irq ", 0x60+pciint); 467 468 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 469 470 /* 471 ** If it's zero, the isa irq number is unknown, 472 ** and we cannot bind the pci interrupt. 473 */ 474 475 if (irq) 476 printf ("%d", irq); 477 else 478 printf ("??"); 479 }; 480 481 printf (" on pci%d:%d\n", pcicb->pcicb_bus, device); 482 483 /* 484 ** Read the current mapping, 485 ** and update the pcicb fields. 486 */ 487 488 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 489 u_int map, addr, size; 490 491 data = pci_conf_read(tag, PCI_CLASS_REG); 492 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 493 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 494 continue; 495 }; 496 497 map = pcibus->pb_read (tag, reg); 498 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 499 continue; 500 501 pcibus->pb_write (tag, reg, 0xffffffff); 502 data = pcibus->pb_read (tag, reg); 503 pcibus->pb_write (tag, reg, map); 504 505 switch (data & 7) { 506 507 default: 508 continue; 509 case 1: 510 case 5: 511 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 512 addr = map & PCI_MAP_IO_ADDRESS_MASK; 513 514 pci_register_io (pcicb, addr, addr+size-1); 515 pcicb->pcicb_pamount += size; 516 break; 517 518 case 0: 519 case 2: 520 case 4: 521 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 522 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 523 if (addr >= 0x100000) { 524 pci_register_memory 525 (pcicb, addr, addr+size-1); 526 pcicb->pcicb_mamount += size; 527 } else { 528 pcicb->pcicb_flags |= PCICB_ISAMEM; 529 }; 530 break; 531 }; 532 if (!bootverbose) 533 continue; 534 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 535 reg, map&7, addr, size); 536 }; 537 538 /* 539 ** Allocate a devconf structure 540 ** We should, and eventually will, set the 541 ** parent pointer to a pci bus devconf structure, 542 ** and arrange to set the state field dynamically. 543 */ 544 545 pdcp = (struct pci_devconf *) 546 malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK); 547 bzero(pdcp, sizeof(struct pci_devconf)); 548 549 pdcp -> pdc_pi.pi_bus = pcicb->pcicb_bus; 550 pdcp -> pdc_pi.pi_device = device; 551 552 pdcp -> pdc_kdc.kdc_name = dvp->pd_name; 553 pdcp -> pdc_kdc.kdc_unit = unit; 554 555 pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI; 556 557 pdcp -> pdc_kdc.kdc_externalize = pci_externalize; 558 pdcp -> pdc_kdc.kdc_internalize = pci_internalize; 559 560 pdcp -> pdc_kdc.kdc_datalen = PCI_EXTERNAL_LEN; 561 pdcp -> pdc_kdc.kdc_parentdata = &pdcp->pdc_pi; 562 pdcp -> pdc_kdc.kdc_state = DC_UNKNOWN; 563 pdcp -> pdc_kdc.kdc_description = name; 564 pdcp -> pdc_kdc.kdc_shutdown = dvp->pd_shutdown; 565 566 /* 567 ** And register this device 568 */ 569 570 dev_attach (&pdcp->pdc_kdc); 571 572 /* 573 ** attach device 574 ** may produce additional log messages, 575 ** i.e. when installing subdevices. 576 */ 577 578 (*dvp->pd_attach) (tag, unit); 579 580 /* 581 ** Special processing of certain classes 582 */ 583 584 data = pci_conf_read(tag, PCI_CLASS_REG); 585 586 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 587 struct pcicb *this, **link; 588 unsigned char primary, secondary, subordinate; 589 u_int command; 590 591 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 592 593 /* 594 ** get current configuration of the bridge. 595 */ 596 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 597 primary = PCI_PRIMARY_BUS_EXTRACT (data); 598 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 599 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 600#ifndef PCI_QUIET 601 printf ("\tbridge from pci%d to pci%d through %d.\n", 602 primary, secondary, subordinate); 603#endif 604 /* 605 ** check for uninitialized bridge. 606 */ 607 if (secondary == 0 || secondary < primary || 608 pcicb->pcicb_bus != primary) 609 { 610 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 611 /* 612 ** disable this bridge 613 */ 614 pcibus->pb_write (tag, PCI_COMMAND_STATUS_REG, 615 0xffff0000); 616 secondary = 0; 617 subordinate = 0; 618 }; 619 620 /* 621 ** allocate bus descriptor for bus behind the bridge 622 */ 623 link = &pcicb->pcicb_down; 624 while (*link) link = &(*link)->pcicb_next; 625 626 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 627 628 /* 629 ** Initialize this descriptor so far. 630 ** (the initialization is completed just before 631 ** scanning the bus behind the bridge. 632 */ 633 bzero (this, sizeof(*this)); 634 this->pcicb_up = pcicb; 635 this->pcicb_bridge = tag; 636 this->pcicb_bus = secondary; 637 this->pcicb_subordinate = subordinate; 638 639 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 640 641 if (command & PCI_COMMAND_IO_ENABLE){ 642 /* 643 ** Bridge was configured by the bios. 644 ** Read out the mapped io region. 645 */ 646 u_int reg, data, mask; 647 648 reg = pci_conf_read (tag, 649 PCI_PCI_BRIDGE_IO_REG); 650 pci_conf_write(tag, 651 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 652 data = pci_conf_read (tag, 653 PCI_PCI_BRIDGE_IO_REG); 654 pci_conf_write(tag, 655 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 656 657 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 658 659 this->pcicb_iobase = 660 PCI_PPB_IOBASE_EXTRACT (reg); 661 this->pcicb_iolimit = 662 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 663 664 /* 665 ** Note the used io space. 666 */ 667 pci_register_io (pcicb, this->pcicb_iobase, 668 this->pcicb_iolimit); 669 670 }; 671 672 if (command & PCI_COMMAND_MEM_ENABLE) { 673 /* 674 ** Bridge was configured by the bios. 675 ** Read out the mapped memory regions. 676 */ 677 u_int reg, data, mask; 678 679 /* 680 ** non prefetchable memory 681 */ 682 reg = pci_conf_read (tag, 683 PCI_PCI_BRIDGE_MEM_REG); 684 pci_conf_write(tag, 685 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 686 data = pci_conf_read (tag, 687 PCI_PCI_BRIDGE_MEM_REG); 688 pci_conf_write(tag, 689 PCI_PCI_BRIDGE_MEM_REG, reg); 690 mask = (0xFFFF0000 ^ (data & 0xFFFF0000)) 691 | 0xFFFF; 692 693 this->pcicb_membase = 694 PCI_PPB_MEMBASE_EXTRACT (reg); 695 this->pcicb_memlimit = 696 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 697 698 /* 699 ** Register used memory space. 700 */ 701 pci_register_memory (pcicb, 702 this->pcicb_membase, 703 this->pcicb_memlimit); 704 705 /* 706 ** prefetchable memory 707 */ 708 reg = pci_conf_read (tag, 709 PCI_PCI_BRIDGE_PMEM_REG); 710 pci_conf_write(tag, 711 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 712 data = pci_conf_read (tag, 713 PCI_PCI_BRIDGE_PMEM_REG); 714 pci_conf_write(tag, 715 PCI_PCI_BRIDGE_PMEM_REG, reg); 716 717 mask = (0xFFFF0000 ^ (data & 0xFFFF0000)) 718 | 0xFFFF; 719 this->pcicb_p_membase= 720 PCI_PPB_MEMBASE_EXTRACT (reg); 721 this->pcicb_p_memlimit= 722 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 723 724 /* 725 ** Register used memory space. 726 */ 727 pci_register_memory (pcicb, 728 this->pcicb_p_membase, 729 this->pcicb_p_memlimit); 730 } 731 732 /* 733 ** Link it in chain. 734 */ 735 *link=this; 736 737 /* 738 ** Update mapping info of parent bus. 739 */ 740 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 741 pcicb->pcicb_bfrom = secondary; 742 if (subordinate > pcicb->pcicb_bupto) 743 pcicb->pcicb_bupto = subordinate; 744 745 break; 746 } 747 } 748 749#ifndef PCI_QUIET 750 if (pcicb->pcicb_mamount) 751 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 752 pcibus->pb_name, pcicb->pcicb_bus, 753 pcicb->pcicb_mamount, 754 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 755 if (pcicb->pcicb_pamount) 756 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 757 pcibus->pb_name, pcicb->pcicb_bus, 758 pcicb->pcicb_pamount, 759 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 760 if (pcicb->pcicb_bfrom) 761 printf ("%s%d: subordinate busses from %x upto %x.\n", 762 pcibus->pb_name, pcicb->pcicb_bus, 763 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 764#endif 765} 766 767/*======================================================== 768** 769** pci_bridge_config() 770** 771** Configuration of a pci bridge. 772** 773**======================================================== 774*/ 775 776static void 777pci_bridge_config (void) 778{ 779 pcici_t tag; 780 struct pcicb* parent; 781 782 tag = pcicb->pcicb_bridge; 783 if (!tag.tag) return; 784 785 if (!pcicb->pcicb_bus) { 786 u_int data; 787 /* 788 ** Get the lowest available bus number. 789 */ 790 pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate; 791 792 /* 793 ** and configure the bridge 794 */ 795 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 796 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 797 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 798 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 799 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 800 801 /* 802 ** Propagate the new upper bus number limit. 803 */ 804 for (parent = pcicb->pcicb_up; parent != NULL; 805 parent = parent->pcicb_up) 806 { 807 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 808 continue; 809 parent->pcicb_subordinate = pcicb->pcicb_bus; 810 if (!parent->pcicb_bridge.tag) 811 continue; 812 data = pci_conf_read 813 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 814 data = PCI_SUBORDINATE_BUS_INSERT 815 (data, pcicb->pcicb_bus); 816 pci_conf_write (parent->pcicb_bridge, 817 PCI_PCI_BRIDGE_BUS_REG, data); 818 } 819 } 820 821 if (!pcicb->pcicb_membase) { 822 u_int size = 0x100000; 823 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 824 if (pcicb->pcicb_membase) 825 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 826 } 827} 828/*----------------------------------------------------------------- 829** 830** The following functions are provided for the device driver 831** to read/write the configuration space. 832** 833** pci_conf_read(): 834** Read a long word from the pci configuration space. 835** Requires a tag (from pcitag) and the register 836** number (should be a long word alligned one). 837** 838** pci_conf_write(): 839** Writes a long word to the pci configuration space. 840** Requires a tag (from pcitag), the register number 841** (should be a long word alligned one), and a value. 842** 843**----------------------------------------------------------------- 844*/ 845 846u_long 847pci_conf_read (pcici_t tag, u_long reg) 848{ 849 return (pcibus->pb_read (tag, reg)); 850} 851 852void 853pci_conf_write (pcici_t tag, u_long reg, u_long data) 854{ 855 pcibus->pb_write (tag, reg, data); 856} 857 858/*----------------------------------------------------------------------- 859** 860** Map device into port space. 861** 862** Actually the device should have been mapped by the bios. 863** This function only reads and verifies the value. 864** 865** PCI-Specification: 6.2.5.1: address maps 866** 867**----------------------------------------------------------------------- 868*/ 869 870int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 871{ 872 unsigned data, ioaddr, iosize; 873 struct pcicb *link = pcicb; 874 875 /* 876 ** sanity check 877 */ 878 879 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 880 printf ("pci_map_port failed: bad register=0x%x\n", 881 (unsigned)reg); 882 return (0); 883 }; 884 885 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 886 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 887 pcicb->pcicb_bus); 888 return (0); 889 }*/ 890 891 /* 892 ** get size and type of port 893 ** 894 ** type is in the lowest two bits. 895 ** If device requires 2^n bytes, the next 896 ** n-2 bits are hardwired as 0. 897 */ 898 899 ioaddr = pcibus->pb_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 900 if (!ioaddr || ioaddr > 0xfffful) { 901 printf ("pci_map_port failed: not configured by bios.\n"); 902 return (0); 903 }; 904 905 pcibus->pb_write (tag, reg, 0xfffffffful); 906 data = pcibus->pb_read (tag, reg); 907 pcibus->pb_write (tag, reg, ioaddr); 908 909 if ((data & 0x03) != PCI_MAP_IO) { 910 printf ("pci_map_port failed: bad port type=0x%x\n", 911 (unsigned) data); 912 return (0); 913 }; 914 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 915 if (ioaddr < pcicb->pcicb_iobase 916 || ioaddr + iosize > pcicb->pcicb_iolimit) { 917 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 918 "is incompatible with its bridge's range 0x%x-0x%x\n", 919 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 920 (unsigned) pcicb->pcicb_iobase, 921 (unsigned) pcicb->pcicb_iolimit); 922 return (0); 923 } 924 925#ifndef PCI_QUIET 926 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 927 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 928#endif 929 /* 930 ** set the configuration register of and 931 ** return the address to the driver. 932 ** Make sure to enable each upstream bridge 933 ** so I/O and DMA can go all the way. 934 */ 935 936 for (;;) { 937 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 938 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 939 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 940 if ((link = link->pcicb_up) == NULL) 941 break; 942 tag = link->pcicb_bridge; 943 } 944 945 *pa = ioaddr; 946 947 return (1); 948} 949 950/*----------------------------------------------------------------------- 951** 952** Map device into virtual and physical space 953** 954** Actually the device should have been mapped by the bios. 955** This function only reads and verifies the value. 956** 957** PCI-Specification: 6.2.5.1: address maps 958** 959**----------------------------------------------------------------------- 960*/ 961 962int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 963{ 964 struct pcicb *link = pcicb; 965 unsigned data ,paddr; 966 vm_size_t psize, poffs; 967 vm_offset_t vaddr; 968 969 /* 970 ** sanity check 971 */ 972 973 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 974 printf ("pci_map_mem failed: bad register=0x%x\n", 975 (unsigned)reg); 976 return (0); 977 }; 978 979 /* 980 ** save old mapping, get size and type of memory 981 ** 982 ** type is in the lowest four bits. 983 ** If device requires 2^n bytes, the next 984 ** n-4 bits are read as 0. 985 */ 986 987 paddr = pcibus->pb_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 988 pcibus->pb_write (tag, reg, 0xfffffffful); 989 data = pcibus->pb_read (tag, reg); 990 pcibus->pb_write (tag, reg, paddr); 991 992 /* 993 ** check the type 994 */ 995 996 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 997 printf ("pci_map_mem failed: bad memory type=0x%x\n", 998 (unsigned) data); 999 return (0); 1000 }; 1001 1002 /* 1003 ** get the size. 1004 */ 1005 1006 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1007 1008 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1009 paddr = pci_memalloc (pcicb, 0, psize); 1010 if (!paddr) { 1011 printf ("pci_map_mem: not configured by bios.\n"); 1012 return (0); 1013 }; 1014 pci_register_memory (pcicb, paddr, paddr+psize-1); 1015 }; 1016 1017 if (paddr < pcicb->pcicb_membase || 1018 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1019 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1020 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1021 (unsigned) paddr, 1022 (unsigned) (paddr + psize - 1), 1023 (unsigned) pcicb->pcicb_membase, 1024 (unsigned) pcicb->pcicb_memlimit); 1025 return (0); 1026 } 1027 pcibus->pb_write (tag, reg, paddr); 1028 1029 /* 1030 ** Truncate paddr to page boundary. 1031 ** (Or does pmap_mapdev the job?) 1032 */ 1033 1034 poffs = paddr - trunc_page (paddr); 1035 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1036 1037 if (!vaddr) return (0); 1038 1039 vaddr += poffs; 1040 1041#ifndef PCI_QUIET 1042 /* 1043 ** display values. 1044 */ 1045 1046 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1047 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1048#endif 1049 /* 1050 ** set the configuration register and 1051 ** return the address to the driver 1052 ** Make sure to enable each upstream bridge 1053 ** so memory and DMA can go all the way. 1054 */ 1055 1056 for (;;) { 1057 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1058 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1059 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 1060 if ((link = link->pcicb_up) == NULL) 1061 break; 1062 tag = link->pcicb_bridge; 1063 } 1064 1065 *va = vaddr; 1066 *pa = paddr; 1067 1068 return (1); 1069} 1070 1071/*------------------------------------------------------------ 1072** 1073** Interface functions for the devconf module. 1074** 1075**------------------------------------------------------------ 1076*/ 1077 1078static int 1079pci_externalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t l) 1080{ 1081 struct pci_externalize_buffer buffer; 1082 struct pci_info * pip = kdcp->kdc_parentdata; 1083 pcici_t tag; 1084 int i; 1085 1086 if (l < sizeof buffer) { 1087 return ENOMEM; 1088 }; 1089 1090 tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, 0); 1091 1092 buffer.peb_pci_info = *pip; 1093 1094 for (i=0; i<PCI_EXT_CONF_LEN; i++) { 1095 buffer.peb_config[i] = pcibus->pb_read (tag, i*4); 1096 }; 1097 1098 return copyout(&buffer, u, sizeof buffer); 1099} 1100 1101 1102static int 1103pci_internalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t s) 1104{ 1105 return EOPNOTSUPP; 1106} 1107 1108/*----------------------------------------------------------------------- 1109** 1110** Pci meta interrupt handler 1111** 1112** This handler assumes level triggered interrupts. 1113** It's possible to build a kernel which handles shared 1114** edge triggered interrupts by the options "PCI_EDGE_INT". 1115** But there is a performance penalty. 1116** 1117** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1118** code at all :-) :-) :-) 1119** 1120**----------------------------------------------------------------------- 1121*/ 1122 1123struct pci_int_desc* 1124 pci_int_desc [PCI_MAX_IRQ]; 1125 1126#ifndef NO_SHARED_IRQ 1127 1128static inline unsigned 1129splq (unsigned mask) 1130{ 1131 unsigned temp=cpl; 1132 cpl |= mask; 1133 return temp; 1134} 1135 1136static void 1137pci_int (int irq) 1138{ 1139 struct pci_int_desc * p; 1140 int c, s; 1141#ifdef PCI_EDGE_INT 1142 int i, n; 1143#endif 1144 if (irq<0 || irq >= PCI_MAX_IRQ) { 1145 printf ("pci_int(%d)\n", irq); 1146 return; 1147 }; 1148 1149#ifdef PCI_EDGE_INT 1150 for (i=0; i<1000; i++) { 1151 n = 0; 1152#endif 1153 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1154 s = splq (*p->pcid_maskptr); 1155 c= (*p->pcid_handler) (p->pcid_argument); 1156 p-> pcid_tally += c; 1157 splx (s); 1158#ifdef PCI_EDGE_INT 1159 n += c; 1160#endif 1161#if 0 1162 if (c && p->pcid_tally<20) 1163 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1164 irq, p->pcid_handler, s, cpl, c); 1165#endif 1166 }; 1167#ifdef PCI_EDGE_INT 1168 if (!n) return; 1169 }; 1170 printf ("pci_int(%d): permanent interrupt request.\n", irq); 1171#endif 1172} 1173#endif 1174 1175/*----------------------------------------------------------------------- 1176** 1177** Auxiliary function for interrupt (un)mapping. 1178** 1179**----------------------------------------------------------------------- 1180*/ 1181 1182static u_int 1183getirq (pcici_t tag) 1184{ 1185 u_int irq; 1186 1187 irq = PCI_INTERRUPT_LINE_EXTRACT( 1188 pcibus->pb_read (tag, PCI_INTERRUPT_REG)); 1189 1190 if (irq <= 0) { 1191 printf ("\tint line register not set by bios\n"); 1192 return (0); 1193 } 1194 1195 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1196 printf ("\tirq %d invalid.\n", irq); 1197 return (0); 1198 } 1199 1200 return (irq); 1201} 1202 1203static struct pci_int_desc ** 1204getintdescbytag (u_int irq, pcici_t tag) 1205{ 1206 struct pci_int_desc *p, **pp; 1207 1208 pp=&pci_int_desc[irq]; 1209 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1210 pp=&p->pcid_next; 1211 1212 if (!p) return (NULL); 1213 1214 return (pp); 1215} 1216 1217static struct pci_int_desc * 1218getintdescbymptr (u_int irq, unsigned * mptr) 1219{ 1220 struct pci_int_desc *p; 1221 1222 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1223 if (p->pcid_maskptr == mptr) break; 1224 return (p); 1225} 1226 1227/*----------------------------------------------------------------------- 1228** 1229** Map pci interrupt. 1230** 1231**----------------------------------------------------------------------- 1232*/ 1233 1234static unsigned pci_mask0 = 0; 1235 1236int pci_map_int (pcici_t tag, int(*func)(), void* arg, unsigned* maskptr) 1237{ 1238 u_int irq; 1239 int result, oldspl; 1240 unsigned mask; 1241 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1242 1243 /* 1244 ** Get irq line from configuration space, 1245 ** and check for consistency. 1246 */ 1247 1248 irq = getirq (tag); 1249 if (irq >= PCI_MAX_IRQ) { 1250 printf ("\tillegal irq %d.\n", irq); 1251 return (0); 1252 }; 1253 mask= 1ul << irq; 1254 1255 /* 1256 ** disable this interrupt. 1257 */ 1258 1259 oldspl = splq (mask); 1260 1261 /* 1262 ** If handler for this tag already installed, 1263 ** remove it first. 1264 */ 1265 1266 if (getintdescbytag (irq, tag) != NULL) 1267 pci_unmap_int (tag); 1268 1269 /* 1270 ** If this irq not yet included in the mask, include it. 1271 */ 1272 1273 mdp = getintdescbymptr (irq, maskptr); 1274 if (!mdp) { 1275 result = pcibus->pb_imaskinc (irq, maskptr); 1276 if (result) 1277 goto conflict; 1278 }; 1279 1280 /* 1281 ** Allocate descriptor and initialize it. 1282 */ 1283 1284 tail = pci_int_desc[irq]; 1285 1286 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1287 bzero (new, sizeof (*new)); 1288 1289 new->pcid_next = tail; 1290 new->pcid_tag = tag; 1291 new->pcid_handler = func; 1292 new->pcid_argument = arg; 1293 new->pcid_maskptr = maskptr; 1294 new->pcid_tally = 0; 1295 new->pcid_mask = mask; 1296 1297 /* 1298 ** If first handler: install it. 1299 ** If second handler: install shared-int-handler. 1300 */ 1301 1302 if (!tail) { 1303 /* 1304 ** first handler for this irq. 1305 */ 1306 1307 result = pcibus->pb_iattach 1308 (irq, (void(*)()) func, (int) arg, maskptr); 1309 if (result) goto conflict; 1310 1311#ifdef NO_SHARED_IRQ 1312 } else goto conflict; 1313#else 1314 } else if (!tail->pcid_next) { 1315 /* 1316 ** Second handler for this irq. 1317 */ 1318 1319 printf ("\tusing shared irq %d.\n", irq); 1320 1321 /* 1322 ** replace old handler by shared-int-handler. 1323 */ 1324 1325 result = pcibus->pb_idetach (irq,(void(*)())tail->pcid_handler); 1326 if (result) 1327 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1328 1329 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1330 if (result) { 1331 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1332 goto fail; 1333 }; 1334 } 1335#endif 1336 /* 1337 ** Link new descriptor, reenable ints and done. 1338 */ 1339 1340 pci_int_desc[irq] = new; 1341 splx (oldspl); 1342 return (1); 1343 1344 /* 1345 ** Handle some problems. 1346 */ 1347 1348conflict: 1349 printf ("\tirq %d already in use.\n", irq); 1350fail: 1351 /* 1352 ** If descriptor allocated, free it. 1353 ** If included in mask, remove it. 1354 */ 1355 1356 if (free) free (new, M_DEVBUF); 1357 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1358 splx (oldspl); 1359 return (0); 1360} 1361 1362/*----------------------------------------------------------------------- 1363** 1364** Unmap pci interrupt. 1365** 1366**----------------------------------------------------------------------- 1367*/ 1368 1369int pci_unmap_int (pcici_t tag) 1370{ 1371 int result, oldspl; 1372 struct pci_int_desc *this, **hook, *tail; 1373 unsigned irq; 1374 1375 /* 1376 ** Get irq line from configuration space, 1377 ** and check for consistency. 1378 */ 1379 1380 irq = getirq (tag); 1381 if (irq >= PCI_MAX_IRQ) { 1382 printf ("\tillegal irq %d.\n", irq); 1383 return (0); 1384 }; 1385 1386 /* 1387 ** Search and unlink interrupt descriptor. 1388 */ 1389 1390 hook = getintdescbytag (irq, tag); 1391 if (hook == NULL) { 1392 printf ("\tno irq %d handler for pci %x\n", 1393 irq, tag.tag); 1394 return (0); 1395 }; 1396 1397 this = *hook; 1398 *hook= this->pcid_next; 1399 1400 /* 1401 ** Message 1402 */ 1403 1404 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1405 irq, this->pcid_handler, this->pcid_argument, 1406 this->pcid_tag.tag, this->pcid_tally); 1407 1408 /* 1409 ** If this irq no longer included in the mask, remove it. 1410 */ 1411 1412 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1413 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1414 1415 tail = pci_int_desc[irq]; 1416 1417 if (tail == NULL) { 1418 1419 /* 1420 ** Remove the old handler. 1421 */ 1422 1423 result = pcibus->pb_idetach (irq,(void(*)())this->pcid_handler); 1424 if (result) 1425 printf ("\tirq %d: cannot remove handler.\n", irq); 1426 1427 } else if (tail->pcid_next == NULL) { 1428 1429 /* 1430 ** Remove the shared int handler. 1431 ** Install the last remaining handler. 1432 */ 1433 1434 oldspl = splq (1ul << irq); 1435 1436 result = pcibus->pb_idetach (irq, pci_int); 1437 if (result) 1438 printf ("\tirq %d: cannot remove handler.\n", irq); 1439 1440 result = pcibus->pb_iattach (irq, 1441 (void(*)()) tail->pcid_handler, 1442 (int) tail->pcid_argument, 1443 tail->pcid_maskptr); 1444 1445 if (result) 1446 printf ("\tirq %d: cannot install handler.\n", irq); 1447 1448 splx (oldspl); 1449 }; 1450 1451 free (this, M_DEVBUF); 1452 return (1); 1453} 1454 1455/*----------------------------------------------------------- 1456** 1457** Display of unknown devices. 1458** 1459**----------------------------------------------------------- 1460*/ 1461struct vt { 1462 u_short ident; 1463 char* name; 1464}; 1465 1466static struct vt VendorTable[] = { 1467 {0x1002, "ATI TECHNOLOGIES INC"}, 1468 {0x1011, "DIGITAL EQUIPMENT CORPORATION"}, 1469 {0x101A, "NCR"}, 1470 {0x102B, "MATROX"}, 1471 {0x1045, "OPTI"}, 1472 {0x5333, "S3 INC."}, 1473 {0x8086, "INTEL CORPORATION"}, 1474 {0,0} 1475}; 1476 1477static const char *const majclasses[] = { 1478 "old", "storage", "network", "display", 1479 "multimedia", "memory", "bridge" 1480}; 1481 1482void not_supported (pcici_t tag, u_long type) 1483{ 1484 u_char reg; 1485 u_long data; 1486 struct vt * vp; 1487 1488 /* 1489 ** lookup the names. 1490 */ 1491 1492 for (vp=VendorTable; vp->ident; vp++) 1493 if (vp->ident == (type & 0xffff)) 1494 break; 1495 1496 /* 1497 ** and display them. 1498 */ 1499 1500 if (vp->ident) printf (vp->name); 1501 else printf ("vendor=0x%lx", type & 0xffff); 1502 1503 printf (", device=0x%lx", type >> 16); 1504 1505 data = (pcibus->pb_read(tag, PCI_CLASS_REG) >> 24) & 0xff; 1506 if (data < sizeof(majclasses) / sizeof(majclasses[0])) 1507 printf(", class=%s", majclasses[data]); 1508 1509 printf (" [not supported]\n"); 1510 1511 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1512 data = pcibus->pb_read (tag, reg); 1513 if ((data&~7)==0) continue; 1514 switch (data&7) { 1515 1516 case 1: 1517 case 5: 1518 printf (" map(%x): io(%lx)\n", 1519 reg, data & ~3); 1520 break; 1521 case 0: 1522 printf (" map(%x): mem32(%lx)\n", 1523 reg, data & ~7); 1524 break; 1525 case 2: 1526 printf (" map(%x): mem20(%lx)\n", 1527 reg, data & ~7); 1528 break; 1529 case 4: 1530 printf (" map(%x): mem64(%lx)\n", 1531 reg, data & ~7); 1532 break; 1533 } 1534 } 1535} 1536#endif /* NPCI */ 1537