pci.c revision 7265
1/************************************************************************** 2** 3** $Id: pci.c,v 1.20 1995/03/21 23:01:01 se Exp $ 4** 5** General subroutines for the PCI bus. 6** pci_configure () 7** 8** FreeBSD 9** 10**------------------------------------------------------------------------- 11** 12** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 13** 14** Redistribution and use in source and binary forms, with or without 15** modification, are permitted provided that the following conditions 16** are met: 17** 1. Redistributions of source code must retain the above copyright 18** notice, this list of conditions and the following disclaimer. 19** 2. Redistributions in binary form must reproduce the above copyright 20** notice, this list of conditions and the following disclaimer in the 21** documentation and/or other materials provided with the distribution. 22** 3. The name of the author may not be used to endorse or promote products 23** derived from this software without specific prior written permission. 24** 25** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 27** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 29** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35** 36*************************************************************************** 37*/ 38 39#define __PCI_C__ "pl13 95/03/21" 40 41#include <pci.h> 42#if NPCI > 0 43 44/*======================================================== 45** 46** #includes and declarations 47** 48**======================================================== 49*/ 50 51#include <sys/param.h> 52#include <sys/systm.h> 53#include <sys/malloc.h> 54#include <sys/errno.h> 55#include <sys/kernel.h> 56#include <sys/proc.h> /* declaration of wakeup(), used by vm.h */ 57#include <sys/devconf.h> 58 59#include <machine/cpu.h> /* bootverbose */ 60 61#include <vm/vm.h> 62#include <vm/vm_param.h> 63 64#include <machine/pmap.h> 65#include <sys/devconf.h> 66 67#include <pci/pcivar.h> 68#include <pci/pcireg.h> 69#include <pci/pcibus.h> 70 71#define PCI_MAX_IRQ (16) 72 73 74/*======================================================== 75** 76** Structs and Functions 77** 78**======================================================== 79*/ 80 81struct pci_devconf { 82 struct kern_devconf pdc_kdc; 83 struct pci_info pdc_pi; 84}; 85 86struct pcicb { 87 struct pcicb *pcicb_next; 88 struct pcicb *pcicb_up; 89 struct pcicb *pcicb_down; 90 pcici_t pcicb_bridge; 91 92 u_long pcicb_seen; 93 u_char pcicb_bus; 94 u_char pcicb_subordinate; 95 u_char pcicb_flags; 96#define PCICB_ISAMEM 0x01 97 u_int pcicb_mfrom; 98 u_int pcicb_mupto; 99 u_int pcicb_mamount; 100 u_short pcicb_pfrom; 101 u_short pcicb_pupto; 102 u_short pcicb_pamount; 103 u_char pcicb_bfrom; 104 u_char pcicb_bupto; 105 106 u_long pcicb_iobase; 107 u_long pcicb_iolimit; 108 u_long pcicb_membase; 109 u_long pcicb_memlimit; 110 u_long pcicb_p_membase; 111 u_long pcicb_p_memlimit; 112}; 113 114static int 115pci_externalize (struct proc *, struct kern_devconf *, void *, size_t); 116 117static int 118pci_internalize (struct proc *, struct kern_devconf *, void *, size_t); 119 120static void 121not_supported (pcici_t tag, u_long type); 122 123static void 124pci_bus_config (void); 125 126static void 127pci_bridge_config (void); 128 129/*======================================================== 130** 131** Variables 132** 133**======================================================== 134*/ 135 136/* 137** log2 of safe burst len (in words) 138*/ 139 140unsigned pci_max_burst_len = 2; 141unsigned pci_mechanism = 0; 142unsigned pci_maxdevice = 0; 143struct pcibus* pcibus; 144 145/*-------------------------------------------------------- 146** 147** Local variables. 148** 149**-------------------------------------------------------- 150*/ 151 152static int pci_conf_count; 153static int pci_info_done; 154static struct pcicb pcibus0 = { 155 NULL, NULL, NULL, 156 { 0 }, 157 0, 0, 0, 0, 158 0, 0, 0, 0, 0, 0, 0, 0, /* real allocation */ 159 0, 0xFFFF, /* iobase/limit */ 160 0x4000000, 0xFFFFFFFFu, /* nonprefetch membase/limit */ 161 0x4000000, 0xFFFFFFFFu /* prefetch membase/limit */ 162}; 163static struct pcicb *pcicb; 164 165/*======================================================== 166** 167** pci_configure () 168** 169** Autoconfiguration of pci devices. 170** 171** May be called more than once. 172** Any device is attached only once. 173** 174** Has to take care of mirrored devices, which are 175** entailed by incomplete decoding of pci address lines. 176** 177**======================================================== 178*/ 179 180void pci_configure() 181{ 182 int i; 183 184 /* 185 ** check pci bus present 186 */ 187 188 for (i=0; i<pcibus_set.ls_length; i++) { 189 if (pci_maxdevice) break; 190 pcibus = (struct pcibus*) pcibus_set.ls_items[i]; 191 pcibus->pb_setup (); 192 } 193 if (!pci_maxdevice) return; 194 195 /* 196 ** hello world .. 197 */ 198 199 for (pcicb = &pcibus0; pcicb != NULL;) { 200 pci_bus_config (); 201 202 if (pcicb->pcicb_down) { 203 pcicb = pcicb->pcicb_down; 204 continue; 205 }; 206 207 while (pcicb && !pcicb->pcicb_next) 208 pcicb = pcicb->pcicb_up; 209 210 if (pcicb) 211 pcicb = pcicb->pcicb_next; 212 } 213 pci_conf_count++; 214} 215 216/*======================================================== 217** 218** Subroutines for configuration. 219** 220**======================================================== 221*/ 222 223static void 224pci_register_io (struct pcicb * cb, u_int base, u_int limit) 225{ 226#ifdef PCI_BRIDGE_DEBUG 227 printf ("register_io: bus=%d base=%x limit=%x\n", 228 cb->pcicb_bus, base, limit); 229#endif 230 231 if (!cb->pcicb_pfrom || base < cb->pcicb_pfrom) 232 cb->pcicb_pfrom = base; 233 if (limit > cb->pcicb_pupto) 234 cb->pcicb_pupto = limit; 235 236 /* 237 ** XXX should set bridge io mapping here 238 ** but it can be mapped in 4k blocks only, 239 ** leading to conflicts with isa/eisa .. 240 */ 241} 242 243static void 244pci_register_memory (struct pcicb * cb, u_int base, u_int limit) 245{ 246#ifdef PCI_BRIDGE_DEBUG 247 printf ("register_mem: bus=%d base=%x limit=%x\n", 248 cb->pcicb_bus, base, limit); 249#endif 250 251 if (!cb->pcicb_mfrom || base < cb->pcicb_mfrom) 252 cb->pcicb_mfrom = base; 253 if (limit > cb->pcicb_mupto) 254 cb->pcicb_mupto = limit; 255 /* 256 ** set the bridges mapping 257 ** 258 ** XXX should handle the 1Mb granularity. 259 */ 260 if (cb->pcicb_bridge.tag) { 261 pci_conf_write(cb->pcicb_bridge, 262 PCI_PCI_BRIDGE_MEM_REG, 263 (cb->pcicb_memlimit & 0xffff0000) | 264 (cb->pcicb_membase >> 16)); 265 printf ("\t[pci%d uses memory from %x to %x]\n", 266 cb->pcicb_bus, 267 (unsigned) cb->pcicb_membase, 268 (unsigned) cb->pcicb_memlimit); 269 } 270} 271 272/* 273** XXX This function is neither complete nor tested. 274** It's only used if the bios hasn't done it's job 275** of mapping the pci devices in the physical memory. 276*/ 277 278static u_int 279pci_memalloc (struct pcicb * cb, u_int addr, u_int size) 280{ 281 u_int result = 0, limit=0, newbase=0; 282#ifdef PCI_BRIDGE_DEBUG 283 printf ("memalloc: bus=%d addr=%x size=%x ..\n", 284 cb->pcicb_bus, addr, size); 285#endif 286 287 if (!cb) goto done; 288 289 if (!cb->pcicb_membase) { 290 printf ("memalloc: bus%d: membase not set.\n", 291 cb->pcicb_bus); 292 goto done; 293 } 294 295 /* 296 ** get upper allocation limit 297 */ 298 limit = cb->pcicb_memlimit; 299 if (cb->pcicb_mfrom && cb->pcicb_mfrom <= limit) 300 limit = cb->pcicb_mfrom-1; 301 302 /* 303 ** address fixed, and impossible to allocate ? 304 */ 305 if (addr && addr+size-1 > limit) 306 goto done; 307 308 /* 309 ** get possible address 310 */ 311 312 result = addr; 313 if (!result) result = ((limit + 1) / size - 1) * size; 314 315 /* 316 ** if not local available, request from parent. 317 */ 318 319 if (result < cb->pcicb_membase) { 320 newbase = pci_memalloc (cb->pcicb_up, result, size); 321 if (newbase) cb->pcicb_membase = result; 322 else result=0; 323 } 324done: 325 if (result) 326 pci_register_memory (cb, result, result+size-1); 327 328#ifdef PCI_BRIDGE_DEBUG 329 printf ("memalloc: bus=%d addr=%x size=%x --> %x (limit=%x).\n", 330 cb->pcicb_bus, addr, size, result, limit); 331#endif 332 333 return (result); 334} 335 336/*======================================================== 337** 338** pci_bus_config() 339** 340** Autoconfiguration of one pci bus. 341** 342**======================================================== 343*/ 344 345static void 346pci_bus_config (void) 347{ 348 u_char device; 349 u_char reg; 350 pcici_t tag, mtag; 351 pcidi_t type; 352 u_long data; 353 int unit; 354 int pciint; 355 int irq; 356 char* name=0; 357 358 int dvi; 359 struct pci_device *dvp=0; 360 361 struct pci_devconf *pdcp; 362 363 /* 364 ** first initialize the bridge (bus controller chip) 365 */ 366 pci_bridge_config (); 367 368#ifndef PCI_QUIET 369 printf ("Probing for devices on the %s%d bus:\n", 370 pcibus->pb_name, pcicb->pcicb_bus); 371 if (!pci_info_done) { 372 pci_info_done=1; 373 printf ("\tconfiguration mode %d allows %d devices.\n", 374 pci_mechanism, pci_maxdevice); 375 }; 376#endif 377 for (device=0; device<pci_maxdevice; device ++) { 378 379 if ((pcicb->pcicb_seen >> device) & 1) 380 continue; 381 382 tag = pcibus->pb_tag (pcicb->pcicb_bus, device, 0); 383 type = pcibus->pb_read (tag, PCI_ID_REG); 384 385 if ((!type) || (type==0xfffffffful)) continue; 386 387 /* 388 ** lookup device in ioconfiguration: 389 */ 390 391 for (dvi=0; dvi<pcidevice_set.ls_length; dvi++) { 392 dvp = (struct pci_device*) pcidevice_set.ls_items[dvi]; 393 if ((name=(*dvp->pd_probe)(tag, type))) 394 break; 395 dvp = NULL; 396 }; 397 398 /* 399 ** check for mirrored devices. 400 */ 401 if (device & 0x10) { 402 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 403 (u_char)(device & ~0x10), 0); 404 } else if (device & 0x08) { 405 mtag=pcibus->pb_tag (pcicb->pcicb_bus, 406 (u_char)(device & ~0x08), 0); 407 } else goto real_device; 408 409 if (type!=pcibus->pb_read (mtag, PCI_ID_REG)) 410 goto real_device; 411 412 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) 413 if (pcibus->pb_read(tag,reg)!=pcibus->pb_read(mtag,reg)) 414 goto real_device; 415 416#ifndef PCI_QUIET 417 if (dvp==NULL) continue; 418 printf ("%s? <%s> mirrored on pci%d:%d\n", 419 dvp->pd_name, name, pcicb->pcicb_bus, device); 420#endif 421 continue; 422 423 real_device: 424 425 if (dvp==NULL) { 426#ifndef PCI_QUIET 427 if (pci_conf_count) 428 continue; 429 printf("%s%d:%d: ", pcibus->pb_name, 430 pcicb->pcicb_bus, device); 431 not_supported (tag, type); 432#endif 433 continue; 434 }; 435 436 pcicb->pcicb_seen |= (1ul << device); 437 /* 438 ** Get and increment the unit. 439 */ 440 441 unit = (*dvp->pd_count)++; 442 443 /* 444 ** ignore device ? 445 */ 446 447 if (!*name) continue; 448 449 /* 450 ** Announce this device 451 */ 452 453 printf ("%s%d <%s> rev %d", dvp->pd_name, unit, name, 454 (unsigned) pci_conf_read (tag, PCI_CLASS_REG) & 0xff); 455 456 /* 457 ** Get the int pin number (pci interrupt number a-d) 458 ** from the pci configuration space. 459 */ 460 461 data = pcibus->pb_read (tag, PCI_INTERRUPT_REG); 462 pciint = PCI_INTERRUPT_PIN_EXTRACT(data); 463 464 if (pciint) { 465 466 printf (" int %c irq ", 0x60+pciint); 467 468 irq = PCI_INTERRUPT_LINE_EXTRACT(data); 469 470 /* 471 ** If it's zero, the isa irq number is unknown, 472 ** and we cannot bind the pci interrupt. 473 */ 474 475 if (irq) 476 printf ("%d", irq); 477 else 478 printf ("??"); 479 }; 480 481 printf (" on pci%d:%d\n", pcicb->pcicb_bus, device); 482 483 /* 484 ** Read the current mapping, 485 ** and update the pcicb fields. 486 */ 487 488 for (reg=PCI_MAP_REG_START;reg<PCI_MAP_REG_END;reg+=4) { 489 u_int map, addr, size; 490 491 data = pci_conf_read(tag, PCI_CLASS_REG); 492 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 493 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 494 continue; 495 }; 496 497 map = pcibus->pb_read (tag, reg); 498 if (!(map & PCI_MAP_MEMORY_ADDRESS_MASK)) 499 continue; 500 501 pcibus->pb_write (tag, reg, 0xffffffff); 502 data = pcibus->pb_read (tag, reg); 503 pcibus->pb_write (tag, reg, map); 504 505 switch (data & 7) { 506 507 default: 508 continue; 509 case 1: 510 case 5: 511 size = -(data & PCI_MAP_IO_ADDRESS_MASK); 512 addr = map & PCI_MAP_IO_ADDRESS_MASK; 513 514 pci_register_io (pcicb, addr, addr+size-1); 515 pcicb->pcicb_pamount += size; 516 break; 517 518 case 0: 519 case 2: 520 case 4: 521 size = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 522 addr = map & PCI_MAP_MEMORY_ADDRESS_MASK; 523 if (addr >= 0x100000) { 524 pci_register_memory 525 (pcicb, addr, addr+size-1); 526 pcicb->pcicb_mamount += size; 527 } else { 528 pcicb->pcicb_flags |= PCICB_ISAMEM; 529 }; 530 break; 531 }; 532 if (!bootverbose) 533 continue; 534 printf ("\tmapreg[%02x] type=%d addr=%08x size=%04x.\n", 535 reg, map&7, addr, size); 536 }; 537 538 /* 539 ** Allocate a devconf structure 540 ** We should, and eventually will, set the 541 ** parent pointer to a pci bus devconf structure, 542 ** and arrange to set the state field dynamically. 543 */ 544 545 pdcp = (struct pci_devconf *) 546 malloc (sizeof (struct pci_devconf),M_DEVBUF,M_WAITOK); 547 548 pdcp -> pdc_pi.pi_bus = pcicb->pcicb_bus; 549 pdcp -> pdc_pi.pi_device = device; 550 551 pdcp -> pdc_kdc.kdc_name = dvp->pd_name; 552 pdcp -> pdc_kdc.kdc_unit = unit; 553 554 pdcp -> pdc_kdc.kdc_md.mddc_devtype = MDDT_PCI; 555 556 pdcp -> pdc_kdc.kdc_externalize = pci_externalize; 557 pdcp -> pdc_kdc.kdc_internalize = pci_internalize; 558 559 pdcp -> pdc_kdc.kdc_datalen = PCI_EXTERNAL_LEN; 560 pdcp -> pdc_kdc.kdc_parentdata = &pdcp->pdc_pi; 561 pdcp -> pdc_kdc.kdc_state = DC_UNKNOWN; 562 pdcp -> pdc_kdc.kdc_description = name; 563 pdcp -> pdc_kdc.kdc_shutdown = dvp->pd_shutdown; 564 565 /* 566 ** And register this device 567 */ 568 569 dev_attach (&pdcp->pdc_kdc); 570 571 /* 572 ** attach device 573 ** may produce additional log messages, 574 ** i.e. when installing subdevices. 575 */ 576 577 (*dvp->pd_attach) (tag, unit); 578 579 /* 580 ** Special processing of certain classes 581 */ 582 583 data = pci_conf_read(tag, PCI_CLASS_REG); 584 585 switch (data & (PCI_CLASS_MASK|PCI_SUBCLASS_MASK)) { 586 struct pcicb *this, **link; 587 unsigned char primary, secondary, subordinate; 588 u_int command; 589 590 case PCI_CLASS_BRIDGE|PCI_SUBCLASS_BRIDGE_PCI: 591 592 /* 593 ** get current configuration of the bridge. 594 */ 595 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 596 primary = PCI_PRIMARY_BUS_EXTRACT (data); 597 secondary = PCI_SECONDARY_BUS_EXTRACT(data); 598 subordinate = PCI_SUBORDINATE_BUS_EXTRACT(data); 599#ifndef PCI_QUIET 600 printf ("\tbridge from pci%d to pci%d through %d.\n", 601 primary, secondary, subordinate); 602#endif 603 /* 604 ** check for uninitialized bridge. 605 */ 606 if (secondary == 0 || secondary < primary || 607 pcicb->pcicb_bus != primary) 608 { 609 printf ("\tINCORRECTLY or NEVER CONFIGURED.\n"); 610 /* 611 ** disable this bridge 612 */ 613 pcibus->pb_write (tag, PCI_COMMAND_STATUS_REG, 614 0xffff0000); 615 secondary = 0; 616 subordinate = 0; 617 }; 618 619 /* 620 ** allocate bus descriptor for bus behind the bridge 621 */ 622 link = &pcicb->pcicb_down; 623 while (*link) link = &(*link)->pcicb_next; 624 625 this = malloc (sizeof (*this), M_DEVBUF, M_WAITOK); 626 627 /* 628 ** Initialize this descriptor so far. 629 ** (the initialization is completed just before 630 ** scanning the bus behind the bridge. 631 */ 632 bzero (this, sizeof(*this)); 633 this->pcicb_up = pcicb; 634 this->pcicb_bridge = tag; 635 this->pcicb_bus = secondary; 636 this->pcicb_subordinate = subordinate; 637 638 command = pci_conf_read(tag,PCI_COMMAND_STATUS_REG); 639 640 if (command & PCI_COMMAND_IO_ENABLE){ 641 /* 642 ** Bridge was configured by the bios. 643 ** Read out the mapped io region. 644 */ 645 u_int reg, data, mask; 646 647 reg = pci_conf_read (tag, 648 PCI_PCI_BRIDGE_IO_REG); 649 pci_conf_write(tag, 650 PCI_PCI_BRIDGE_IO_REG, 0xFFFF); 651 data = pci_conf_read (tag, 652 PCI_PCI_BRIDGE_IO_REG); 653 pci_conf_write(tag, 654 PCI_PCI_BRIDGE_IO_REG, reg & 0xffff); 655 656 mask = (0xFF00 ^ (data & 0xFF00)) | 0xFF; 657 658 this->pcicb_iobase = 659 PCI_PPB_IOBASE_EXTRACT (reg); 660 this->pcicb_iolimit = 661 PCI_PPB_IOLIMIT_EXTRACT(reg) | mask; 662 663 /* 664 ** Note the used io space. 665 */ 666 pci_register_io (pcicb, this->pcicb_iobase, 667 this->pcicb_iolimit); 668 669 }; 670 671 if (command & PCI_COMMAND_MEM_ENABLE) { 672 /* 673 ** Bridge was configured by the bios. 674 ** Read out the mapped memory regions. 675 */ 676 u_int reg, data, mask; 677 678 /* 679 ** non prefetchable memory 680 */ 681 reg = pci_conf_read (tag, 682 PCI_PCI_BRIDGE_MEM_REG); 683 pci_conf_write(tag, 684 PCI_PCI_BRIDGE_MEM_REG, 0xFFFFFFFF); 685 data = pci_conf_read (tag, 686 PCI_PCI_BRIDGE_MEM_REG); 687 pci_conf_write(tag, 688 PCI_PCI_BRIDGE_MEM_REG, reg); 689 mask = (0xFFFF0000 ^ (data & 0xFFFF0000)) 690 | 0xFFFF; 691 692 this->pcicb_membase = 693 PCI_PPB_MEMBASE_EXTRACT (reg); 694 this->pcicb_memlimit = 695 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 696 697 /* 698 ** Register used memory space. 699 */ 700 pci_register_memory (pcicb, 701 this->pcicb_membase, 702 this->pcicb_memlimit); 703 704 /* 705 ** prefetchable memory 706 */ 707 reg = pci_conf_read (tag, 708 PCI_PCI_BRIDGE_PMEM_REG); 709 pci_conf_write(tag, 710 PCI_PCI_BRIDGE_PMEM_REG, 0xFFFFFFFF); 711 data = pci_conf_read (tag, 712 PCI_PCI_BRIDGE_PMEM_REG); 713 pci_conf_write(tag, 714 PCI_PCI_BRIDGE_PMEM_REG, reg); 715 716 mask = (0xFFFF0000 ^ (data & 0xFFFF0000)) 717 | 0xFFFF; 718 this->pcicb_p_membase= 719 PCI_PPB_MEMBASE_EXTRACT (reg); 720 this->pcicb_p_memlimit= 721 PCI_PPB_MEMLIMIT_EXTRACT(reg) | mask; 722 723 /* 724 ** Register used memory space. 725 */ 726 pci_register_memory (pcicb, 727 this->pcicb_p_membase, 728 this->pcicb_p_memlimit); 729 } 730 731 /* 732 ** Link it in chain. 733 */ 734 *link=this; 735 736 /* 737 ** Update mapping info of parent bus. 738 */ 739 if (!pcicb->pcicb_bfrom||secondary< pcicb->pcicb_bfrom) 740 pcicb->pcicb_bfrom = secondary; 741 if (subordinate > pcicb->pcicb_bupto) 742 pcicb->pcicb_bupto = subordinate; 743 744 break; 745 } 746 } 747 748#ifndef PCI_QUIET 749 if (pcicb->pcicb_mamount) 750 printf ("%s%d: uses %d bytes of memory from %x upto %x.\n", 751 pcibus->pb_name, pcicb->pcicb_bus, 752 pcicb->pcicb_mamount, 753 pcicb->pcicb_mfrom, pcicb->pcicb_mupto); 754 if (pcicb->pcicb_pamount) 755 printf ("%s%d: uses %d bytes of I/O space from %x upto %x.\n", 756 pcibus->pb_name, pcicb->pcicb_bus, 757 pcicb->pcicb_pamount, 758 pcicb->pcicb_pfrom, pcicb->pcicb_pupto); 759 if (pcicb->pcicb_bfrom) 760 printf ("%s%d: subordinate busses from %x upto %x.\n", 761 pcibus->pb_name, pcicb->pcicb_bus, 762 pcicb->pcicb_bfrom, pcicb->pcicb_bupto); 763#endif 764} 765 766/*======================================================== 767** 768** pci_bridge_config() 769** 770** Configuration of a pci bridge. 771** 772**======================================================== 773*/ 774 775static void 776pci_bridge_config (void) 777{ 778 pcici_t tag; 779 struct pcicb* parent; 780 781 tag = pcicb->pcicb_bridge; 782 if (!tag.tag) return; 783 784 if (!pcicb->pcicb_bus) { 785 u_int data; 786 /* 787 ** Get the lowest available bus number. 788 */ 789 pcicb->pcicb_bus = ++pcibus0.pcicb_subordinate; 790 791 /* 792 ** and configure the bridge 793 */ 794 data = pci_conf_read (tag, PCI_PCI_BRIDGE_BUS_REG); 795 data = PCI_PRIMARY_BUS_INSERT(data, pcicb->pcicb_up->pcicb_bus); 796 data = PCI_SECONDARY_BUS_INSERT(data, pcicb->pcicb_bus); 797 data = PCI_SUBORDINATE_BUS_INSERT(data, pcicb->pcicb_bus); 798 pci_conf_write (tag, PCI_PCI_BRIDGE_BUS_REG, data); 799 800 /* 801 ** Propagate the new upper bus number limit. 802 */ 803 for (parent = pcicb->pcicb_up; parent != NULL; 804 parent = parent->pcicb_up) 805 { 806 if (parent->pcicb_subordinate >= pcicb->pcicb_bus) 807 continue; 808 parent->pcicb_subordinate = pcicb->pcicb_bus; 809 if (!parent->pcicb_bridge.tag) 810 continue; 811 data = pci_conf_read 812 (parent->pcicb_bridge, PCI_PCI_BRIDGE_BUS_REG); 813 data = PCI_SUBORDINATE_BUS_INSERT 814 (data, pcicb->pcicb_bus); 815 pci_conf_write (parent->pcicb_bridge, 816 PCI_PCI_BRIDGE_BUS_REG, data); 817 } 818 } 819 820 if (!pcicb->pcicb_membase) { 821 u_int size = 0x100000; 822 pcicb->pcicb_membase = pci_memalloc (pcicb->pcicb_up, 0, size); 823 if (pcicb->pcicb_membase) 824 pcicb->pcicb_memlimit = pcicb->pcicb_membase+size-1; 825 } 826} 827/*----------------------------------------------------------------- 828** 829** The following functions are provided for the device driver 830** to read/write the configuration space. 831** 832** pci_conf_read(): 833** Read a long word from the pci configuration space. 834** Requires a tag (from pcitag) and the register 835** number (should be a long word alligned one). 836** 837** pci_conf_write(): 838** Writes a long word to the pci configuration space. 839** Requires a tag (from pcitag), the register number 840** (should be a long word alligned one), and a value. 841** 842**----------------------------------------------------------------- 843*/ 844 845u_long 846pci_conf_read (pcici_t tag, u_long reg) 847{ 848 return (pcibus->pb_read (tag, reg)); 849} 850 851void 852pci_conf_write (pcici_t tag, u_long reg, u_long data) 853{ 854 pcibus->pb_write (tag, reg, data); 855} 856 857/*----------------------------------------------------------------------- 858** 859** Map device into port space. 860** 861** Actually the device should have been mapped by the bios. 862** This function only reads and verifies the value. 863** 864** PCI-Specification: 6.2.5.1: address maps 865** 866**----------------------------------------------------------------------- 867*/ 868 869int pci_map_port (pcici_t tag, u_long reg, u_short* pa) 870{ 871 unsigned data, ioaddr, iosize; 872 struct pcicb *link = pcicb; 873 874 /* 875 ** sanity check 876 */ 877 878 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 879 printf ("pci_map_port failed: bad register=0x%x\n", 880 (unsigned)reg); 881 return (0); 882 }; 883 884 /*if (pcicb->pcicb_flags & PCICB_NOIOSET) { 885 printf ("pci_map_port failed: pci%d has not been configured for I/O access\n", 886 pcicb->pcicb_bus); 887 return (0); 888 }*/ 889 890 /* 891 ** get size and type of port 892 ** 893 ** type is in the lowest two bits. 894 ** If device requires 2^n bytes, the next 895 ** n-2 bits are hardwired as 0. 896 */ 897 898 ioaddr = pcibus->pb_read (tag, reg) & PCI_MAP_IO_ADDRESS_MASK; 899 if (!ioaddr || ioaddr > 0xfffful) { 900 printf ("pci_map_port failed: not configured by bios.\n"); 901 return (0); 902 }; 903 904 pcibus->pb_write (tag, reg, 0xfffffffful); 905 data = pcibus->pb_read (tag, reg); 906 pcibus->pb_write (tag, reg, ioaddr); 907 908 if ((data & 0x03) != PCI_MAP_IO) { 909 printf ("pci_map_port failed: bad port type=0x%x\n", 910 (unsigned) data); 911 return (0); 912 }; 913 iosize = -(data & PCI_MAP_IO_ADDRESS_MASK); 914 if (ioaddr < pcicb->pcicb_iobase 915 || ioaddr + iosize > pcicb->pcicb_iolimit) { 916 printf ("pci_map_port failed: device's iorange 0x%x-0x%x " 917 "is incompatible with its bridge's range 0x%x-0x%x\n", 918 (unsigned) ioaddr, (unsigned) ioaddr + iosize - 1, 919 (unsigned) pcicb->pcicb_iobase, 920 (unsigned) pcicb->pcicb_iolimit); 921 return (0); 922 } 923 924#ifndef PCI_QUIET 925 printf ("\treg%d: ioaddr=0x%x size=0x%x\n", 926 (unsigned) reg, (unsigned) ioaddr, (unsigned) iosize); 927#endif 928 /* 929 ** set the configuration register of and 930 ** return the address to the driver. 931 ** Make sure to enable each upstream bridge 932 ** so I/O and DMA can go all the way. 933 */ 934 935 for (;;) { 936 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 937 data |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 938 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 939 if ((link = link->pcicb_up) == NULL) 940 break; 941 tag = link->pcicb_bridge; 942 } 943 944 *pa = ioaddr; 945 946 return (1); 947} 948 949/*----------------------------------------------------------------------- 950** 951** Map device into virtual and physical space 952** 953** Actually the device should have been mapped by the bios. 954** This function only reads and verifies the value. 955** 956** PCI-Specification: 6.2.5.1: address maps 957** 958**----------------------------------------------------------------------- 959*/ 960 961int pci_map_mem (pcici_t tag, u_long reg, vm_offset_t* va, vm_offset_t* pa) 962{ 963 struct pcicb *link = pcicb; 964 unsigned data ,paddr; 965 vm_size_t psize, poffs; 966 vm_offset_t vaddr; 967 968 /* 969 ** sanity check 970 */ 971 972 if (reg < PCI_MAP_REG_START || reg >= PCI_MAP_REG_END || (reg & 3)) { 973 printf ("pci_map_mem failed: bad register=0x%x\n", 974 (unsigned)reg); 975 return (0); 976 }; 977 978 /* 979 ** save old mapping, get size and type of memory 980 ** 981 ** type is in the lowest four bits. 982 ** If device requires 2^n bytes, the next 983 ** n-4 bits are read as 0. 984 */ 985 986 paddr = pcibus->pb_read (tag, reg) & PCI_MAP_MEMORY_ADDRESS_MASK; 987 pcibus->pb_write (tag, reg, 0xfffffffful); 988 data = pcibus->pb_read (tag, reg); 989 pcibus->pb_write (tag, reg, paddr); 990 991 /* 992 ** check the type 993 */ 994 995 if ((data & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT) { 996 printf ("pci_map_mem failed: bad memory type=0x%x\n", 997 (unsigned) data); 998 return (0); 999 }; 1000 1001 /* 1002 ** get the size. 1003 */ 1004 1005 psize = -(data & PCI_MAP_MEMORY_ADDRESS_MASK); 1006 1007 if (!paddr || paddr == PCI_MAP_MEMORY_ADDRESS_MASK) { 1008 paddr = pci_memalloc (pcicb, 0, psize); 1009 if (!paddr) { 1010 printf ("pci_map_mem: not configured by bios.\n"); 1011 return (0); 1012 }; 1013 pci_register_memory (pcicb, paddr, paddr+psize-1); 1014 }; 1015 1016 if (paddr < pcicb->pcicb_membase || 1017 paddr + psize - 1 > pcicb->pcicb_memlimit) { 1018 printf ("pci_map_mem failed: device's memrange 0x%x-0x%x is " 1019 "incompatible with its bridge's memrange 0x%x-0x%x\n", 1020 (unsigned) paddr, 1021 (unsigned) (paddr + psize - 1), 1022 (unsigned) pcicb->pcicb_membase, 1023 (unsigned) pcicb->pcicb_memlimit); 1024 return (0); 1025 } 1026 pcibus->pb_write (tag, reg, paddr); 1027 1028 /* 1029 ** Truncate paddr to page boundary. 1030 ** (Or does pmap_mapdev the job?) 1031 */ 1032 1033 poffs = paddr - trunc_page (paddr); 1034 vaddr = (vm_offset_t) pmap_mapdev (paddr-poffs, psize+poffs); 1035 1036 if (!vaddr) return (0); 1037 1038 vaddr += poffs; 1039 1040#ifndef PCI_QUIET 1041 /* 1042 ** display values. 1043 */ 1044 1045 printf ("\treg%d: virtual=0x%lx physical=0x%lx size=0x%lx\n", 1046 (unsigned) reg, (u_long)vaddr, (u_long)paddr, (u_long)psize); 1047#endif 1048 /* 1049 ** set the configuration register and 1050 ** return the address to the driver 1051 ** Make sure to enable each upstream bridge 1052 ** so memory and DMA can go all the way. 1053 */ 1054 1055 for (;;) { 1056 data = pcibus->pb_read (tag, PCI_COMMAND_STATUS_REG) & 0xffff; 1057 data |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 1058 (void) pcibus->pb_write(tag, PCI_COMMAND_STATUS_REG, data); 1059 if ((link = link->pcicb_up) == NULL) 1060 break; 1061 tag = link->pcicb_bridge; 1062 } 1063 1064 *va = vaddr; 1065 *pa = paddr; 1066 1067 return (1); 1068} 1069 1070/*------------------------------------------------------------ 1071** 1072** Interface functions for the devconf module. 1073** 1074**------------------------------------------------------------ 1075*/ 1076 1077static int 1078pci_externalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t l) 1079{ 1080 struct pci_externalize_buffer buffer; 1081 struct pci_info * pip = kdcp->kdc_parentdata; 1082 pcici_t tag; 1083 int i; 1084 1085 if (l < sizeof buffer) { 1086 return ENOMEM; 1087 }; 1088 1089 tag = pcibus->pb_tag (pip->pi_bus, pip->pi_device, 0); 1090 1091 buffer.peb_pci_info = *pip; 1092 1093 for (i=0; i<PCI_EXT_CONF_LEN; i++) { 1094 buffer.peb_config[i] = pcibus->pb_read (tag, i*4); 1095 }; 1096 1097 return copyout(&buffer, u, sizeof buffer); 1098} 1099 1100 1101static int 1102pci_internalize (struct proc *p, struct kern_devconf *kdcp, void *u, size_t s) 1103{ 1104 return EOPNOTSUPP; 1105} 1106 1107/*----------------------------------------------------------------------- 1108** 1109** Pci meta interrupt handler 1110** 1111** This handler assumes level triggered interrupts. 1112** It's possible to build a kernel which handles shared 1113** edge triggered interrupts by the options "PCI_EDGE_INT". 1114** But there is a performance penalty. 1115** 1116** (Of course you can delete the #ifdef PCI_EDGE_INT bracketed 1117** code at all :-) :-) :-) 1118** 1119**----------------------------------------------------------------------- 1120*/ 1121 1122struct pci_int_desc* 1123 pci_int_desc [PCI_MAX_IRQ]; 1124 1125#ifndef NO_SHARED_IRQ 1126 1127static inline unsigned 1128splq (unsigned mask) 1129{ 1130 unsigned temp=cpl; 1131 cpl |= mask; 1132 return temp; 1133} 1134 1135static void 1136pci_int (int irq) 1137{ 1138 struct pci_int_desc * p; 1139 int c, s; 1140#ifdef PCI_EDGE_INT 1141 int i, n; 1142#endif 1143 if (irq<0 || irq >= PCI_MAX_IRQ) { 1144 printf ("pci_int(%d)\n", irq); 1145 return; 1146 }; 1147 1148#ifdef PCI_EDGE_INT 1149 for (i=0; i<1000; i++) { 1150 n = 0; 1151#endif 1152 for (p = pci_int_desc[irq]; p!=NULL; p=p->pcid_next) { 1153 s = splq (*p->pcid_maskptr); 1154 c= (*p->pcid_handler) (p->pcid_argument); 1155 p-> pcid_tally += c; 1156 splx (s); 1157#ifdef PCI_EDGE_INT 1158 n += c; 1159#endif 1160#if 0 1161 if (c && p->pcid_tally<20) 1162 printf ("PCI_INT: irq=%d h=%p cpl o=%x n=%x val=%d\n", 1163 irq, p->pcid_handler, s, cpl, c); 1164#endif 1165 }; 1166#ifdef PCI_EDGE_INT 1167 if (!n) return; 1168 }; 1169 printf ("pci_int(%d): permanent interrupt request.\n", irq); 1170#endif 1171} 1172#endif 1173 1174/*----------------------------------------------------------------------- 1175** 1176** Auxiliary function for interrupt (un)mapping. 1177** 1178**----------------------------------------------------------------------- 1179*/ 1180 1181static u_int 1182getirq (pcici_t tag) 1183{ 1184 u_int irq; 1185 1186 irq = PCI_INTERRUPT_LINE_EXTRACT( 1187 pcibus->pb_read (tag, PCI_INTERRUPT_REG)); 1188 1189 if (irq <= 0) { 1190 printf ("\tint line register not set by bios\n"); 1191 return (0); 1192 } 1193 1194 if (irq >= pcibus->pb_maxirq || irq >= PCI_MAX_IRQ) { 1195 printf ("\tirq %d invalid.\n", irq); 1196 return (0); 1197 } 1198 1199 return (irq); 1200} 1201 1202static struct pci_int_desc ** 1203getintdescbytag (u_int irq, pcici_t tag) 1204{ 1205 struct pci_int_desc *p, **pp; 1206 1207 pp=&pci_int_desc[irq]; 1208 while (((p=*pp)) && !sametag(p->pcid_tag,tag)) 1209 pp=&p->pcid_next; 1210 1211 if (!p) return (NULL); 1212 1213 return (pp); 1214} 1215 1216static struct pci_int_desc * 1217getintdescbymptr (u_int irq, unsigned * mptr) 1218{ 1219 struct pci_int_desc *p; 1220 1221 for (p=pci_int_desc[irq];p;p=p->pcid_next) 1222 if (p->pcid_maskptr == mptr) break; 1223 return (p); 1224} 1225 1226/*----------------------------------------------------------------------- 1227** 1228** Map pci interrupt. 1229** 1230**----------------------------------------------------------------------- 1231*/ 1232 1233static unsigned pci_mask0 = 0; 1234 1235int pci_map_int (pcici_t tag, int(*func)(), void* arg, unsigned* maskptr) 1236{ 1237 u_int irq; 1238 int result, oldspl; 1239 unsigned mask; 1240 struct pci_int_desc *tail, *mdp=NULL, *new=NULL; 1241 1242 /* 1243 ** Get irq line from configuration space, 1244 ** and check for consistency. 1245 */ 1246 1247 irq = getirq (tag); 1248 if (irq >= PCI_MAX_IRQ) { 1249 printf ("\tillegal irq %d.\n", irq); 1250 return (0); 1251 }; 1252 mask= 1ul << irq; 1253 1254 /* 1255 ** disable this interrupt. 1256 */ 1257 1258 oldspl = splq (mask); 1259 1260 /* 1261 ** If handler for this tag already installed, 1262 ** remove it first. 1263 */ 1264 1265 if (getintdescbytag (irq, tag) != NULL) 1266 pci_unmap_int (tag); 1267 1268 /* 1269 ** If this irq not yet included in the mask, include it. 1270 */ 1271 1272 mdp = getintdescbymptr (irq, maskptr); 1273 if (!mdp) { 1274 result = pcibus->pb_imaskinc (irq, maskptr); 1275 if (result) 1276 goto conflict; 1277 }; 1278 1279 /* 1280 ** Allocate descriptor and initialize it. 1281 */ 1282 1283 tail = pci_int_desc[irq]; 1284 1285 new = malloc (sizeof (*new), M_DEVBUF, M_WAITOK); 1286 bzero (new, sizeof (*new)); 1287 1288 new->pcid_next = tail; 1289 new->pcid_tag = tag; 1290 new->pcid_handler = func; 1291 new->pcid_argument = arg; 1292 new->pcid_maskptr = maskptr; 1293 new->pcid_tally = 0; 1294 new->pcid_mask = mask; 1295 1296 /* 1297 ** If first handler: install it. 1298 ** If second handler: install shared-int-handler. 1299 */ 1300 1301 if (!tail) { 1302 /* 1303 ** first handler for this irq. 1304 */ 1305 1306 result = pcibus->pb_iattach 1307 (irq, (void(*)()) func, (int) arg, maskptr); 1308 if (result) goto conflict; 1309 1310#ifdef NO_SHARED_IRQ 1311 } else goto conflict; 1312#else 1313 } else if (!tail->pcid_next) { 1314 /* 1315 ** Second handler for this irq. 1316 */ 1317 1318 printf ("\tusing shared irq %d.\n", irq); 1319 1320 /* 1321 ** replace old handler by shared-int-handler. 1322 */ 1323 1324 result = pcibus->pb_idetach (irq,(void(*)())tail->pcid_handler); 1325 if (result) 1326 printf ("\tCANNOT DETACH INT HANDLER.\n"); 1327 1328 result = pcibus->pb_iattach (irq, pci_int, irq, &pci_mask0); 1329 if (result) { 1330 printf ("\tCANNOT ATTACH SHARED INT HANDLER.\n"); 1331 goto fail; 1332 }; 1333 } 1334#endif 1335 /* 1336 ** Link new descriptor, reenable ints and done. 1337 */ 1338 1339 pci_int_desc[irq] = new; 1340 splx (oldspl); 1341 return (1); 1342 1343 /* 1344 ** Handle some problems. 1345 */ 1346 1347conflict: 1348 printf ("\tirq %d already in use.\n", irq); 1349fail: 1350 /* 1351 ** If descriptor allocated, free it. 1352 ** If included in mask, remove it. 1353 */ 1354 1355 if (free) free (new, M_DEVBUF); 1356 if (!mdp) (void) pcibus->pb_imaskexc (irq, maskptr); 1357 splx (oldspl); 1358 return (0); 1359} 1360 1361/*----------------------------------------------------------------------- 1362** 1363** Unmap pci interrupt. 1364** 1365**----------------------------------------------------------------------- 1366*/ 1367 1368int pci_unmap_int (pcici_t tag) 1369{ 1370 int result, oldspl; 1371 struct pci_int_desc *this, **hook, *tail; 1372 unsigned irq; 1373 1374 /* 1375 ** Get irq line from configuration space, 1376 ** and check for consistency. 1377 */ 1378 1379 irq = getirq (tag); 1380 if (irq >= PCI_MAX_IRQ) { 1381 printf ("\tillegal irq %d.\n", irq); 1382 return (0); 1383 }; 1384 1385 /* 1386 ** Search and unlink interrupt descriptor. 1387 */ 1388 1389 hook = getintdescbytag (irq, tag); 1390 if (hook == NULL) { 1391 printf ("\tno irq %d handler for pci %x\n", 1392 irq, tag.tag); 1393 return (0); 1394 }; 1395 1396 this = *hook; 1397 *hook= this->pcid_next; 1398 1399 /* 1400 ** Message 1401 */ 1402 1403 printf ("\tirq %d handler %p(%p) unmapped for pci %x after %d ints.\n", 1404 irq, this->pcid_handler, this->pcid_argument, 1405 this->pcid_tag.tag, this->pcid_tally); 1406 1407 /* 1408 ** If this irq no longer included in the mask, remove it. 1409 */ 1410 1411 if (!getintdescbymptr (irq, this->pcid_maskptr)) 1412 (void) pcibus->pb_imaskexc (irq, this->pcid_maskptr); 1413 1414 tail = pci_int_desc[irq]; 1415 1416 if (tail == NULL) { 1417 1418 /* 1419 ** Remove the old handler. 1420 */ 1421 1422 result = pcibus->pb_idetach (irq,(void(*)())this->pcid_handler); 1423 if (result) 1424 printf ("\tirq %d: cannot remove handler.\n", irq); 1425 1426 } else if (tail->pcid_next == NULL) { 1427 1428 /* 1429 ** Remove the shared int handler. 1430 ** Install the last remaining handler. 1431 */ 1432 1433 oldspl = splq (1ul << irq); 1434 1435 result = pcibus->pb_idetach (irq, pci_int); 1436 if (result) 1437 printf ("\tirq %d: cannot remove handler.\n", irq); 1438 1439 result = pcibus->pb_iattach (irq, 1440 (void(*)()) tail->pcid_handler, 1441 (int) tail->pcid_argument, 1442 tail->pcid_maskptr); 1443 1444 if (result) 1445 printf ("\tirq %d: cannot install handler.\n", irq); 1446 1447 splx (oldspl); 1448 }; 1449 1450 free (this, M_DEVBUF); 1451 return (1); 1452} 1453 1454/*----------------------------------------------------------- 1455** 1456** Display of unknown devices. 1457** 1458**----------------------------------------------------------- 1459*/ 1460struct vt { 1461 u_short ident; 1462 char* name; 1463}; 1464 1465static struct vt VendorTable[] = { 1466 {0x1002, "ATI TECHNOLOGIES INC"}, 1467 {0x1011, "DIGITAL EQUIPMENT CORPORATION"}, 1468 {0x101A, "NCR"}, 1469 {0x102B, "MATROX"}, 1470 {0x1045, "OPTI"}, 1471 {0x5333, "S3 INC."}, 1472 {0x8086, "INTEL CORPORATION"}, 1473 {0,0} 1474}; 1475 1476static const char *const majclasses[] = { 1477 "old", "storage", "network", "display", 1478 "multimedia", "memory", "bridge" 1479}; 1480 1481void not_supported (pcici_t tag, u_long type) 1482{ 1483 u_char reg; 1484 u_long data; 1485 struct vt * vp; 1486 1487 /* 1488 ** lookup the names. 1489 */ 1490 1491 for (vp=VendorTable; vp->ident; vp++) 1492 if (vp->ident == (type & 0xffff)) 1493 break; 1494 1495 /* 1496 ** and display them. 1497 */ 1498 1499 if (vp->ident) printf (vp->name); 1500 else printf ("vendor=0x%lx", type & 0xffff); 1501 1502 printf (", device=0x%lx", type >> 16); 1503 1504 data = (pcibus->pb_read(tag, PCI_CLASS_REG) >> 24) & 0xff; 1505 if (data < sizeof(majclasses) / sizeof(majclasses[0])) 1506 printf(", class=%s", majclasses[data]); 1507 1508 printf (" [not supported]\n"); 1509 1510 for (reg=PCI_MAP_REG_START; reg<PCI_MAP_REG_END; reg+=4) { 1511 data = pcibus->pb_read (tag, reg); 1512 if ((data&~7)==0) continue; 1513 switch (data&7) { 1514 1515 case 1: 1516 case 5: 1517 printf (" map(%x): io(%lx)\n", 1518 reg, data & ~3); 1519 break; 1520 case 0: 1521 printf (" map(%x): mem32(%lx)\n", 1522 reg, data & ~7); 1523 break; 1524 case 2: 1525 printf (" map(%x): mem20(%lx)\n", 1526 reg, data & ~7); 1527 break; 1528 case 4: 1529 printf (" map(%x): mem64(%lx)\n", 1530 reg, data & ~7); 1531 break; 1532 } 1533 } 1534} 1535#endif /* NPCI */ 1536