ixgbe_vf.c revision 283620
11590Srgrimes/****************************************************************************** 21590Srgrimes 31590Srgrimes Copyright (c) 2001-2015, Intel Corporation 41590Srgrimes All rights reserved. 51590Srgrimes 61590Srgrimes Redistribution and use in source and binary forms, with or without 71590Srgrimes modification, are permitted provided that the following conditions are met: 81590Srgrimes 91590Srgrimes 1. Redistributions of source code must retain the above copyright notice, 101590Srgrimes this list of conditions and the following disclaimer. 111590Srgrimes 121590Srgrimes 2. Redistributions in binary form must reproduce the above copyright 131590Srgrimes notice, this list of conditions and the following disclaimer in the 141590Srgrimes documentation and/or other materials provided with the distribution. 151590Srgrimes 161590Srgrimes 3. Neither the name of the Intel Corporation nor the names of its 171590Srgrimes contributors may be used to endorse or promote products derived from 181590Srgrimes this software without specific prior written permission. 191590Srgrimes 201590Srgrimes THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 211590Srgrimes AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 221590Srgrimes IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 231590Srgrimes ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 241590Srgrimes LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 251590Srgrimes CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 261590Srgrimes SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 271590Srgrimes INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 281590Srgrimes CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 291590Srgrimes ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 301590Srgrimes POSSIBILITY OF SUCH DAMAGE. 311590Srgrimes 321590Srgrimes******************************************************************************/ 331590Srgrimes/*$FreeBSD: stable/10/sys/dev/ixgbe/ixgbe_vf.c 283620 2015-05-27 17:44:11Z erj $*/ 341590Srgrimes 3527647Scharnier 361590Srgrimes#include "ixgbe_api.h" 371590Srgrimes#include "ixgbe_type.h" 381590Srgrimes#include "ixgbe_vf.h" 391590Srgrimes 401590Srgrimes#ifndef IXGBE_VFWRITE_REG 4127647Scharnier#define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 421590Srgrimes#endif 4327647Scharnier#ifndef IXGBE_VFREAD_REG 4427647Scharnier#define IXGBE_VFREAD_REG IXGBE_READ_REG 4550477Speter#endif 461590Srgrimes 471590Srgrimes/** 481590Srgrimes * ixgbe_init_ops_vf - Initialize the pointers for vf 491590Srgrimes * @hw: pointer to hardware structure 501590Srgrimes * 5127647Scharnier * This will assign function pointers, adapter-specific functions can 5250452Ssheldonh * override the assignment of generic function pointers by assigning 531590Srgrimes * their own adapter-specific function pointers. 5478717Sdd * Does not touch the hardware. 551590Srgrimes **/ 5627647Scharniers32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 571590Srgrimes{ 5850452Ssheldonh /* MAC */ 5950452Ssheldonh hw->mac.ops.init_hw = ixgbe_init_hw_vf; 6050452Ssheldonh hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 6127647Scharnier hw->mac.ops.start_hw = ixgbe_start_hw_vf; 6227647Scharnier /* Cannot clear stats on VF */ 6350452Ssheldonh hw->mac.ops.clear_hw_cntrs = NULL; 6450452Ssheldonh hw->mac.ops.get_media_type = NULL; 651590Srgrimes hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 661590Srgrimes hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 671590Srgrimes hw->mac.ops.get_bus_info = NULL; 681590Srgrimes 691590Srgrimes /* Link */ 7050452Ssheldonh hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 7150452Ssheldonh hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 7250452Ssheldonh hw->mac.ops.get_link_capabilities = NULL; 731590Srgrimes 741590Srgrimes /* RAR, Multicast, VLAN */ 7550452Ssheldonh hw->mac.ops.set_rar = ixgbe_set_rar_vf; 761590Srgrimes hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 7750452Ssheldonh hw->mac.ops.init_rx_addrs = NULL; 7850452Ssheldonh hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 7950452Ssheldonh hw->mac.ops.enable_mc = NULL; 8050452Ssheldonh hw->mac.ops.disable_mc = NULL; 811590Srgrimes hw->mac.ops.clear_vfta = NULL; 821590Srgrimes hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 831590Srgrimes 841590Srgrimes hw->mac.max_tx_queues = 1; 851590Srgrimes hw->mac.max_rx_queues = 1; 861590Srgrimes 871590Srgrimes hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 881590Srgrimes 891590Srgrimes return IXGBE_SUCCESS; 9050452Ssheldonh} 9150452Ssheldonh 9250452Ssheldonh/* ixgbe_virt_clr_reg - Set register to default (power on) state. 9350452Ssheldonh * @hw: pointer to hardware structure 9450452Ssheldonh */ 9550452Ssheldonhstatic void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 9650452Ssheldonh{ 9750452Ssheldonh int i; 9850452Ssheldonh u32 vfsrrctl; 9950452Ssheldonh u32 vfdca_rxctrl; 10050452Ssheldonh u32 vfdca_txctrl; 10150452Ssheldonh 10250452Ssheldonh /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 1031590Srgrimes vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 10450452Ssheldonh vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 1051590Srgrimes 1061590Srgrimes /* DCA_RXCTRL default value */ 1071590Srgrimes vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 1081590Srgrimes IXGBE_DCA_RXCTRL_DATA_WRO_EN | 1091590Srgrimes IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 1101590Srgrimes 11127647Scharnier /* DCA_TXCTRL default value */ 1121590Srgrimes vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 1131590Srgrimes IXGBE_DCA_TXCTRL_DESC_WRO_EN | 11450452Ssheldonh IXGBE_DCA_TXCTRL_DATA_RRO_EN; 1151590Srgrimes 1161590Srgrimes IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 117 118 for (i = 0; i < 7; i++) { 119 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 120 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 121 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 122 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 123 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 124 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 129 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 130 } 131 132 IXGBE_WRITE_FLUSH(hw); 133} 134 135/** 136 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 137 * @hw: pointer to hardware structure 138 * 139 * Starts the hardware by filling the bus info structure and media type, clears 140 * all on chip counters, initializes receive address registers, multicast 141 * table, VLAN filter table, calls routine to set up link and flow control 142 * settings, and leaves transmit and receive units disabled and uninitialized 143 **/ 144s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 145{ 146 /* Clear adapter stopped flag */ 147 hw->adapter_stopped = FALSE; 148 149 return IXGBE_SUCCESS; 150} 151 152/** 153 * ixgbe_init_hw_vf - virtual function hardware initialization 154 * @hw: pointer to hardware structure 155 * 156 * Initialize the hardware by resetting the hardware and then starting 157 * the hardware 158 **/ 159s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 160{ 161 s32 status = hw->mac.ops.start_hw(hw); 162 163 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 164 165 return status; 166} 167 168/** 169 * ixgbe_reset_hw_vf - Performs hardware reset 170 * @hw: pointer to hardware structure 171 * 172 * Resets the hardware by reseting the transmit and receive units, masks and 173 * clears all interrupts. 174 **/ 175s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 176{ 177 struct ixgbe_mbx_info *mbx = &hw->mbx; 178 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 179 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 180 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 181 u8 *addr = (u8 *)(&msgbuf[1]); 182 183 DEBUGFUNC("ixgbevf_reset_hw_vf"); 184 185 /* Call adapter stop to disable tx/rx and clear interrupts */ 186 hw->mac.ops.stop_adapter(hw); 187 188 189 DEBUGOUT("Issuing a function level reset to MAC\n"); 190 191 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 192 IXGBE_WRITE_FLUSH(hw); 193 194 msec_delay(50); 195 196 /* we cannot reset while the RSTI / RSTD bits are asserted */ 197 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 198 timeout--; 199 usec_delay(5); 200 } 201 202 if (!timeout) 203 return IXGBE_ERR_RESET_FAILED; 204 205 /* Reset VF registers to initial values */ 206 ixgbe_virt_clr_reg(hw); 207 208 /* mailbox timeout can now become active */ 209 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 210 211 msgbuf[0] = IXGBE_VF_RESET; 212 mbx->ops.write_posted(hw, msgbuf, 1, 0); 213 214 msec_delay(10); 215 216 /* 217 * set our "perm_addr" based on info provided by PF 218 * also set up the mc_filter_type which is piggy backed 219 * on the mac address in word 3 220 */ 221 ret_val = mbx->ops.read_posted(hw, msgbuf, 222 IXGBE_VF_PERMADDR_MSG_LEN, 0); 223 if (ret_val) 224 return ret_val; 225 226 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 227 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 228 return IXGBE_ERR_INVALID_MAC_ADDR; 229 230 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 231 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 232 233 return ret_val; 234} 235 236/** 237 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 238 * @hw: pointer to hardware structure 239 * 240 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 241 * disables transmit and receive units. The adapter_stopped flag is used by 242 * the shared code and drivers to determine if the adapter is in a stopped 243 * state and should not touch the hardware. 244 **/ 245s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 246{ 247 u32 reg_val; 248 u16 i; 249 250 /* 251 * Set the adapter_stopped flag so other driver functions stop touching 252 * the hardware 253 */ 254 hw->adapter_stopped = TRUE; 255 256 /* Clear interrupt mask to stop from interrupts being generated */ 257 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 258 259 /* Clear any pending interrupts, flush previous writes */ 260 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 261 262 /* Disable the transmit unit. Each queue must be disabled. */ 263 for (i = 0; i < hw->mac.max_tx_queues; i++) 264 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 265 266 /* Disable the receive unit by stopping each queue */ 267 for (i = 0; i < hw->mac.max_rx_queues; i++) { 268 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 269 reg_val &= ~IXGBE_RXDCTL_ENABLE; 270 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 271 } 272 /* Clear packet split and pool config */ 273 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 274 275 /* flush all queues disables */ 276 IXGBE_WRITE_FLUSH(hw); 277 msec_delay(2); 278 279 return IXGBE_SUCCESS; 280} 281 282/** 283 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 284 * @hw: pointer to hardware structure 285 * @mc_addr: the multicast address 286 * 287 * Extracts the 12 bits, from a multicast address, to determine which 288 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 289 * incoming rx multicast addresses, to determine the bit-vector to check in 290 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 291 * by the MO field of the MCSTCTRL. The MO field is set during initialization 292 * to mc_filter_type. 293 **/ 294static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 295{ 296 u32 vector = 0; 297 298 switch (hw->mac.mc_filter_type) { 299 case 0: /* use bits [47:36] of the address */ 300 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 301 break; 302 case 1: /* use bits [46:35] of the address */ 303 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 304 break; 305 case 2: /* use bits [45:34] of the address */ 306 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 307 break; 308 case 3: /* use bits [43:32] of the address */ 309 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 310 break; 311 default: /* Invalid mc_filter_type */ 312 DEBUGOUT("MC filter type param set incorrectly\n"); 313 ASSERT(0); 314 break; 315 } 316 317 /* vector can only be 12-bits or boundary will be exceeded */ 318 vector &= 0xFFF; 319 return vector; 320} 321 322static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, 323 u32 *msg, u16 size) 324{ 325 struct ixgbe_mbx_info *mbx = &hw->mbx; 326 u32 retmsg[IXGBE_VFMAILBOX_SIZE]; 327 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 328 329 if (!retval) 330 mbx->ops.read_posted(hw, retmsg, size, 0); 331} 332 333/** 334 * ixgbe_set_rar_vf - set device MAC address 335 * @hw: pointer to hardware structure 336 * @index: Receive address register to write 337 * @addr: Address to put into receive address register 338 * @vmdq: VMDq "set" or "pool" index 339 * @enable_addr: set flag that address is active 340 **/ 341s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 342 u32 enable_addr) 343{ 344 struct ixgbe_mbx_info *mbx = &hw->mbx; 345 u32 msgbuf[3]; 346 u8 *msg_addr = (u8 *)(&msgbuf[1]); 347 s32 ret_val; 348 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 349 350 memset(msgbuf, 0, 12); 351 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 352 memcpy(msg_addr, addr, 6); 353 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 354 355 if (!ret_val) 356 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 357 358 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 359 360 /* if nacked the address was rejected, use "perm_addr" */ 361 if (!ret_val && 362 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) 363 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 364 365 return ret_val; 366} 367 368/** 369 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 370 * @hw: pointer to the HW structure 371 * @mc_addr_list: array of multicast addresses to program 372 * @mc_addr_count: number of multicast addresses to program 373 * @next: caller supplied function to return next address in list 374 * 375 * Updates the Multicast Table Array. 376 **/ 377s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 378 u32 mc_addr_count, ixgbe_mc_addr_itr next, 379 bool clear) 380{ 381 struct ixgbe_mbx_info *mbx = &hw->mbx; 382 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 383 u16 *vector_list = (u16 *)&msgbuf[1]; 384 u32 vector; 385 u32 cnt, i; 386 u32 vmdq; 387 388 UNREFERENCED_1PARAMETER(clear); 389 390 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 391 392 /* Each entry in the list uses 1 16 bit word. We have 30 393 * 16 bit words available in our HW msg buffer (minus 1 for the 394 * msg type). That's 30 hash values if we pack 'em right. If 395 * there are more than 30 MC addresses to add then punt the 396 * extras for now and then add code to handle more than 30 later. 397 * It would be unusual for a server to request that many multi-cast 398 * addresses except for in large enterprise network environments. 399 */ 400 401 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 402 403 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 404 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 405 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 406 407 for (i = 0; i < cnt; i++) { 408 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 409 DEBUGOUT1("Hash value = 0x%03X\n", vector); 410 vector_list[i] = (u16)vector; 411 } 412 413 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 414} 415 416/** 417 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 418 * @hw: pointer to the HW structure 419 * @vlan: 12 bit VLAN ID 420 * @vind: unused by VF drivers 421 * @vlan_on: if TRUE then set bit, else clear bit 422 **/ 423s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 424{ 425 struct ixgbe_mbx_info *mbx = &hw->mbx; 426 u32 msgbuf[2]; 427 s32 ret_val; 428 UNREFERENCED_1PARAMETER(vind); 429 430 msgbuf[0] = IXGBE_VF_SET_VLAN; 431 msgbuf[1] = vlan; 432 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 433 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 434 435 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0); 436 if (!ret_val) 437 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0); 438 439 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 440 return IXGBE_SUCCESS; 441 442 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 443} 444 445/** 446 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 447 * @hw: pointer to hardware structure 448 * 449 * Returns the number of transmit queues for the given adapter. 450 **/ 451u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 452{ 453 UNREFERENCED_1PARAMETER(hw); 454 return IXGBE_VF_MAX_TX_QUEUES; 455} 456 457/** 458 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 459 * @hw: pointer to hardware structure 460 * 461 * Returns the number of receive queues for the given adapter. 462 **/ 463u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 464{ 465 UNREFERENCED_1PARAMETER(hw); 466 return IXGBE_VF_MAX_RX_QUEUES; 467} 468 469/** 470 * ixgbe_get_mac_addr_vf - Read device MAC address 471 * @hw: pointer to the HW structure 472 **/ 473s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 474{ 475 int i; 476 477 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 478 mac_addr[i] = hw->mac.perm_addr[i]; 479 480 return IXGBE_SUCCESS; 481} 482 483s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 484{ 485 struct ixgbe_mbx_info *mbx = &hw->mbx; 486 u32 msgbuf[3]; 487 u8 *msg_addr = (u8 *)(&msgbuf[1]); 488 s32 ret_val; 489 490 memset(msgbuf, 0, sizeof(msgbuf)); 491 /* 492 * If index is one then this is the start of a new list and needs 493 * indication to the PF so it can do it's own list management. 494 * If it is zero then that tells the PF to just clear all of 495 * this VF's macvlans and there is no new list. 496 */ 497 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 498 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 499 if (addr) 500 memcpy(msg_addr, addr, 6); 501 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 502 503 if (!ret_val) 504 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 505 506 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 507 508 if (!ret_val) 509 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK)) 510 ret_val = IXGBE_ERR_OUT_OF_MEM; 511 512 return ret_val; 513} 514 515/** 516 * ixgbe_setup_mac_link_vf - Setup MAC link settings 517 * @hw: pointer to hardware structure 518 * @speed: new link speed 519 * @autoneg: TRUE if autonegotiation enabled 520 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 521 * 522 * Set the link speed in the AUTOC register and restarts link. 523 **/ 524s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 525 bool autoneg_wait_to_complete) 526{ 527 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 528 return IXGBE_SUCCESS; 529} 530 531/** 532 * ixgbe_check_mac_link_vf - Get link/speed status 533 * @hw: pointer to hardware structure 534 * @speed: pointer to link speed 535 * @link_up: TRUE is link is up, FALSE otherwise 536 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 537 * 538 * Reads the links register to determine if link is up and the current speed 539 **/ 540s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 541 bool *link_up, bool autoneg_wait_to_complete) 542{ 543 struct ixgbe_mbx_info *mbx = &hw->mbx; 544 struct ixgbe_mac_info *mac = &hw->mac; 545 s32 ret_val = IXGBE_SUCCESS; 546 u32 links_reg; 547 u32 in_msg = 0; 548 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 549 550 /* If we were hit with a reset drop the link */ 551 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 552 mac->get_link_status = TRUE; 553 554 if (!mac->get_link_status) 555 goto out; 556 557 /* if link status is down no point in checking to see if pf is up */ 558 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 559 if (!(links_reg & IXGBE_LINKS_UP)) 560 goto out; 561 562 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 563 * before the link status is correct 564 */ 565 if (mac->type == ixgbe_mac_82599_vf) { 566 int i; 567 568 for (i = 0; i < 5; i++) { 569 usec_delay(100); 570 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 571 572 if (!(links_reg & IXGBE_LINKS_UP)) 573 goto out; 574 } 575 } 576 577 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 578 case IXGBE_LINKS_SPEED_10G_82599: 579 *speed = IXGBE_LINK_SPEED_10GB_FULL; 580 break; 581 case IXGBE_LINKS_SPEED_1G_82599: 582 *speed = IXGBE_LINK_SPEED_1GB_FULL; 583 break; 584 case IXGBE_LINKS_SPEED_100_82599: 585 *speed = IXGBE_LINK_SPEED_100_FULL; 586 break; 587 } 588 589 /* if the read failed it could just be a mailbox collision, best wait 590 * until we are called again and don't report an error 591 */ 592 if (mbx->ops.read(hw, &in_msg, 1, 0)) 593 goto out; 594 595 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 596 /* msg is not CTS and is NACK we must have lost CTS status */ 597 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 598 ret_val = -1; 599 goto out; 600 } 601 602 /* the pf is talking, if we timed out in the past we reinit */ 603 if (!mbx->timeout) { 604 ret_val = -1; 605 goto out; 606 } 607 608 /* if we passed all the tests above then the link is up and we no 609 * longer need to check for link 610 */ 611 mac->get_link_status = FALSE; 612 613out: 614 *link_up = !mac->get_link_status; 615 return ret_val; 616} 617 618/** 619 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 620 * @hw: pointer to the HW structure 621 * @max_size: value to assign to max frame size 622 **/ 623void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 624{ 625 u32 msgbuf[2]; 626 627 msgbuf[0] = IXGBE_VF_SET_LPE; 628 msgbuf[1] = max_size; 629 ixgbevf_write_msg_read_ack(hw, msgbuf, 2); 630} 631 632/** 633 * ixgbevf_negotiate_api_version - Negotiate supported API version 634 * @hw: pointer to the HW structure 635 * @api: integer containing requested API version 636 **/ 637int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 638{ 639 int err; 640 u32 msg[3]; 641 642 /* Negotiate the mailbox API version */ 643 msg[0] = IXGBE_VF_API_NEGOTIATE; 644 msg[1] = api; 645 msg[2] = 0; 646 err = hw->mbx.ops.write_posted(hw, msg, 3, 0); 647 648 if (!err) 649 err = hw->mbx.ops.read_posted(hw, msg, 3, 0); 650 651 if (!err) { 652 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 653 654 /* Store value and return 0 on success */ 655 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 656 hw->api_version = api; 657 return 0; 658 } 659 660 err = IXGBE_ERR_INVALID_ARGUMENT; 661 } 662 663 return err; 664} 665 666int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 667 unsigned int *default_tc) 668{ 669 UNREFERENCED_3PARAMETER(hw, num_tcs, default_tc); 670 return IXGBE_SUCCESS; 671} 672