1/*- 2 * Copyright (c) 2012 Yusuke Tanaka 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/*- 28 * Copyright (c) 2011 Frank Wille. 29 * All rights reserved. 30 * 31 * Written by Frank Wille for The NetBSD Project. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 43 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 44 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 45 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 46 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 47 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 48 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 49 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 50 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 51 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 52 * POSSIBILITY OF SUCH DAMAGE. 53 */ 54 55#include <sys/cdefs.h> 56__FBSDID("$FreeBSD: releng/10.3/sys/dev/iicbus/s35390a.c 241048 2012-09-29 16:15:27Z kevlo $"); 57 58/* 59 * Driver for Seiko Instruments S-35390A Real-time Clock 60 */ 61 62#include <sys/param.h> 63#include <sys/systm.h> 64#include <sys/bus.h> 65#include <sys/clock.h> 66#include <sys/kernel.h> 67#include <sys/module.h> 68 69#include <dev/iicbus/iicbus.h> 70#include <dev/iicbus/iiconf.h> 71 72#include "clock_if.h" 73#include "iicbus_if.h" 74 75#define S390_DEVNAME "s35390a_rtc" 76#define S390_DEVCODE 0x6 /* 0110 */ 77/* 78 * S-35390A uses 4-bit device code + 3-bit command in the slave address 79 * field. The possible combination is 0x60-0x6f including the R/W bit. 80 * 0x60 means an write access to status register 1. 81 */ 82#define S390_ADDR (S390_DEVCODE << 4) 83 84/* Registers are encoded into the slave address */ 85#define S390_STATUS1 (0 << 1) 86#define S390_STATUS2 (1 << 1) 87#define S390_REALTIME1 (2 << 1) 88#define S390_REALTIME2 (3 << 1) 89#define S390_INT1_1 (4 << 1) 90#define S390_INT1_2 (5 << 1) 91#define S390_CLOCKADJ (6 << 1) 92#define S390_FREE (7 << 1) 93 94/* Status1 bits */ 95#define S390_ST1_POC (1 << 7) 96#define S390_ST1_BLD (1 << 6) 97#define S390_ST1_24H (1 << 1) 98#define S390_ST1_RESET (1 << 0) 99 100/* Status2 bits */ 101#define S390_ST2_TEST (1 << 7) 102 103/* Realtime1 data bytes */ 104#define S390_RT1_NBYTES 7 105#define S390_RT1_YEAR 0 106#define S390_RT1_MONTH 1 107#define S390_RT1_DAY 2 108#define S390_RT1_WDAY 3 109#define S390_RT1_HOUR 4 110#define S390_RT1_MINUTE 5 111#define S390_RT1_SECOND 6 112 113struct s390rtc_softc { 114 device_t sc_dev; 115 uint16_t sc_addr; 116}; 117 118/* 119 * S-35390A interprets bits in each byte on SDA in reverse order. 120 * bitreverse() reverses the bits in uint8_t. 121 */ 122static const uint8_t nibbletab[] = { 123 /* 0x0 0000 -> 0000 */ 0x0, 124 /* 0x1 0001 -> 1000 */ 0x8, 125 /* 0x2 0010 -> 0100 */ 0x4, 126 /* 0x3 0011 -> 1100 */ 0xc, 127 /* 0x4 0100 -> 0010 */ 0x2, 128 /* 0x5 0101 -> 1010 */ 0xa, 129 /* 0x6 0110 -> 0110 */ 0x6, 130 /* 0x7 0111 -> 1110 */ 0xe, 131 /* 0x8 1000 -> 0001 */ 0x1, 132 /* 0x9 1001 -> 1001 */ 0x9, 133 /* 0xa 1010 -> 0101 */ 0x5, 134 /* 0xb 1011 -> 1101 */ 0xd, 135 /* 0xc 1100 -> 0011 */ 0x3, 136 /* 0xd 1101 -> 1011 */ 0xb, 137 /* 0xe 1110 -> 0111 */ 0x7, 138 /* 0xf 1111 -> 1111 */ 0xf, }; 139 140static uint8_t 141bitreverse(uint8_t x) 142{ 143 144 return (nibbletab[x & 0xf] << 4) | nibbletab[x >> 4]; 145} 146 147static int 148s390rtc_read(device_t dev, uint8_t reg, uint8_t *buf, size_t len) 149{ 150 struct s390rtc_softc *sc = device_get_softc(dev); 151 struct iic_msg msg[] = { 152 { 153 .slave = sc->sc_addr | reg, 154 .flags = IIC_M_RD, 155 .len = len, 156 .buf = buf, 157 }, 158 }; 159 int i; 160 int error; 161 162 error = iicbus_transfer(dev, msg, 1); 163 if (error) 164 return (error); 165 166 /* this chip returns each byte in reverse order */ 167 for (i = 0; i < len; ++i) 168 buf[i] = bitreverse(buf[i]); 169 170 return (0); 171} 172 173static int 174s390rtc_write(device_t dev, uint8_t reg, uint8_t *buf, size_t len) 175{ 176 struct s390rtc_softc *sc = device_get_softc(dev); 177 struct iic_msg msg[] = { 178 { 179 .slave = sc->sc_addr | reg, 180 .flags = IIC_M_WR, 181 .len = len, 182 .buf = buf, 183 }, 184 }; 185 int i; 186 187 /* this chip expects each byte in reverse order */ 188 for (i = 0; i < len; ++i) 189 buf[i] = bitreverse(buf[i]); 190 191 return (iicbus_transfer(dev, msg, 1)); 192} 193 194static int 195s390rtc_probe(device_t dev) 196{ 197 198 if (iicbus_get_addr(dev) != S390_ADDR) { 199 if (bootverbose) 200 device_printf(dev, "slave address mismatch. " 201 "(%02x != %02x)\n", iicbus_get_addr(dev), 202 S390_ADDR); 203 return (ENXIO); 204 } 205 device_set_desc(dev, "Seiko Instruments S-35390A Real-time Clock"); 206 207 return (BUS_PROBE_SPECIFIC); 208} 209 210static int 211s390rtc_attach(device_t dev) 212{ 213 struct s390rtc_softc *sc; 214 uint8_t reg; 215 int error; 216 217 sc = device_get_softc(dev); 218 sc->sc_dev = dev; 219 sc->sc_addr = iicbus_get_addr(dev); 220 221 /* Reset the chip and turn on 24h mode, after power-off or battery. */ 222 error = s390rtc_read(dev, S390_STATUS1, ®, 1); 223 if (error) { 224 device_printf(dev, "%s: cannot read status1 register\n", 225 __func__); 226 return (error); 227 } 228 if (reg & (S390_ST1_POC | S390_ST1_BLD)) { 229 reg |= S390_ST1_24H | S390_ST1_RESET; 230 error = s390rtc_write(dev, S390_STATUS1, ®, 1); 231 if (error) { 232 device_printf(dev, "%s: cannot initialize\n", __func__); 233 return (error); 234 } 235 } 236 237 /* Disable the test mode, when enabled. */ 238 error = s390rtc_read(dev, S390_STATUS2, ®, 1); 239 if (error) { 240 device_printf(dev, "%s: cannot read status2 register\n", 241 __func__); 242 return (error); 243 } 244 if (reg & S390_ST2_TEST) { 245 reg &= ~S390_ST2_TEST; 246 error = s390rtc_write(dev, S390_STATUS2, ®, 1); 247 if (error) { 248 device_printf(dev, 249 "%s: cannot disable the test mode\n", __func__); 250 return (error); 251 } 252 } 253 254 clock_register(dev, 1000000); /* 1 second resolution */ 255 return (0); 256} 257 258static int 259s390rtc_gettime(device_t dev, struct timespec *ts) 260{ 261 uint8_t bcd[S390_RT1_NBYTES]; 262 struct clocktime ct; 263 int error; 264 265 error = s390rtc_read(dev, S390_REALTIME1, bcd, S390_RT1_NBYTES); 266 if (error) { 267 device_printf(dev, "%s: cannot read realtime1 register\n", 268 __func__); 269 return (error); 270 } 271 272 /* 273 * Convert the register values into something useable. 274 */ 275 ct.nsec = 0; 276 ct.sec = FROMBCD(bcd[S390_RT1_SECOND]); 277 ct.min = FROMBCD(bcd[S390_RT1_MINUTE]); 278 ct.hour = FROMBCD(bcd[S390_RT1_HOUR] & 0x3f); 279 ct.day = FROMBCD(bcd[S390_RT1_DAY]); 280 ct.dow = bcd[S390_RT1_WDAY] & 0x07; 281 ct.mon = FROMBCD(bcd[S390_RT1_MONTH]); 282 ct.year = FROMBCD(bcd[S390_RT1_YEAR]) + 2000; 283 284 return (clock_ct_to_ts(&ct, ts)); 285} 286 287static int 288s390rtc_settime(device_t dev, struct timespec *ts) 289{ 290 uint8_t bcd[S390_RT1_NBYTES]; 291 struct clocktime ct; 292 293 clock_ts_to_ct(ts, &ct); 294 295 /* 296 * Convert our time representation into something the S-xx390 297 * can understand. 298 */ 299 bcd[S390_RT1_SECOND] = TOBCD(ct.sec); 300 bcd[S390_RT1_MINUTE] = TOBCD(ct.min); 301 bcd[S390_RT1_HOUR] = TOBCD(ct.hour); 302 bcd[S390_RT1_DAY] = TOBCD(ct.day); 303 bcd[S390_RT1_WDAY] = ct.dow; 304 bcd[S390_RT1_MONTH] = TOBCD(ct.mon); 305 bcd[S390_RT1_YEAR] = TOBCD(ct.year % 100); 306 307 return (s390rtc_write(dev, S390_REALTIME1, bcd, S390_RT1_NBYTES)); 308} 309 310static device_method_t s390rtc_methods[] = { 311 DEVMETHOD(device_probe, s390rtc_probe), 312 DEVMETHOD(device_attach, s390rtc_attach), 313 314 DEVMETHOD(clock_gettime, s390rtc_gettime), 315 DEVMETHOD(clock_settime, s390rtc_settime), 316 317 DEVMETHOD_END 318}; 319 320static driver_t s390rtc_driver = { 321 S390_DEVNAME, 322 s390rtc_methods, 323 sizeof(struct s390rtc_softc), 324}; 325static devclass_t s390rtc_devclass; 326 327DRIVER_MODULE(s35390a, iicbus, s390rtc_driver, s390rtc_devclass, NULL, NULL); 328MODULE_VERSION(s35390a, 1); 329MODULE_DEPEND(s35390a, iicbus, 1, 1, 1); 330