1235783Skib/*
2235783Skib * Copyright 2006 Dave Airlie <airlied@linux.ie>
3235783Skib * Copyright �� 2006-2007 Intel Corporation
4235783Skib *   Jesse Barnes <jesse.barnes@intel.com>
5235783Skib *
6235783Skib * Permission is hereby granted, free of charge, to any person obtaining a
7235783Skib * copy of this software and associated documentation files (the "Software"),
8235783Skib * to deal in the Software without restriction, including without limitation
9235783Skib * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10235783Skib * and/or sell copies of the Software, and to permit persons to whom the
11235783Skib * Software is furnished to do so, subject to the following conditions:
12235783Skib *
13235783Skib * The above copyright notice and this permission notice (including the next
14235783Skib * paragraph) shall be included in all copies or substantial portions of the
15235783Skib * Software.
16235783Skib *
17235783Skib * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18235783Skib * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19235783Skib * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
20235783Skib * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21235783Skib * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22235783Skib * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23235783Skib * DEALINGS IN THE SOFTWARE.
24235783Skib *
25235783Skib * Authors:
26235783Skib *	Eric Anholt <eric@anholt.net>
27235783Skib */
28235783Skib
29235783Skib#include <sys/cdefs.h>
30235783Skib__FBSDID("$FreeBSD: releng/10.3/sys/dev/drm2/i915/intel_sdvo.c 282199 2015-04-28 19:35:05Z dumbbell $");
31235783Skib
32235783Skib#include <dev/drm2/drmP.h>
33235783Skib#include <dev/drm2/drm.h>
34235783Skib#include <dev/drm2/drm_crtc.h>
35235783Skib#include <dev/drm2/drm_edid.h>
36235783Skib#include <dev/drm2/i915/i915_drm.h>
37235783Skib#include <dev/drm2/i915/i915_drv.h>
38235783Skib#include <dev/drm2/i915/intel_sdvo_regs.h>
39235783Skib#include <dev/drm2/i915/intel_drv.h>
40235783Skib#include <dev/iicbus/iic.h>
41235783Skib#include <dev/iicbus/iiconf.h>
42235783Skib#include "iicbus_if.h"
43235783Skib
44235783Skib#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
45235783Skib#define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
46235783Skib#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
47280369Skib#define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
48235783Skib
49235783Skib#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
50235783Skib			SDVO_TV_MASK)
51235783Skib
52235783Skib#define IS_TV(c)	(c->output_flag & SDVO_TV_MASK)
53235783Skib#define IS_TMDS(c)	(c->output_flag & SDVO_TMDS_MASK)
54235783Skib#define IS_LVDS(c)	(c->output_flag & SDVO_LVDS_MASK)
55235783Skib#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
56235783Skib#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
57235783Skib
58235783Skib
59235783Skibstatic const char *tv_format_names[] = {
60235783Skib	"NTSC_M"   , "NTSC_J"  , "NTSC_443",
61235783Skib	"PAL_B"    , "PAL_D"   , "PAL_G"   ,
62235783Skib	"PAL_H"    , "PAL_I"   , "PAL_M"   ,
63235783Skib	"PAL_N"    , "PAL_NC"  , "PAL_60"  ,
64235783Skib	"SECAM_B"  , "SECAM_D" , "SECAM_G" ,
65235783Skib	"SECAM_K"  , "SECAM_K1", "SECAM_L" ,
66235783Skib	"SECAM_60"
67235783Skib};
68235783Skib
69235783Skib#define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
70235783Skib
71235783Skibstruct intel_sdvo {
72235783Skib	struct intel_encoder base;
73235783Skib
74235783Skib	device_t i2c;
75235783Skib	u8 slave_addr;
76235783Skib
77235783Skib	device_t ddc_iic_bus, ddc;
78235783Skib
79235783Skib	/* Register for the SDVO device: SDVOB or SDVOC */
80280369Skib	uint32_t sdvo_reg;
81235783Skib
82235783Skib	/* Active outputs controlled by this SDVO output */
83235783Skib	uint16_t controlled_output;
84235783Skib
85235783Skib	/*
86235783Skib	 * Capabilities of the SDVO device returned by
87235783Skib	 * i830_sdvo_get_capabilities()
88235783Skib	 */
89235783Skib	struct intel_sdvo_caps caps;
90235783Skib
91235783Skib	/* Pixel clock limitations reported by the SDVO device, in kHz */
92235783Skib	int pixel_clock_min, pixel_clock_max;
93235783Skib
94235783Skib	/*
95235783Skib	* For multiple function SDVO device,
96235783Skib	* this is for current attached outputs.
97235783Skib	*/
98235783Skib	uint16_t attached_output;
99235783Skib
100235783Skib	/*
101235783Skib	 * Hotplug activation bits for this device
102235783Skib	 */
103235783Skib	uint8_t hotplug_active[2];
104235783Skib
105235783Skib	/**
106235783Skib	 * This is used to select the color range of RBG outputs in HDMI mode.
107235783Skib	 * It is only valid when using TMDS encoding and 8 bit per color mode.
108235783Skib	 */
109235783Skib	uint32_t color_range;
110235783Skib
111235783Skib	/**
112235783Skib	 * This is set if we're going to treat the device as TV-out.
113235783Skib	 *
114235783Skib	 * While we have these nice friendly flags for output types that ought
115235783Skib	 * to decide this for us, the S-Video output on our HDMI+S-Video card
116235783Skib	 * shows up as RGB1 (VGA).
117235783Skib	 */
118235783Skib	bool is_tv;
119235783Skib
120280369Skib	/* On different gens SDVOB is at different places. */
121280369Skib	bool is_sdvob;
122280369Skib
123235783Skib	/* This is for current tv format name */
124235783Skib	int tv_format_index;
125235783Skib
126235783Skib	/**
127235783Skib	 * This is set if we treat the device as HDMI, instead of DVI.
128235783Skib	 */
129235783Skib	bool is_hdmi;
130235783Skib	bool has_hdmi_monitor;
131235783Skib	bool has_hdmi_audio;
132235783Skib
133235783Skib	/**
134235783Skib	 * This is set if we detect output of sdvo device as LVDS and
135235783Skib	 * have a valid fixed mode to use with the panel.
136235783Skib	 */
137235783Skib	bool is_lvds;
138235783Skib
139235783Skib	/**
140235783Skib	 * This is sdvo fixed pannel mode pointer
141235783Skib	 */
142235783Skib	struct drm_display_mode *sdvo_lvds_fixed_mode;
143235783Skib
144235783Skib	/* DDC bus used by this SDVO encoder */
145235783Skib	uint8_t ddc_bus;
146235783Skib
147235783Skib	/* Input timings for adjusted_mode */
148235783Skib	struct intel_sdvo_dtd input_dtd;
149235783Skib};
150235783Skib
151235783Skibstruct intel_sdvo_connector {
152235783Skib	struct intel_connector base;
153235783Skib
154235783Skib	/* Mark the type of connector */
155235783Skib	uint16_t output_flag;
156235783Skib
157235783Skib	enum hdmi_force_audio force_audio;
158235783Skib
159235783Skib	/* This contains all current supported TV format */
160235783Skib	u8 tv_format_supported[TV_FORMAT_NUM];
161235783Skib	int   format_supported_num;
162235783Skib	struct drm_property *tv_format;
163235783Skib
164235783Skib	/* add the property for the SDVO-TV */
165235783Skib	struct drm_property *left;
166235783Skib	struct drm_property *right;
167235783Skib	struct drm_property *top;
168235783Skib	struct drm_property *bottom;
169235783Skib	struct drm_property *hpos;
170235783Skib	struct drm_property *vpos;
171235783Skib	struct drm_property *contrast;
172235783Skib	struct drm_property *saturation;
173235783Skib	struct drm_property *hue;
174235783Skib	struct drm_property *sharpness;
175235783Skib	struct drm_property *flicker_filter;
176235783Skib	struct drm_property *flicker_filter_adaptive;
177235783Skib	struct drm_property *flicker_filter_2d;
178235783Skib	struct drm_property *tv_chroma_filter;
179235783Skib	struct drm_property *tv_luma_filter;
180235783Skib	struct drm_property *dot_crawl;
181235783Skib
182235783Skib	/* add the property for the SDVO-TV/LVDS */
183235783Skib	struct drm_property *brightness;
184235783Skib
185235783Skib	/* Add variable to record current setting for the above property */
186235783Skib	u32	left_margin, right_margin, top_margin, bottom_margin;
187235783Skib
188235783Skib	/* this is to get the range of margin.*/
189235783Skib	u32	max_hscan,  max_vscan;
190235783Skib	u32	max_hpos, cur_hpos;
191235783Skib	u32	max_vpos, cur_vpos;
192235783Skib	u32	cur_brightness, max_brightness;
193235783Skib	u32	cur_contrast,	max_contrast;
194235783Skib	u32	cur_saturation, max_saturation;
195235783Skib	u32	cur_hue,	max_hue;
196235783Skib	u32	cur_sharpness,	max_sharpness;
197235783Skib	u32	cur_flicker_filter,		max_flicker_filter;
198235783Skib	u32	cur_flicker_filter_adaptive,	max_flicker_filter_adaptive;
199235783Skib	u32	cur_flicker_filter_2d,		max_flicker_filter_2d;
200235783Skib	u32	cur_tv_chroma_filter,	max_tv_chroma_filter;
201235783Skib	u32	cur_tv_luma_filter,	max_tv_luma_filter;
202235783Skib	u32	cur_dot_crawl,	max_dot_crawl;
203235783Skib};
204235783Skib
205235783Skibstatic struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
206235783Skib{
207235783Skib	return container_of(encoder, struct intel_sdvo, base.base);
208235783Skib}
209235783Skib
210235783Skibstatic struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
211235783Skib{
212235783Skib	return container_of(intel_attached_encoder(connector),
213235783Skib			    struct intel_sdvo, base);
214235783Skib}
215235783Skib
216235783Skibstatic struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
217235783Skib{
218235783Skib	return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
219235783Skib}
220235783Skib
221235783Skibstatic bool
222235783Skibintel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
223235783Skibstatic bool
224235783Skibintel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
225235783Skib			      struct intel_sdvo_connector *intel_sdvo_connector,
226235783Skib			      int type);
227235783Skibstatic bool
228235783Skibintel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
229235783Skib				   struct intel_sdvo_connector *intel_sdvo_connector);
230235783Skib
231235783Skib/**
232235783Skib * Writes the SDVOB or SDVOC with the given value, but always writes both
233235783Skib * SDVOB and SDVOC to work around apparent hardware issues (according to
234235783Skib * comments in the BIOS).
235235783Skib */
236235783Skibstatic void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
237235783Skib{
238235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
239235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
240235783Skib	u32 bval = val, cval = val;
241235783Skib	int i;
242235783Skib
243235783Skib	if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
244235783Skib		I915_WRITE(intel_sdvo->sdvo_reg, val);
245235783Skib		I915_READ(intel_sdvo->sdvo_reg);
246235783Skib		return;
247235783Skib	}
248235783Skib
249235783Skib	if (intel_sdvo->sdvo_reg == SDVOB) {
250235783Skib		cval = I915_READ(SDVOC);
251235783Skib	} else {
252235783Skib		bval = I915_READ(SDVOB);
253235783Skib	}
254235783Skib	/*
255235783Skib	 * Write the registers twice for luck. Sometimes,
256235783Skib	 * writing them only once doesn't appear to 'stick'.
257235783Skib	 * The BIOS does this too. Yay, magic
258235783Skib	 */
259235783Skib	for (i = 0; i < 2; i++)
260235783Skib	{
261235783Skib		I915_WRITE(SDVOB, bval);
262235783Skib		I915_READ(SDVOB);
263235783Skib		I915_WRITE(SDVOC, cval);
264235783Skib		I915_READ(SDVOC);
265235783Skib	}
266235783Skib}
267235783Skib
268235783Skibstatic bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
269235783Skib{
270235783Skib	struct iic_msg msgs[] = {
271235783Skib		{
272249041Sdumbbell			.slave = intel_sdvo->slave_addr << 1,
273235783Skib			.flags = 0,
274235783Skib			.len = 1,
275235783Skib			.buf = &addr,
276235783Skib		},
277235783Skib		{
278249041Sdumbbell			.slave = intel_sdvo->slave_addr << 1,
279235783Skib			.flags = IIC_M_RD,
280235783Skib			.len = 1,
281235783Skib			.buf = ch,
282235783Skib		}
283235783Skib	};
284235783Skib	int ret;
285235783Skib
286235783Skib	if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0)
287235783Skib		return true;
288235783Skib
289235783Skib	DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
290235783Skib	return false;
291235783Skib}
292235783Skib
293235783Skib#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
294235783Skib/** Mapping of command numbers to names, for debug output */
295235783Skibstatic const struct _sdvo_cmd_name {
296235783Skib	u8 cmd;
297235783Skib	const char *name;
298235783Skib} sdvo_cmd_names[] = {
299235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
300235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
301235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
302235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
303235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
304235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
305235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
306235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
307235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
308235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
309235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
310235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
311235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
312235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
313235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
314235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
315235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
316235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
318235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
319235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
320235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
321235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
322235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
323235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
324235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
325235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
326235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
327235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
328235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
329235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
330235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
331235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
332235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
333235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
334235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
335235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
336235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
337235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
338235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
339235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
340235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
341235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
342235783Skib
343235783Skib	/* Add the op code for SDVO enhancements */
344235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
345235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
346235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
347235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
348235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
349235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
350235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
351235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
352235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
353235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
354235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
355235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
356235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
357235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
358235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
359235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
360235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
361235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
362235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
363235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
364235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
365235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
366235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
367235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
368235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
369235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
370235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
371235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
372235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
373235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
374235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
375235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
376235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
377235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
378235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
379235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
380235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
381235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
382235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
383235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
384235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
385235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
386235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
387235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
388235783Skib
389235783Skib	/* HDMI op code */
390235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
391235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
392235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
393235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
394235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
395235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
396235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
397235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
398235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
399235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
400235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
401235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
402235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
403235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
404235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
405235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
406235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
407235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
408235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
409235783Skib	SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
410235783Skib};
411235783Skib
412280369Skib#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
413235783Skib
414280369Skibstatic void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
415280369Skib				   const void *args, int args_len)
416235783Skib{
417235783Skib	int i;
418235783Skib
419282199Sdumbbell	if ((drm_debug & DRM_DEBUGBITS_KMS) == 0)
420235783Skib		return;
421235783Skib	DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd);
422235783Skib	for (i = 0; i < args_len; i++)
423235783Skib		printf("%02X ", ((const u8 *)args)[i]);
424235783Skib	for (; i < 8; i++)
425235783Skib		printf("   ");
426282199Sdumbbell	for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
427235783Skib		if (cmd == sdvo_cmd_names[i].cmd) {
428235783Skib			printf("(%s)", sdvo_cmd_names[i].name);
429235783Skib			break;
430235783Skib		}
431235783Skib	}
432282199Sdumbbell	if (i == ARRAY_SIZE(sdvo_cmd_names))
433235783Skib		printf("(%02X)", cmd);
434235783Skib	printf("\n");
435235783Skib}
436235783Skib
437235783Skibstatic const char *cmd_status_names[] = {
438235783Skib	"Power on",
439235783Skib	"Success",
440235783Skib	"Not supported",
441235783Skib	"Invalid arg",
442235783Skib	"Pending",
443235783Skib	"Target not specified",
444235783Skib	"Scaling not supported"
445235783Skib};
446235783Skib
447235783Skibstatic bool
448235783Skibintel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args,
449235783Skib    int args_len)
450235783Skib{
451235783Skib	u8 buf[args_len*2 + 2], status;
452235783Skib	struct iic_msg msgs[args_len + 3];
453235783Skib	int i, ret;
454235783Skib
455235783Skib	intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
456235783Skib
457235783Skib	for (i = 0; i < args_len; i++) {
458249041Sdumbbell		msgs[i].slave = intel_sdvo->slave_addr << 1;
459235783Skib		msgs[i].flags = 0;
460235783Skib		msgs[i].len = 2;
461235783Skib		msgs[i].buf = buf + 2 *i;
462235783Skib		buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
463235783Skib		buf[2*i + 1] = ((const u8*)args)[i];
464235783Skib	}
465249041Sdumbbell	msgs[i].slave = intel_sdvo->slave_addr << 1;
466235783Skib	msgs[i].flags = 0;
467235783Skib	msgs[i].len = 2;
468235783Skib	msgs[i].buf = buf + 2*i;
469235783Skib	buf[2*i + 0] = SDVO_I2C_OPCODE;
470235783Skib	buf[2*i + 1] = cmd;
471235783Skib
472235783Skib	/* the following two are to read the response */
473235783Skib	status = SDVO_I2C_CMD_STATUS;
474249041Sdumbbell	msgs[i+1].slave = intel_sdvo->slave_addr << 1;
475235783Skib	msgs[i+1].flags = 0;
476235783Skib	msgs[i+1].len = 1;
477235783Skib	msgs[i+1].buf = &status;
478235783Skib
479249041Sdumbbell	msgs[i+2].slave = intel_sdvo->slave_addr << 1;
480235783Skib	msgs[i+2].flags = IIC_M_RD;
481235783Skib	msgs[i+2].len = 1;
482235783Skib	msgs[i+2].buf = &status;
483235783Skib
484235783Skib	ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3);
485235783Skib	if (ret != 0) {
486235783Skib		DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
487235783Skib		return (false);
488235783Skib	}
489235783Skib#if 0
490235783Skib	if (ret != i+3) {
491235783Skib		/* failure in I2C transfer */
492235783Skib		DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
493235783Skib		return false;
494235783Skib	}
495235783Skib#endif
496235783Skib
497235783Skib	return true;
498235783Skib}
499235783Skib
500235783Skibstatic bool
501235783Skibintel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response,
502235783Skib    int response_len)
503235783Skib{
504235783Skib	u8 retry = 5;
505235783Skib	u8 status;
506235783Skib	int i;
507235783Skib
508235783Skib	DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
509235783Skib
510235783Skib	/*
511235783Skib	 * The documentation states that all commands will be
512235783Skib	 * processed within 15��s, and that we need only poll
513235783Skib	 * the status byte a maximum of 3 times in order for the
514235783Skib	 * command to be complete.
515235783Skib	 *
516235783Skib	 * Check 5 times in case the hardware failed to read the docs.
517235783Skib	 */
518235783Skib	if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status))
519235783Skib		goto log_fail;
520235783Skib
521235783Skib	while (status == SDVO_CMD_STATUS_PENDING && retry--) {
522235783Skib		DELAY(15);
523235783Skib		if (!intel_sdvo_read_byte(intel_sdvo,
524235783Skib		    SDVO_I2C_CMD_STATUS, &status))
525235783Skib			goto log_fail;
526235783Skib	}
527235783Skib
528282199Sdumbbell	if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) {
529235783Skib		if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
530235783Skib			printf("(%s)", cmd_status_names[status]);
531235783Skib		else
532235783Skib			printf("(??? %d)", status);
533235783Skib	}
534235783Skib
535235783Skib	if (status != SDVO_CMD_STATUS_SUCCESS)
536235783Skib		goto log_fail;
537235783Skib
538235783Skib	/* Read the command response */
539235783Skib	for (i = 0; i < response_len; i++) {
540235783Skib		if (!intel_sdvo_read_byte(intel_sdvo,
541235783Skib					  SDVO_I2C_RETURN_0 + i,
542235783Skib					  &((u8 *)response)[i]))
543235783Skib			goto log_fail;
544282199Sdumbbell		if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
545235783Skib			printf(" %02X", ((u8 *)response)[i]);
546235783Skib	}
547282199Sdumbbell	if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
548235783Skib		printf("\n");
549235783Skib	return (true);
550235783Skib
551235783Skiblog_fail:
552282199Sdumbbell	if ((drm_debug & DRM_DEBUGBITS_KMS) != 0)
553235783Skib		printf("... failed\n");
554235783Skib	return (false);
555235783Skib}
556235783Skib
557235783Skibstatic int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
558235783Skib{
559235783Skib	if (mode->clock >= 100000)
560235783Skib		return 1;
561235783Skib	else if (mode->clock >= 50000)
562235783Skib		return 2;
563235783Skib	else
564235783Skib		return 4;
565235783Skib}
566235783Skib
567235783Skibstatic bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
568235783Skib					      u8 ddc_bus)
569235783Skib{
570235783Skib	/* This must be the immediately preceding write before the i2c xfer */
571235783Skib	return intel_sdvo_write_cmd(intel_sdvo,
572235783Skib				    SDVO_CMD_SET_CONTROL_BUS_SWITCH,
573235783Skib				    &ddc_bus, 1);
574235783Skib}
575235783Skib
576235783Skibstatic bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
577235783Skib{
578235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
579235783Skib		return false;
580235783Skib
581235783Skib	return intel_sdvo_read_response(intel_sdvo, NULL, 0);
582235783Skib}
583235783Skib
584235783Skibstatic bool
585235783Skibintel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
586235783Skib{
587235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
588235783Skib		return false;
589235783Skib
590235783Skib	return intel_sdvo_read_response(intel_sdvo, value, len);
591235783Skib}
592235783Skib
593235783Skibstatic bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
594235783Skib{
595235783Skib	struct intel_sdvo_set_target_input_args targets = {0};
596235783Skib	return intel_sdvo_set_value(intel_sdvo,
597235783Skib				    SDVO_CMD_SET_TARGET_INPUT,
598235783Skib				    &targets, sizeof(targets));
599235783Skib}
600235783Skib
601235783Skib/**
602235783Skib * Return whether each input is trained.
603235783Skib *
604235783Skib * This function is making an assumption about the layout of the response,
605235783Skib * which should be checked against the docs.
606235783Skib */
607235783Skibstatic bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
608235783Skib{
609235783Skib	struct intel_sdvo_get_trained_inputs_response response;
610235783Skib
611235783Skib	CTASSERT(sizeof(response) == 1);
612235783Skib	if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
613235783Skib				  &response, sizeof(response)))
614235783Skib		return false;
615235783Skib
616235783Skib	*input_1 = response.input0_trained;
617235783Skib	*input_2 = response.input1_trained;
618235783Skib	return true;
619235783Skib}
620235783Skib
621235783Skibstatic bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
622235783Skib					  u16 outputs)
623235783Skib{
624235783Skib	return intel_sdvo_set_value(intel_sdvo,
625235783Skib				    SDVO_CMD_SET_ACTIVE_OUTPUTS,
626235783Skib				    &outputs, sizeof(outputs));
627235783Skib}
628235783Skib
629235783Skibstatic bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
630235783Skib					       int mode)
631235783Skib{
632235783Skib	u8 state = SDVO_ENCODER_STATE_ON;
633235783Skib
634235783Skib	switch (mode) {
635235783Skib	case DRM_MODE_DPMS_ON:
636235783Skib		state = SDVO_ENCODER_STATE_ON;
637235783Skib		break;
638235783Skib	case DRM_MODE_DPMS_STANDBY:
639235783Skib		state = SDVO_ENCODER_STATE_STANDBY;
640235783Skib		break;
641235783Skib	case DRM_MODE_DPMS_SUSPEND:
642235783Skib		state = SDVO_ENCODER_STATE_SUSPEND;
643235783Skib		break;
644235783Skib	case DRM_MODE_DPMS_OFF:
645235783Skib		state = SDVO_ENCODER_STATE_OFF;
646235783Skib		break;
647235783Skib	}
648235783Skib
649235783Skib	return intel_sdvo_set_value(intel_sdvo,
650235783Skib				    SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
651235783Skib}
652235783Skib
653235783Skibstatic bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
654235783Skib						   int *clock_min,
655235783Skib						   int *clock_max)
656235783Skib{
657235783Skib	struct intel_sdvo_pixel_clock_range clocks;
658235783Skib
659235783Skib	CTASSERT(sizeof(clocks) == 4);
660235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
661235783Skib				  SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
662235783Skib				  &clocks, sizeof(clocks)))
663235783Skib		return false;
664235783Skib
665235783Skib	/* Convert the values from units of 10 kHz to kHz. */
666235783Skib	*clock_min = clocks.min * 10;
667235783Skib	*clock_max = clocks.max * 10;
668235783Skib	return true;
669235783Skib}
670235783Skib
671235783Skibstatic bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
672235783Skib					 u16 outputs)
673235783Skib{
674235783Skib	return intel_sdvo_set_value(intel_sdvo,
675235783Skib				    SDVO_CMD_SET_TARGET_OUTPUT,
676235783Skib				    &outputs, sizeof(outputs));
677235783Skib}
678235783Skib
679235783Skibstatic bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
680235783Skib				  struct intel_sdvo_dtd *dtd)
681235783Skib{
682235783Skib	return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
683235783Skib		intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
684235783Skib}
685235783Skib
686235783Skibstatic bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
687235783Skib					 struct intel_sdvo_dtd *dtd)
688235783Skib{
689235783Skib	return intel_sdvo_set_timing(intel_sdvo,
690235783Skib				     SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
691235783Skib}
692235783Skib
693235783Skibstatic bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
694235783Skib					 struct intel_sdvo_dtd *dtd)
695235783Skib{
696235783Skib	return intel_sdvo_set_timing(intel_sdvo,
697235783Skib				     SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
698235783Skib}
699235783Skib
700235783Skibstatic bool
701235783Skibintel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
702235783Skib					 uint16_t clock,
703235783Skib					 uint16_t width,
704235783Skib					 uint16_t height)
705235783Skib{
706235783Skib	struct intel_sdvo_preferred_input_timing_args args;
707235783Skib
708235783Skib	memset(&args, 0, sizeof(args));
709235783Skib	args.clock = clock;
710235783Skib	args.width = width;
711235783Skib	args.height = height;
712235783Skib	args.interlace = 0;
713235783Skib
714235783Skib	if (intel_sdvo->is_lvds &&
715235783Skib	   (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
716235783Skib	    intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
717235783Skib		args.scaled = 1;
718235783Skib
719235783Skib	return intel_sdvo_set_value(intel_sdvo,
720235783Skib				    SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
721235783Skib				    &args, sizeof(args));
722235783Skib}
723235783Skib
724235783Skibstatic bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
725235783Skib						  struct intel_sdvo_dtd *dtd)
726235783Skib{
727235783Skib	CTASSERT(sizeof(dtd->part1) == 8);
728235783Skib	CTASSERT(sizeof(dtd->part2) == 8);
729235783Skib	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
730235783Skib				    &dtd->part1, sizeof(dtd->part1)) &&
731235783Skib		intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
732235783Skib				     &dtd->part2, sizeof(dtd->part2));
733235783Skib}
734235783Skib
735235783Skibstatic bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
736235783Skib{
737235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
738235783Skib}
739235783Skib
740235783Skibstatic void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
741235783Skib					 const struct drm_display_mode *mode)
742235783Skib{
743235783Skib	uint16_t width, height;
744235783Skib	uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
745235783Skib	uint16_t h_sync_offset, v_sync_offset;
746235783Skib	int mode_clock;
747235783Skib
748280369Skib	width = mode->hdisplay;
749280369Skib	height = mode->vdisplay;
750235783Skib
751280369Skib 	/* do some mode translations */
752280369Skib	h_blank_len = mode->htotal - mode->hdisplay;
753280369Skib	h_sync_len = mode->hsync_end - mode->hsync_start;
754235783Skib
755280369Skib	v_blank_len = mode->vtotal - mode->vdisplay;
756280369Skib	v_sync_len = mode->vsync_end - mode->vsync_start;
757235783Skib
758280369Skib	h_sync_offset = mode->hsync_start - mode->hdisplay;
759280369Skib	v_sync_offset = mode->vsync_start - mode->vdisplay;
760235783Skib
761235783Skib	mode_clock = mode->clock;
762235783Skib	mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
763235783Skib	mode_clock /= 10;
764235783Skib	dtd->part1.clock = mode_clock;
765235783Skib
766235783Skib	dtd->part1.h_active = width & 0xff;
767235783Skib	dtd->part1.h_blank = h_blank_len & 0xff;
768235783Skib	dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
769235783Skib		((h_blank_len >> 8) & 0xf);
770235783Skib	dtd->part1.v_active = height & 0xff;
771235783Skib	dtd->part1.v_blank = v_blank_len & 0xff;
772235783Skib	dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
773235783Skib		((v_blank_len >> 8) & 0xf);
774235783Skib
775235783Skib	dtd->part2.h_sync_off = h_sync_offset & 0xff;
776235783Skib	dtd->part2.h_sync_width = h_sync_len & 0xff;
777235783Skib	dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
778235783Skib		(v_sync_len & 0xf);
779235783Skib	dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
780235783Skib		((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
781235783Skib		((v_sync_len & 0x30) >> 4);
782235783Skib
783235783Skib	dtd->part2.dtd_flags = 0x18;
784235783Skib	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
785235783Skib		dtd->part2.dtd_flags |= 0x2;
786235783Skib	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
787235783Skib		dtd->part2.dtd_flags |= 0x4;
788235783Skib
789235783Skib	dtd->part2.sdvo_flags = 0;
790235783Skib	dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
791235783Skib	dtd->part2.reserved = 0;
792235783Skib}
793235783Skib
794235783Skibstatic void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
795235783Skib					 const struct intel_sdvo_dtd *dtd)
796235783Skib{
797235783Skib	mode->hdisplay = dtd->part1.h_active;
798235783Skib	mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
799235783Skib	mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
800235783Skib	mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
801235783Skib	mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
802235783Skib	mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
803235783Skib	mode->htotal = mode->hdisplay + dtd->part1.h_blank;
804235783Skib	mode->htotal += (dtd->part1.h_high & 0xf) << 8;
805235783Skib
806235783Skib	mode->vdisplay = dtd->part1.v_active;
807235783Skib	mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
808235783Skib	mode->vsync_start = mode->vdisplay;
809235783Skib	mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
810235783Skib	mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
811235783Skib	mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
812235783Skib	mode->vsync_end = mode->vsync_start +
813235783Skib		(dtd->part2.v_sync_off_width & 0xf);
814235783Skib	mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
815235783Skib	mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
816235783Skib	mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
817235783Skib
818235783Skib	mode->clock = dtd->part1.clock * 10;
819235783Skib
820235783Skib	mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
821235783Skib	if (dtd->part2.dtd_flags & 0x2)
822235783Skib		mode->flags |= DRM_MODE_FLAG_PHSYNC;
823235783Skib	if (dtd->part2.dtd_flags & 0x4)
824235783Skib		mode->flags |= DRM_MODE_FLAG_PVSYNC;
825235783Skib}
826235783Skib
827235783Skibstatic bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
828235783Skib{
829235783Skib	struct intel_sdvo_encode encode;
830235783Skib
831235783Skib	CTASSERT(sizeof(encode) == 2);
832235783Skib	return intel_sdvo_get_value(intel_sdvo,
833235783Skib				  SDVO_CMD_GET_SUPP_ENCODE,
834235783Skib				  &encode, sizeof(encode));
835235783Skib}
836235783Skib
837235783Skibstatic bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
838235783Skib				  uint8_t mode)
839235783Skib{
840235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
841235783Skib}
842235783Skib
843235783Skibstatic bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
844235783Skib				       uint8_t mode)
845235783Skib{
846235783Skib	return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
847235783Skib}
848235783Skib
849235783Skib#if 0
850235783Skibstatic void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
851235783Skib{
852235783Skib	int i, j;
853235783Skib	uint8_t set_buf_index[2];
854235783Skib	uint8_t av_split;
855235783Skib	uint8_t buf_size;
856235783Skib	uint8_t buf[48];
857235783Skib	uint8_t *pos;
858235783Skib
859235783Skib	intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
860235783Skib
861235783Skib	for (i = 0; i <= av_split; i++) {
862235783Skib		set_buf_index[0] = i; set_buf_index[1] = 0;
863235783Skib		intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
864235783Skib				     set_buf_index, 2);
865235783Skib		intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
866235783Skib		intel_sdvo_read_response(encoder, &buf_size, 1);
867235783Skib
868235783Skib		pos = buf;
869235783Skib		for (j = 0; j <= buf_size; j += 8) {
870235783Skib			intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
871235783Skib					     NULL, 0);
872235783Skib			intel_sdvo_read_response(encoder, pos, 8);
873235783Skib			pos += 8;
874235783Skib		}
875235783Skib	}
876235783Skib}
877235783Skib#endif
878235783Skib
879235783Skibstatic bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
880235783Skib{
881235783Skib	struct dip_infoframe avi_if = {
882235783Skib		.type = DIP_TYPE_AVI,
883235783Skib		.ver = DIP_VERSION_AVI,
884235783Skib		.len = DIP_LEN_AVI,
885235783Skib	};
886235783Skib	uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
887235783Skib	uint8_t set_buf_index[2] = { 1, 0 };
888280369Skib	uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
889280369Skib	uint64_t *data = (uint64_t *)sdvo_data;
890235783Skib	unsigned i;
891235783Skib
892235783Skib	intel_dip_infoframe_csum(&avi_if);
893235783Skib
894280369Skib	/* sdvo spec says that the ecc is handled by the hw, and it looks like
895280369Skib	 * we must not send the ecc field, either. */
896280369Skib	memcpy(sdvo_data, &avi_if, 3);
897280369Skib	sdvo_data[3] = avi_if.checksum;
898280369Skib	memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
899280369Skib
900235783Skib	if (!intel_sdvo_set_value(intel_sdvo,
901235783Skib				  SDVO_CMD_SET_HBUF_INDEX,
902235783Skib				  set_buf_index, 2))
903235783Skib		return false;
904235783Skib
905280369Skib	for (i = 0; i < sizeof(sdvo_data); i += 8) {
906235783Skib		if (!intel_sdvo_set_value(intel_sdvo,
907235783Skib					  SDVO_CMD_SET_HBUF_DATA,
908235783Skib					  data, 8))
909235783Skib			return false;
910235783Skib		data++;
911235783Skib	}
912235783Skib
913235783Skib	return intel_sdvo_set_value(intel_sdvo,
914235783Skib				    SDVO_CMD_SET_HBUF_TXRATE,
915235783Skib				    &tx_rate, 1);
916235783Skib}
917235783Skib
918235783Skibstatic bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
919235783Skib{
920235783Skib	struct intel_sdvo_tv_format format;
921235783Skib	uint32_t format_map;
922235783Skib
923235783Skib	format_map = 1 << intel_sdvo->tv_format_index;
924235783Skib	memset(&format, 0, sizeof(format));
925235783Skib	memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
926235783Skib
927235783Skib	CTASSERT(sizeof(format) == 6);
928235783Skib	return intel_sdvo_set_value(intel_sdvo,
929235783Skib				    SDVO_CMD_SET_TV_FORMAT,
930235783Skib				    &format, sizeof(format));
931235783Skib}
932235783Skib
933235783Skibstatic bool
934235783Skibintel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
935254797Sdumbbell					const struct drm_display_mode *mode)
936235783Skib{
937235783Skib	struct intel_sdvo_dtd output_dtd;
938235783Skib
939235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo,
940235783Skib					  intel_sdvo->attached_output))
941235783Skib		return false;
942235783Skib
943235783Skib	intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
944235783Skib	if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
945235783Skib		return false;
946235783Skib
947235783Skib	return true;
948235783Skib}
949235783Skib
950235783Skibstatic bool
951235783Skibintel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
952254797Sdumbbell					const struct drm_display_mode *mode,
953235783Skib					struct drm_display_mode *adjusted_mode)
954235783Skib{
955235783Skib	/* Reset the input timing to the screen. Assume always input 0. */
956235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
957235783Skib		return false;
958235783Skib
959235783Skib	if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
960235783Skib						      mode->clock / 10,
961235783Skib						      mode->hdisplay,
962235783Skib						      mode->vdisplay))
963235783Skib		return false;
964235783Skib
965235783Skib	if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
966235783Skib						   &intel_sdvo->input_dtd))
967235783Skib		return false;
968235783Skib
969235783Skib	intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
970235783Skib
971235783Skib	return true;
972235783Skib}
973235783Skib
974235783Skibstatic bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
975282199Sdumbbell				  const struct drm_display_mode *mode,
976235783Skib				  struct drm_display_mode *adjusted_mode)
977235783Skib{
978235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
979235783Skib	int multiplier;
980235783Skib
981235783Skib	/* We need to construct preferred input timings based on our
982235783Skib	 * output timings.  To do that, we have to set the output
983235783Skib	 * timings, even though this isn't really the right place in
984235783Skib	 * the sequence to do it. Oh well.
985235783Skib	 */
986235783Skib	if (intel_sdvo->is_tv) {
987235783Skib		if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
988235783Skib			return false;
989235783Skib
990235783Skib		(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
991235783Skib							     mode,
992235783Skib							     adjusted_mode);
993235783Skib	} else if (intel_sdvo->is_lvds) {
994235783Skib		if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
995235783Skib							     intel_sdvo->sdvo_lvds_fixed_mode))
996235783Skib			return false;
997235783Skib
998235783Skib		(void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
999235783Skib							     mode,
1000235783Skib							     adjusted_mode);
1001235783Skib	}
1002235783Skib
1003235783Skib	/* Make the CRTC code factor in the SDVO pixel multiplier.  The
1004235783Skib	 * SDVO device will factor out the multiplier during mode_set.
1005235783Skib	 */
1006235783Skib	multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1007235783Skib	intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1008235783Skib
1009235783Skib	return true;
1010235783Skib}
1011235783Skib
1012235783Skibstatic void intel_sdvo_mode_set(struct drm_encoder *encoder,
1013235783Skib				struct drm_display_mode *mode,
1014235783Skib				struct drm_display_mode *adjusted_mode)
1015235783Skib{
1016235783Skib	struct drm_device *dev = encoder->dev;
1017235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1018235783Skib	struct drm_crtc *crtc = encoder->crtc;
1019235783Skib	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1020235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1021235783Skib	u32 sdvox;
1022235783Skib	struct intel_sdvo_in_out_map in_out;
1023235783Skib	struct intel_sdvo_dtd input_dtd, output_dtd;
1024235783Skib	int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1025235783Skib	int rate;
1026235783Skib
1027235783Skib	if (!mode)
1028235783Skib		return;
1029235783Skib
1030235783Skib	/* First, set the input mapping for the first input to our controlled
1031235783Skib	 * output. This is only correct if we're a single-input device, in
1032235783Skib	 * which case the first input is the output from the appropriate SDVO
1033235783Skib	 * channel on the motherboard.  In a two-input device, the first input
1034235783Skib	 * will be SDVOB and the second SDVOC.
1035235783Skib	 */
1036235783Skib	in_out.in0 = intel_sdvo->attached_output;
1037235783Skib	in_out.in1 = 0;
1038235783Skib
1039235783Skib	intel_sdvo_set_value(intel_sdvo,
1040235783Skib			     SDVO_CMD_SET_IN_OUT_MAP,
1041235783Skib			     &in_out, sizeof(in_out));
1042235783Skib
1043235783Skib	/* Set the output timings to the screen */
1044235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo,
1045235783Skib					  intel_sdvo->attached_output))
1046235783Skib		return;
1047235783Skib
1048235783Skib	/* lvds has a special fixed output timing. */
1049235783Skib	if (intel_sdvo->is_lvds)
1050235783Skib		intel_sdvo_get_dtd_from_mode(&output_dtd,
1051235783Skib					     intel_sdvo->sdvo_lvds_fixed_mode);
1052235783Skib	else
1053235783Skib		intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1054235783Skib	(void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1055235783Skib
1056235783Skib	/* Set the input timing to the screen. Assume always input 0. */
1057235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
1058235783Skib		return;
1059235783Skib
1060235783Skib	if (intel_sdvo->has_hdmi_monitor) {
1061235783Skib		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1062235783Skib		intel_sdvo_set_colorimetry(intel_sdvo,
1063235783Skib					   SDVO_COLORIMETRY_RGB256);
1064235783Skib		intel_sdvo_set_avi_infoframe(intel_sdvo);
1065235783Skib	} else
1066235783Skib		intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1067235783Skib
1068235783Skib	if (intel_sdvo->is_tv &&
1069235783Skib	    !intel_sdvo_set_tv_format(intel_sdvo))
1070235783Skib		return;
1071235783Skib
1072235783Skib	/* We have tried to get input timing in mode_fixup, and filled into
1073235783Skib	 * adjusted_mode.
1074235783Skib	 */
1075235783Skib	intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1076235783Skib	(void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1077235783Skib
1078235783Skib	switch (pixel_multiplier) {
1079235783Skib	default:
1080235783Skib	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1081235783Skib	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1082235783Skib	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1083235783Skib	}
1084235783Skib	if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1085235783Skib		return;
1086235783Skib
1087235783Skib	/* Set the SDVO control regs. */
1088235783Skib	if (INTEL_INFO(dev)->gen >= 4) {
1089235783Skib		/* The real mode polarity is set by the SDVO commands, using
1090235783Skib		 * struct intel_sdvo_dtd. */
1091235783Skib		sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1092235783Skib		if (intel_sdvo->is_hdmi)
1093235783Skib			sdvox |= intel_sdvo->color_range;
1094235783Skib		if (INTEL_INFO(dev)->gen < 5)
1095235783Skib			sdvox |= SDVO_BORDER_ENABLE;
1096235783Skib	} else {
1097235783Skib		sdvox = I915_READ(intel_sdvo->sdvo_reg);
1098235783Skib		switch (intel_sdvo->sdvo_reg) {
1099235783Skib		case SDVOB:
1100235783Skib			sdvox &= SDVOB_PRESERVE_MASK;
1101235783Skib			break;
1102235783Skib		case SDVOC:
1103235783Skib			sdvox &= SDVOC_PRESERVE_MASK;
1104235783Skib			break;
1105235783Skib		}
1106235783Skib		sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1107235783Skib	}
1108235783Skib
1109235783Skib	if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1110235783Skib		sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1111235783Skib	else
1112235783Skib		sdvox |= TRANSCODER(intel_crtc->pipe);
1113235783Skib
1114235783Skib	if (intel_sdvo->has_hdmi_audio)
1115235783Skib		sdvox |= SDVO_AUDIO_ENABLE;
1116235783Skib
1117235783Skib	if (INTEL_INFO(dev)->gen >= 4) {
1118235783Skib		/* done in crtc_mode_set as the dpll_md reg must be written early */
1119235783Skib	} else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1120235783Skib		/* done in crtc_mode_set as it lives inside the dpll register */
1121235783Skib	} else {
1122235783Skib		sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1123235783Skib	}
1124235783Skib
1125235783Skib	if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1126235783Skib	    INTEL_INFO(dev)->gen < 5)
1127235783Skib		sdvox |= SDVO_STALL_SELECT;
1128235783Skib	intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1129235783Skib}
1130235783Skib
1131235783Skibstatic void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1132235783Skib{
1133235783Skib	struct drm_device *dev = encoder->dev;
1134235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1135235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1136235783Skib	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1137235783Skib	u32 temp;
1138235783Skib
1139235783Skib	if (mode != DRM_MODE_DPMS_ON) {
1140235783Skib		intel_sdvo_set_active_outputs(intel_sdvo, 0);
1141235783Skib		if (0)
1142235783Skib			intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1143235783Skib
1144235783Skib		if (mode == DRM_MODE_DPMS_OFF) {
1145235783Skib			temp = I915_READ(intel_sdvo->sdvo_reg);
1146235783Skib			if ((temp & SDVO_ENABLE) != 0) {
1147235783Skib				intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1148235783Skib			}
1149235783Skib		}
1150235783Skib	} else {
1151235783Skib		bool input1, input2;
1152235783Skib		int i;
1153235783Skib		u8 status;
1154235783Skib
1155235783Skib		temp = I915_READ(intel_sdvo->sdvo_reg);
1156235783Skib		if ((temp & SDVO_ENABLE) == 0)
1157235783Skib			intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1158235783Skib		for (i = 0; i < 2; i++)
1159235783Skib			intel_wait_for_vblank(dev, intel_crtc->pipe);
1160235783Skib
1161235783Skib		status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1162235783Skib		/* Warn if the device reported failure to sync.
1163235783Skib		 * A lot of SDVO devices fail to notify of sync, but it's
1164235783Skib		 * a given it the status is a success, we succeeded.
1165235783Skib		 */
1166235783Skib		if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1167235783Skib			DRM_DEBUG_KMS("First %s output reported failure to "
1168235783Skib					"sync\n", SDVO_NAME(intel_sdvo));
1169235783Skib		}
1170235783Skib
1171235783Skib		if (0)
1172235783Skib			intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1173235783Skib		intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1174235783Skib	}
1175235783Skib	return;
1176235783Skib}
1177235783Skib
1178235783Skibstatic int intel_sdvo_mode_valid(struct drm_connector *connector,
1179235783Skib				 struct drm_display_mode *mode)
1180235783Skib{
1181235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1182235783Skib
1183235783Skib	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1184235783Skib		return MODE_NO_DBLESCAN;
1185235783Skib
1186235783Skib	if (intel_sdvo->pixel_clock_min > mode->clock)
1187235783Skib		return MODE_CLOCK_LOW;
1188235783Skib
1189235783Skib	if (intel_sdvo->pixel_clock_max < mode->clock)
1190235783Skib		return MODE_CLOCK_HIGH;
1191235783Skib
1192235783Skib	if (intel_sdvo->is_lvds) {
1193235783Skib		if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1194235783Skib			return MODE_PANEL;
1195235783Skib
1196235783Skib		if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1197235783Skib			return MODE_PANEL;
1198235783Skib	}
1199235783Skib
1200235783Skib	return MODE_OK;
1201235783Skib}
1202235783Skib
1203235783Skibstatic bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1204235783Skib{
1205235783Skib	CTASSERT(sizeof(*caps) == 8);
1206235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
1207235783Skib				  SDVO_CMD_GET_DEVICE_CAPS,
1208235783Skib				  caps, sizeof(*caps)))
1209235783Skib		return false;
1210235783Skib
1211235783Skib	DRM_DEBUG_KMS("SDVO capabilities:\n"
1212235783Skib		      "  vendor_id: %d\n"
1213235783Skib		      "  device_id: %d\n"
1214235783Skib		      "  device_rev_id: %d\n"
1215235783Skib		      "  sdvo_version_major: %d\n"
1216235783Skib		      "  sdvo_version_minor: %d\n"
1217235783Skib		      "  sdvo_inputs_mask: %d\n"
1218235783Skib		      "  smooth_scaling: %d\n"
1219235783Skib		      "  sharp_scaling: %d\n"
1220235783Skib		      "  up_scaling: %d\n"
1221235783Skib		      "  down_scaling: %d\n"
1222235783Skib		      "  stall_support: %d\n"
1223235783Skib		      "  output_flags: %d\n",
1224235783Skib		      caps->vendor_id,
1225235783Skib		      caps->device_id,
1226235783Skib		      caps->device_rev_id,
1227235783Skib		      caps->sdvo_version_major,
1228235783Skib		      caps->sdvo_version_minor,
1229235783Skib		      caps->sdvo_inputs_mask,
1230235783Skib		      caps->smooth_scaling,
1231235783Skib		      caps->sharp_scaling,
1232235783Skib		      caps->up_scaling,
1233235783Skib		      caps->down_scaling,
1234235783Skib		      caps->stall_support,
1235235783Skib		      caps->output_flags);
1236235783Skib
1237235783Skib	return true;
1238235783Skib}
1239235783Skib
1240235783Skibstatic int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1241235783Skib{
1242235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
1243235783Skib	u8 response[2];
1244235783Skib
1245235783Skib	/* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1246235783Skib	 * on the line. */
1247235783Skib	if (IS_I945G(dev) || IS_I945GM(dev))
1248235783Skib		return false;
1249235783Skib
1250235783Skib	return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1251235783Skib				    &response, 2) && response[0];
1252235783Skib}
1253235783Skib
1254235783Skibstatic void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1255235783Skib{
1256235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1257235783Skib
1258235783Skib	intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1259235783Skib			     &intel_sdvo->hotplug_active, 2);
1260235783Skib}
1261235783Skib
1262235783Skibstatic bool
1263235783Skibintel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1264235783Skib{
1265235783Skib	/* Is there more than one type of output? */
1266235783Skib	return bitcount16(intel_sdvo->caps.output_flags) > 1;
1267235783Skib}
1268235783Skib
1269235783Skibstatic struct edid *
1270235783Skibintel_sdvo_get_edid(struct drm_connector *connector)
1271235783Skib{
1272235783Skib	struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1273235783Skib	return drm_get_edid(connector, sdvo->ddc);
1274235783Skib}
1275235783Skib
1276235783Skib/* Mac mini hack -- use the same DDC as the analog connector */
1277235783Skibstatic struct edid *
1278235783Skibintel_sdvo_get_analog_edid(struct drm_connector *connector)
1279235783Skib{
1280235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1281235783Skib
1282235783Skib	return drm_get_edid(connector,
1283280369Skib			    intel_gmbus_get_adapter(dev_priv,
1284280369Skib						    dev_priv->crt_ddc_pin));
1285235783Skib}
1286235783Skib
1287235783Skibstatic enum drm_connector_status
1288235783Skibintel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1289235783Skib{
1290235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1291235783Skib	enum drm_connector_status status;
1292235783Skib	struct edid *edid;
1293235783Skib
1294235783Skib	edid = intel_sdvo_get_edid(connector);
1295235783Skib
1296235783Skib	if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1297235783Skib		u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1298235783Skib
1299235783Skib		/*
1300235783Skib		 * Don't use the 1 as the argument of DDC bus switch to get
1301235783Skib		 * the EDID. It is used for SDVO SPD ROM.
1302235783Skib		 */
1303235783Skib		for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1304235783Skib			intel_sdvo->ddc_bus = ddc;
1305235783Skib			edid = intel_sdvo_get_edid(connector);
1306235783Skib			if (edid)
1307235783Skib				break;
1308235783Skib		}
1309235783Skib		/*
1310235783Skib		 * If we found the EDID on the other bus,
1311235783Skib		 * assume that is the correct DDC bus.
1312235783Skib		 */
1313235783Skib		if (edid == NULL)
1314235783Skib			intel_sdvo->ddc_bus = saved_ddc;
1315235783Skib	}
1316235783Skib
1317235783Skib	/*
1318235783Skib	 * When there is no edid and no monitor is connected with VGA
1319235783Skib	 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1320235783Skib	 */
1321235783Skib	if (edid == NULL)
1322235783Skib		edid = intel_sdvo_get_analog_edid(connector);
1323235783Skib
1324235783Skib	status = connector_status_unknown;
1325235783Skib	if (edid != NULL) {
1326235783Skib		/* DDC bus is shared, match EDID to connector type */
1327235783Skib		if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1328235783Skib			status = connector_status_connected;
1329235783Skib			if (intel_sdvo->is_hdmi) {
1330235783Skib				intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1331235783Skib				intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1332235783Skib			}
1333235783Skib		} else
1334235783Skib			status = connector_status_disconnected;
1335235783Skib		free(edid, DRM_MEM_KMS);
1336235783Skib	}
1337235783Skib
1338235783Skib	if (status == connector_status_connected) {
1339235783Skib		struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1340235783Skib		if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1341235783Skib			intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1342235783Skib	}
1343235783Skib
1344235783Skib	return status;
1345235783Skib}
1346235783Skib
1347235783Skibstatic bool
1348235783Skibintel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1349235783Skib				  struct edid *edid)
1350235783Skib{
1351235783Skib	bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1352235783Skib	bool connector_is_digital = !!IS_DIGITAL(sdvo);
1353235783Skib
1354235783Skib	DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1355235783Skib		      connector_is_digital, monitor_is_digital);
1356235783Skib	return connector_is_digital == monitor_is_digital;
1357235783Skib}
1358235783Skib
1359235783Skibstatic enum drm_connector_status
1360235783Skibintel_sdvo_detect(struct drm_connector *connector, bool force)
1361235783Skib{
1362235783Skib	uint16_t response;
1363235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1364235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1365235783Skib	enum drm_connector_status ret;
1366235783Skib
1367235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo,
1368235783Skib				  SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1369235783Skib		return connector_status_unknown;
1370235783Skib
1371235783Skib	/* add 30ms delay when the output type might be TV */
1372280369Skib	if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1373235783Skib		drm_msleep(30, "915svo");
1374235783Skib
1375235783Skib	if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1376235783Skib		return connector_status_unknown;
1377235783Skib
1378235783Skib	DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1379235783Skib		      response & 0xff, response >> 8,
1380235783Skib		      intel_sdvo_connector->output_flag);
1381235783Skib
1382235783Skib	if (response == 0)
1383235783Skib		return connector_status_disconnected;
1384235783Skib
1385235783Skib	intel_sdvo->attached_output = response;
1386235783Skib
1387235783Skib	intel_sdvo->has_hdmi_monitor = false;
1388235783Skib	intel_sdvo->has_hdmi_audio = false;
1389235783Skib
1390235783Skib	if ((intel_sdvo_connector->output_flag & response) == 0)
1391235783Skib		ret = connector_status_disconnected;
1392235783Skib	else if (IS_TMDS(intel_sdvo_connector))
1393235783Skib		ret = intel_sdvo_tmds_sink_detect(connector);
1394235783Skib	else {
1395235783Skib		struct edid *edid;
1396235783Skib
1397235783Skib		/* if we have an edid check it matches the connection */
1398235783Skib		edid = intel_sdvo_get_edid(connector);
1399235783Skib		if (edid == NULL)
1400235783Skib			edid = intel_sdvo_get_analog_edid(connector);
1401235783Skib		if (edid != NULL) {
1402235783Skib			if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1403235783Skib							      edid))
1404235783Skib				ret = connector_status_connected;
1405235783Skib			else
1406235783Skib				ret = connector_status_disconnected;
1407235783Skib
1408235783Skib			free(edid, DRM_MEM_KMS);
1409235783Skib		} else
1410235783Skib			ret = connector_status_connected;
1411235783Skib	}
1412235783Skib
1413235783Skib	/* May update encoder flag for like clock for SDVO TV, etc.*/
1414235783Skib	if (ret == connector_status_connected) {
1415235783Skib		intel_sdvo->is_tv = false;
1416235783Skib		intel_sdvo->is_lvds = false;
1417235783Skib		intel_sdvo->base.needs_tv_clock = false;
1418235783Skib
1419235783Skib		if (response & SDVO_TV_MASK) {
1420235783Skib			intel_sdvo->is_tv = true;
1421235783Skib			intel_sdvo->base.needs_tv_clock = true;
1422235783Skib		}
1423235783Skib		if (response & SDVO_LVDS_MASK)
1424235783Skib			intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1425235783Skib	}
1426235783Skib
1427235783Skib	return ret;
1428235783Skib}
1429235783Skib
1430235783Skibstatic void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1431235783Skib{
1432235783Skib	struct edid *edid;
1433235783Skib
1434235783Skib	/* set the bus switch and get the modes */
1435235783Skib	edid = intel_sdvo_get_edid(connector);
1436235783Skib
1437235783Skib	/*
1438235783Skib	 * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1439235783Skib	 * link between analog and digital outputs. So, if the regular SDVO
1440235783Skib	 * DDC fails, check to see if the analog output is disconnected, in
1441235783Skib	 * which case we'll look there for the digital DDC data.
1442235783Skib	 */
1443235783Skib	if (edid == NULL)
1444235783Skib		edid = intel_sdvo_get_analog_edid(connector);
1445235783Skib
1446235783Skib	if (edid != NULL) {
1447235783Skib		if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1448235783Skib						      edid)) {
1449235783Skib			drm_mode_connector_update_edid_property(connector, edid);
1450235783Skib			drm_add_edid_modes(connector, edid);
1451235783Skib		}
1452235783Skib
1453235783Skib		free(edid, DRM_MEM_KMS);
1454235783Skib	}
1455235783Skib}
1456235783Skib
1457235783Skib/*
1458235783Skib * Set of SDVO TV modes.
1459235783Skib * Note!  This is in reply order (see loop in get_tv_modes).
1460235783Skib * XXX: all 60Hz refresh?
1461235783Skib */
1462235783Skibstatic const struct drm_display_mode sdvo_tv_modes[] = {
1463235783Skib	{ DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1464235783Skib		   416, 0, 200, 201, 232, 233, 0,
1465235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1466235783Skib	{ DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1467235783Skib		   416, 0, 240, 241, 272, 273, 0,
1468235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1469235783Skib	{ DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1470235783Skib		   496, 0, 300, 301, 332, 333, 0,
1471235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1472235783Skib	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1473235783Skib		   736, 0, 350, 351, 382, 383, 0,
1474235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1475235783Skib	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1476235783Skib		   736, 0, 400, 401, 432, 433, 0,
1477235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1478235783Skib	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1479235783Skib		   736, 0, 480, 481, 512, 513, 0,
1480235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1481235783Skib	{ DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1482235783Skib		   800, 0, 480, 481, 512, 513, 0,
1483235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484235783Skib	{ DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1485235783Skib		   800, 0, 576, 577, 608, 609, 0,
1486235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1487235783Skib	{ DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1488235783Skib		   816, 0, 350, 351, 382, 383, 0,
1489235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1490235783Skib	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1491235783Skib		   816, 0, 400, 401, 432, 433, 0,
1492235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1493235783Skib	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1494235783Skib		   816, 0, 480, 481, 512, 513, 0,
1495235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496235783Skib	{ DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1497235783Skib		   816, 0, 540, 541, 572, 573, 0,
1498235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1499235783Skib	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1500235783Skib		   816, 0, 576, 577, 608, 609, 0,
1501235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1502235783Skib	{ DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1503235783Skib		   864, 0, 576, 577, 608, 609, 0,
1504235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505235783Skib	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1506235783Skib		   896, 0, 600, 601, 632, 633, 0,
1507235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508235783Skib	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1509235783Skib		   928, 0, 624, 625, 656, 657, 0,
1510235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1511235783Skib	{ DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1512235783Skib		   1016, 0, 766, 767, 798, 799, 0,
1513235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1514235783Skib	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1515235783Skib		   1120, 0, 768, 769, 800, 801, 0,
1516235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1517235783Skib	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1518235783Skib		   1376, 0, 1024, 1025, 1056, 1057, 0,
1519235783Skib		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1520235783Skib};
1521235783Skib
1522235783Skibstatic void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1523235783Skib{
1524235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1525235783Skib	struct intel_sdvo_sdtv_resolution_request tv_res;
1526235783Skib	uint32_t reply = 0, format_map = 0;
1527235783Skib	int i;
1528235783Skib
1529235783Skib	/* Read the list of supported input resolutions for the selected TV
1530235783Skib	 * format.
1531235783Skib	 */
1532235783Skib	format_map = 1 << intel_sdvo->tv_format_index;
1533235783Skib	memcpy(&tv_res, &format_map,
1534235783Skib	       min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1535235783Skib
1536235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1537235783Skib		return;
1538235783Skib
1539235783Skib	CTASSERT(sizeof(tv_res) == 3);
1540235783Skib	if (!intel_sdvo_write_cmd(intel_sdvo,
1541235783Skib				  SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1542235783Skib				  &tv_res, sizeof(tv_res)))
1543235783Skib		return;
1544235783Skib	if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1545235783Skib		return;
1546235783Skib
1547282199Sdumbbell	for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1548235783Skib		if (reply & (1 << i)) {
1549235783Skib			struct drm_display_mode *nmode;
1550235783Skib			nmode = drm_mode_duplicate(connector->dev,
1551235783Skib						   &sdvo_tv_modes[i]);
1552235783Skib			if (nmode)
1553235783Skib				drm_mode_probed_add(connector, nmode);
1554235783Skib		}
1555235783Skib}
1556235783Skib
1557235783Skibstatic void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1558235783Skib{
1559235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1560235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1561235783Skib	struct drm_display_mode *newmode;
1562235783Skib
1563235783Skib	/*
1564235783Skib	 * Attempt to get the mode list from DDC.
1565235783Skib	 * Assume that the preferred modes are
1566235783Skib	 * arranged in priority order.
1567235783Skib	 */
1568235783Skib	intel_ddc_get_modes(connector, intel_sdvo->i2c);
1569235783Skib	if (!list_empty(&connector->probed_modes))
1570235783Skib		goto end;
1571235783Skib
1572235783Skib	/* Fetch modes from VBT */
1573235783Skib	if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1574235783Skib		newmode = drm_mode_duplicate(connector->dev,
1575235783Skib					     dev_priv->sdvo_lvds_vbt_mode);
1576235783Skib		if (newmode != NULL) {
1577235783Skib			/* Guarantee the mode is preferred */
1578235783Skib			newmode->type = (DRM_MODE_TYPE_PREFERRED |
1579235783Skib					 DRM_MODE_TYPE_DRIVER);
1580235783Skib			drm_mode_probed_add(connector, newmode);
1581235783Skib		}
1582235783Skib	}
1583235783Skib
1584235783Skibend:
1585235783Skib	list_for_each_entry(newmode, &connector->probed_modes, head) {
1586235783Skib		if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1587235783Skib			intel_sdvo->sdvo_lvds_fixed_mode =
1588235783Skib				drm_mode_duplicate(connector->dev, newmode);
1589235783Skib
1590235783Skib			intel_sdvo->is_lvds = true;
1591235783Skib			break;
1592235783Skib		}
1593235783Skib	}
1594235783Skib
1595235783Skib}
1596235783Skib
1597235783Skibstatic int intel_sdvo_get_modes(struct drm_connector *connector)
1598235783Skib{
1599235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1600235783Skib
1601235783Skib	if (IS_TV(intel_sdvo_connector))
1602235783Skib		intel_sdvo_get_tv_modes(connector);
1603235783Skib	else if (IS_LVDS(intel_sdvo_connector))
1604235783Skib		intel_sdvo_get_lvds_modes(connector);
1605235783Skib	else
1606235783Skib		intel_sdvo_get_ddc_modes(connector);
1607235783Skib
1608235783Skib	return !list_empty(&connector->probed_modes);
1609235783Skib}
1610235783Skib
1611235783Skibstatic void
1612235783Skibintel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1613235783Skib{
1614235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1615235783Skib	struct drm_device *dev = connector->dev;
1616235783Skib
1617235783Skib	if (intel_sdvo_connector->left)
1618235783Skib		drm_property_destroy(dev, intel_sdvo_connector->left);
1619235783Skib	if (intel_sdvo_connector->right)
1620235783Skib		drm_property_destroy(dev, intel_sdvo_connector->right);
1621235783Skib	if (intel_sdvo_connector->top)
1622235783Skib		drm_property_destroy(dev, intel_sdvo_connector->top);
1623235783Skib	if (intel_sdvo_connector->bottom)
1624235783Skib		drm_property_destroy(dev, intel_sdvo_connector->bottom);
1625235783Skib	if (intel_sdvo_connector->hpos)
1626235783Skib		drm_property_destroy(dev, intel_sdvo_connector->hpos);
1627235783Skib	if (intel_sdvo_connector->vpos)
1628235783Skib		drm_property_destroy(dev, intel_sdvo_connector->vpos);
1629235783Skib	if (intel_sdvo_connector->saturation)
1630235783Skib		drm_property_destroy(dev, intel_sdvo_connector->saturation);
1631235783Skib	if (intel_sdvo_connector->contrast)
1632235783Skib		drm_property_destroy(dev, intel_sdvo_connector->contrast);
1633235783Skib	if (intel_sdvo_connector->hue)
1634235783Skib		drm_property_destroy(dev, intel_sdvo_connector->hue);
1635235783Skib	if (intel_sdvo_connector->sharpness)
1636235783Skib		drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1637235783Skib	if (intel_sdvo_connector->flicker_filter)
1638235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1639235783Skib	if (intel_sdvo_connector->flicker_filter_2d)
1640235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1641235783Skib	if (intel_sdvo_connector->flicker_filter_adaptive)
1642235783Skib		drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1643235783Skib	if (intel_sdvo_connector->tv_luma_filter)
1644235783Skib		drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1645235783Skib	if (intel_sdvo_connector->tv_chroma_filter)
1646235783Skib		drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1647235783Skib	if (intel_sdvo_connector->dot_crawl)
1648235783Skib		drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1649235783Skib	if (intel_sdvo_connector->brightness)
1650235783Skib		drm_property_destroy(dev, intel_sdvo_connector->brightness);
1651235783Skib}
1652235783Skib
1653235783Skibstatic void intel_sdvo_destroy(struct drm_connector *connector)
1654235783Skib{
1655235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1656235783Skib
1657235783Skib	if (intel_sdvo_connector->tv_format)
1658235783Skib		drm_property_destroy(connector->dev,
1659235783Skib				     intel_sdvo_connector->tv_format);
1660235783Skib
1661235783Skib	intel_sdvo_destroy_enhance_property(connector);
1662235783Skib#if 0
1663235783Skib	drm_sysfs_connector_remove(connector);
1664235783Skib#endif
1665235783Skib	drm_connector_cleanup(connector);
1666235783Skib	free(connector, DRM_MEM_KMS);
1667235783Skib}
1668235783Skib
1669235783Skibstatic bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1670235783Skib{
1671235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1672235783Skib	struct edid *edid;
1673235783Skib	bool has_audio = false;
1674235783Skib
1675235783Skib	if (!intel_sdvo->is_hdmi)
1676235783Skib		return false;
1677235783Skib
1678235783Skib	edid = intel_sdvo_get_edid(connector);
1679235783Skib	if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1680235783Skib		has_audio = drm_detect_monitor_audio(edid);
1681235783Skib
1682235783Skib	return has_audio;
1683235783Skib}
1684235783Skib
1685235783Skibstatic int
1686235783Skibintel_sdvo_set_property(struct drm_connector *connector,
1687235783Skib			struct drm_property *property,
1688235783Skib			uint64_t val)
1689235783Skib{
1690235783Skib	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1691235783Skib	struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1692235783Skib	struct drm_i915_private *dev_priv = connector->dev->dev_private;
1693235783Skib	uint16_t temp_value;
1694235783Skib	uint8_t cmd;
1695235783Skib	int ret;
1696235783Skib
1697282199Sdumbbell	ret = drm_object_property_set_value(&connector->base, property, val);
1698235783Skib	if (ret)
1699235783Skib		return ret;
1700235783Skib
1701235783Skib	if (property == dev_priv->force_audio_property) {
1702235783Skib		int i = val;
1703235783Skib		bool has_audio;
1704235783Skib
1705235783Skib		if (i == intel_sdvo_connector->force_audio)
1706235783Skib			return 0;
1707235783Skib
1708235783Skib		intel_sdvo_connector->force_audio = i;
1709235783Skib
1710235783Skib		if (i == HDMI_AUDIO_AUTO)
1711235783Skib			has_audio = intel_sdvo_detect_hdmi_audio(connector);
1712235783Skib		else
1713235783Skib			has_audio = (i == HDMI_AUDIO_ON);
1714235783Skib
1715235783Skib		if (has_audio == intel_sdvo->has_hdmi_audio)
1716235783Skib			return 0;
1717235783Skib
1718235783Skib		intel_sdvo->has_hdmi_audio = has_audio;
1719235783Skib		goto done;
1720235783Skib	}
1721235783Skib
1722235783Skib	if (property == dev_priv->broadcast_rgb_property) {
1723235783Skib		if (val == !!intel_sdvo->color_range)
1724235783Skib			return 0;
1725235783Skib
1726235783Skib		intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1727235783Skib		goto done;
1728235783Skib	}
1729235783Skib
1730235783Skib#define CHECK_PROPERTY(name, NAME) \
1731235783Skib	if (intel_sdvo_connector->name == property) { \
1732235783Skib		if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1733235783Skib		if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1734235783Skib		cmd = SDVO_CMD_SET_##NAME; \
1735235783Skib		intel_sdvo_connector->cur_##name = temp_value; \
1736235783Skib		goto set_value; \
1737235783Skib	}
1738235783Skib
1739235783Skib	if (property == intel_sdvo_connector->tv_format) {
1740235783Skib		if (val >= TV_FORMAT_NUM)
1741235783Skib			return -EINVAL;
1742235783Skib
1743235783Skib		if (intel_sdvo->tv_format_index ==
1744235783Skib		    intel_sdvo_connector->tv_format_supported[val])
1745235783Skib			return 0;
1746235783Skib
1747235783Skib		intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1748235783Skib		goto done;
1749235783Skib	} else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1750235783Skib		temp_value = val;
1751235783Skib		if (intel_sdvo_connector->left == property) {
1752282199Sdumbbell			drm_object_property_set_value(&connector->base,
1753235783Skib							 intel_sdvo_connector->right, val);
1754235783Skib			if (intel_sdvo_connector->left_margin == temp_value)
1755235783Skib				return 0;
1756235783Skib
1757235783Skib			intel_sdvo_connector->left_margin = temp_value;
1758235783Skib			intel_sdvo_connector->right_margin = temp_value;
1759235783Skib			temp_value = intel_sdvo_connector->max_hscan -
1760235783Skib				intel_sdvo_connector->left_margin;
1761235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_H;
1762235783Skib			goto set_value;
1763235783Skib		} else if (intel_sdvo_connector->right == property) {
1764282199Sdumbbell			drm_object_property_set_value(&connector->base,
1765235783Skib							 intel_sdvo_connector->left, val);
1766235783Skib			if (intel_sdvo_connector->right_margin == temp_value)
1767235783Skib				return 0;
1768235783Skib
1769235783Skib			intel_sdvo_connector->left_margin = temp_value;
1770235783Skib			intel_sdvo_connector->right_margin = temp_value;
1771235783Skib			temp_value = intel_sdvo_connector->max_hscan -
1772235783Skib				intel_sdvo_connector->left_margin;
1773235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_H;
1774235783Skib			goto set_value;
1775235783Skib		} else if (intel_sdvo_connector->top == property) {
1776282199Sdumbbell			drm_object_property_set_value(&connector->base,
1777235783Skib							 intel_sdvo_connector->bottom, val);
1778235783Skib			if (intel_sdvo_connector->top_margin == temp_value)
1779235783Skib				return 0;
1780235783Skib
1781235783Skib			intel_sdvo_connector->top_margin = temp_value;
1782235783Skib			intel_sdvo_connector->bottom_margin = temp_value;
1783235783Skib			temp_value = intel_sdvo_connector->max_vscan -
1784235783Skib				intel_sdvo_connector->top_margin;
1785235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_V;
1786235783Skib			goto set_value;
1787235783Skib		} else if (intel_sdvo_connector->bottom == property) {
1788282199Sdumbbell			drm_object_property_set_value(&connector->base,
1789235783Skib							 intel_sdvo_connector->top, val);
1790235783Skib			if (intel_sdvo_connector->bottom_margin == temp_value)
1791235783Skib				return 0;
1792235783Skib
1793235783Skib			intel_sdvo_connector->top_margin = temp_value;
1794235783Skib			intel_sdvo_connector->bottom_margin = temp_value;
1795235783Skib			temp_value = intel_sdvo_connector->max_vscan -
1796235783Skib				intel_sdvo_connector->top_margin;
1797235783Skib			cmd = SDVO_CMD_SET_OVERSCAN_V;
1798235783Skib			goto set_value;
1799235783Skib		}
1800235783Skib		CHECK_PROPERTY(hpos, HPOS)
1801235783Skib		CHECK_PROPERTY(vpos, VPOS)
1802235783Skib		CHECK_PROPERTY(saturation, SATURATION)
1803235783Skib		CHECK_PROPERTY(contrast, CONTRAST)
1804235783Skib		CHECK_PROPERTY(hue, HUE)
1805235783Skib		CHECK_PROPERTY(brightness, BRIGHTNESS)
1806235783Skib		CHECK_PROPERTY(sharpness, SHARPNESS)
1807235783Skib		CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1808235783Skib		CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1809235783Skib		CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1810235783Skib		CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1811235783Skib		CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1812235783Skib		CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1813235783Skib	}
1814235783Skib
1815235783Skib	return -EINVAL; /* unknown property */
1816235783Skib
1817235783Skibset_value:
1818235783Skib	if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1819235783Skib		return -EIO;
1820235783Skib
1821235783Skib
1822235783Skibdone:
1823235783Skib	if (intel_sdvo->base.base.crtc) {
1824235783Skib		struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1825235783Skib		drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1826235783Skib					 crtc->y, crtc->fb);
1827235783Skib	}
1828235783Skib
1829235783Skib	return 0;
1830235783Skib#undef CHECK_PROPERTY
1831235783Skib}
1832235783Skib
1833235783Skibstatic const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1834235783Skib	.dpms = intel_sdvo_dpms,
1835235783Skib	.mode_fixup = intel_sdvo_mode_fixup,
1836235783Skib	.prepare = intel_encoder_prepare,
1837235783Skib	.mode_set = intel_sdvo_mode_set,
1838235783Skib	.commit = intel_encoder_commit,
1839235783Skib};
1840235783Skib
1841235783Skibstatic const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1842235783Skib	.dpms = drm_helper_connector_dpms,
1843235783Skib	.detect = intel_sdvo_detect,
1844235783Skib	.fill_modes = drm_helper_probe_single_connector_modes,
1845235783Skib	.set_property = intel_sdvo_set_property,
1846235783Skib	.destroy = intel_sdvo_destroy,
1847235783Skib};
1848235783Skib
1849235783Skibstatic const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1850235783Skib	.get_modes = intel_sdvo_get_modes,
1851235783Skib	.mode_valid = intel_sdvo_mode_valid,
1852235783Skib	.best_encoder = intel_best_encoder,
1853235783Skib};
1854235783Skib
1855235783Skibstatic void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1856235783Skib{
1857235783Skib	struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1858235783Skib
1859235783Skib	if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1860235783Skib		drm_mode_destroy(encoder->dev,
1861235783Skib				 intel_sdvo->sdvo_lvds_fixed_mode);
1862235783Skib
1863282199Sdumbbell	device_delete_child(intel_sdvo->base.base.dev->dev,
1864235783Skib	    intel_sdvo->ddc_iic_bus);
1865235783Skib	intel_encoder_destroy(encoder);
1866235783Skib}
1867235783Skib
1868235783Skibstatic const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1869235783Skib	.destroy = intel_sdvo_enc_destroy,
1870235783Skib};
1871235783Skib
1872235783Skibstatic void
1873235783Skibintel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1874235783Skib{
1875235783Skib	uint16_t mask = 0;
1876235783Skib	unsigned int num_bits;
1877235783Skib
1878235783Skib	/* Make a mask of outputs less than or equal to our own priority in the
1879235783Skib	 * list.
1880235783Skib	 */
1881235783Skib	switch (sdvo->controlled_output) {
1882235783Skib	case SDVO_OUTPUT_LVDS1:
1883235783Skib		mask |= SDVO_OUTPUT_LVDS1;
1884235783Skib	case SDVO_OUTPUT_LVDS0:
1885235783Skib		mask |= SDVO_OUTPUT_LVDS0;
1886235783Skib	case SDVO_OUTPUT_TMDS1:
1887235783Skib		mask |= SDVO_OUTPUT_TMDS1;
1888235783Skib	case SDVO_OUTPUT_TMDS0:
1889235783Skib		mask |= SDVO_OUTPUT_TMDS0;
1890235783Skib	case SDVO_OUTPUT_RGB1:
1891235783Skib		mask |= SDVO_OUTPUT_RGB1;
1892235783Skib	case SDVO_OUTPUT_RGB0:
1893235783Skib		mask |= SDVO_OUTPUT_RGB0;
1894235783Skib		break;
1895235783Skib	}
1896235783Skib
1897235783Skib	/* Count bits to find what number we are in the priority list. */
1898235783Skib	mask &= sdvo->caps.output_flags;
1899235783Skib	num_bits = bitcount16(mask);
1900235783Skib	/* If more than 3 outputs, default to DDC bus 3 for now. */
1901235783Skib	if (num_bits > 3)
1902235783Skib		num_bits = 3;
1903235783Skib
1904235783Skib	/* Corresponds to SDVO_CONTROL_BUS_DDCx */
1905235783Skib	sdvo->ddc_bus = 1 << num_bits;
1906235783Skib}
1907235783Skib
1908235783Skib/**
1909235783Skib * Choose the appropriate DDC bus for control bus switch command for this
1910235783Skib * SDVO output based on the controlled output.
1911235783Skib *
1912235783Skib * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1913235783Skib * outputs, then LVDS outputs.
1914235783Skib */
1915235783Skibstatic void
1916235783Skibintel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1917235783Skib			  struct intel_sdvo *sdvo, u32 reg)
1918235783Skib{
1919235783Skib	struct sdvo_device_mapping *mapping;
1920235783Skib
1921280369Skib	if (sdvo->is_sdvob)
1922235783Skib		mapping = &(dev_priv->sdvo_mappings[0]);
1923235783Skib	else
1924235783Skib		mapping = &(dev_priv->sdvo_mappings[1]);
1925235783Skib
1926235783Skib	if (mapping->initialized)
1927235783Skib		sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1928235783Skib	else
1929235783Skib		intel_sdvo_guess_ddc_bus(sdvo);
1930235783Skib}
1931235783Skib
1932235783Skibstatic void
1933235783Skibintel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1934235783Skib			  struct intel_sdvo *sdvo, u32 reg)
1935235783Skib{
1936235783Skib	struct sdvo_device_mapping *mapping;
1937235783Skib	u8 pin;
1938235783Skib
1939280369Skib	if (sdvo->is_sdvob)
1940235783Skib		mapping = &dev_priv->sdvo_mappings[0];
1941235783Skib	else
1942235783Skib		mapping = &dev_priv->sdvo_mappings[1];
1943235783Skib
1944235783Skib	pin = GMBUS_PORT_DPB;
1945235783Skib	if (mapping->initialized)
1946235783Skib		pin = mapping->i2c_pin;
1947235783Skib
1948280369Skib	if (intel_gmbus_is_port_valid(pin)) {
1949280369Skib		sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1950235783Skib		intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1951235783Skib		intel_gmbus_force_bit(sdvo->i2c, true);
1952235783Skib	} else {
1953280369Skib		sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1954235783Skib	}
1955235783Skib}
1956235783Skib
1957235783Skibstatic bool
1958235783Skibintel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1959235783Skib{
1960235783Skib	return intel_sdvo_check_supp_encode(intel_sdvo);
1961235783Skib}
1962235783Skib
1963235783Skibstatic u8
1964280369Skibintel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1965235783Skib{
1966235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
1967235783Skib	struct sdvo_device_mapping *my_mapping, *other_mapping;
1968235783Skib
1969280369Skib	if (sdvo->is_sdvob) {
1970235783Skib		my_mapping = &dev_priv->sdvo_mappings[0];
1971235783Skib		other_mapping = &dev_priv->sdvo_mappings[1];
1972235783Skib	} else {
1973235783Skib		my_mapping = &dev_priv->sdvo_mappings[1];
1974235783Skib		other_mapping = &dev_priv->sdvo_mappings[0];
1975235783Skib	}
1976235783Skib
1977235783Skib	/* If the BIOS described our SDVO device, take advantage of it. */
1978235783Skib	if (my_mapping->slave_addr)
1979235783Skib		return my_mapping->slave_addr;
1980235783Skib
1981235783Skib	/* If the BIOS only described a different SDVO device, use the
1982235783Skib	 * address that it isn't using.
1983235783Skib	 */
1984235783Skib	if (other_mapping->slave_addr) {
1985235783Skib		if (other_mapping->slave_addr == 0x70)
1986235783Skib			return 0x72;
1987235783Skib		else
1988235783Skib			return 0x70;
1989235783Skib	}
1990235783Skib
1991235783Skib	/* No SDVO device info is found for another DVO port,
1992235783Skib	 * so use mapping assumption we had before BIOS parsing.
1993235783Skib	 */
1994280369Skib	if (sdvo->is_sdvob)
1995235783Skib		return 0x70;
1996235783Skib	else
1997235783Skib		return 0x72;
1998235783Skib}
1999235783Skib
2000235783Skibstatic void
2001235783Skibintel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2002235783Skib			  struct intel_sdvo *encoder)
2003235783Skib{
2004235783Skib	drm_connector_init(encoder->base.base.dev,
2005235783Skib			   &connector->base.base,
2006235783Skib			   &intel_sdvo_connector_funcs,
2007235783Skib			   connector->base.base.connector_type);
2008235783Skib
2009235783Skib	drm_connector_helper_add(&connector->base.base,
2010235783Skib				 &intel_sdvo_connector_helper_funcs);
2011235783Skib
2012235783Skib	connector->base.base.interlace_allowed = 1;
2013235783Skib	connector->base.base.doublescan_allowed = 0;
2014235783Skib	connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2015235783Skib
2016235783Skib	intel_connector_attach_encoder(&connector->base, &encoder->base);
2017235783Skib#if 0
2018235783Skib	drm_sysfs_connector_add(&connector->base.base);
2019235783Skib#endif
2020235783Skib}
2021235783Skib
2022235783Skibstatic void
2023235783Skibintel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2024235783Skib{
2025235783Skib	struct drm_device *dev = connector->base.base.dev;
2026235783Skib
2027235783Skib	intel_attach_force_audio_property(&connector->base.base);
2028235783Skib	if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2029235783Skib		intel_attach_broadcast_rgb_property(&connector->base.base);
2030235783Skib}
2031235783Skib
2032235783Skibstatic bool
2033235783Skibintel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2034235783Skib{
2035235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2036235783Skib	struct drm_connector *connector;
2037235783Skib	struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2038235783Skib	struct intel_connector *intel_connector;
2039235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2040235783Skib
2041235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2042235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2043235783Skib
2044235783Skib	if (device == 0) {
2045235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2046235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2047235783Skib	} else if (device == 1) {
2048235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2049235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2050235783Skib	}
2051235783Skib
2052235783Skib	intel_connector = &intel_sdvo_connector->base;
2053235783Skib	connector = &intel_connector->base;
2054235783Skib	if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2055235783Skib		connector->polled = DRM_CONNECTOR_POLL_HPD;
2056235783Skib		intel_sdvo->hotplug_active[0] |= 1 << device;
2057235783Skib		/* Some SDVO devices have one-shot hotplug interrupts.
2058235783Skib		 * Ensure that they get re-enabled when an interrupt happens.
2059235783Skib		 */
2060235783Skib		intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2061235783Skib		intel_sdvo_enable_hotplug(intel_encoder);
2062235783Skib	}
2063235783Skib	else
2064235783Skib		connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2065235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2066235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2067235783Skib
2068235783Skib	if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2069235783Skib		connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2070235783Skib		intel_sdvo->is_hdmi = true;
2071235783Skib	}
2072235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2073235783Skib				       (1 << INTEL_ANALOG_CLONE_BIT));
2074235783Skib
2075235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2076235783Skib	if (intel_sdvo->is_hdmi)
2077235783Skib		intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2078235783Skib
2079235783Skib	return true;
2080235783Skib}
2081235783Skib
2082235783Skibstatic bool
2083235783Skibintel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2084235783Skib{
2085235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2086235783Skib	struct drm_connector *connector;
2087235783Skib	struct intel_connector *intel_connector;
2088235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2089235783Skib
2090235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2091235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2092235783Skib	if (!intel_sdvo_connector)
2093235783Skib		return false;
2094235783Skib
2095235783Skib	intel_connector = &intel_sdvo_connector->base;
2096235783Skib	connector = &intel_connector->base;
2097235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2098235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2099235783Skib
2100235783Skib	intel_sdvo->controlled_output |= type;
2101235783Skib	intel_sdvo_connector->output_flag = type;
2102235783Skib
2103235783Skib	intel_sdvo->is_tv = true;
2104235783Skib	intel_sdvo->base.needs_tv_clock = true;
2105235783Skib	intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2106235783Skib
2107235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2108235783Skib
2109235783Skib	if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2110235783Skib		goto err;
2111235783Skib
2112235783Skib	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2113235783Skib		goto err;
2114235783Skib
2115235783Skib	return true;
2116235783Skib
2117235783Skiberr:
2118235783Skib	intel_sdvo_destroy(connector);
2119235783Skib	return false;
2120235783Skib}
2121235783Skib
2122235783Skibstatic bool
2123235783Skibintel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2124235783Skib{
2125235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2126235783Skib	struct drm_connector *connector;
2127235783Skib	struct intel_connector *intel_connector;
2128235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2129235783Skib
2130235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2131235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2132235783Skib
2133235783Skib	intel_connector = &intel_sdvo_connector->base;
2134235783Skib	connector = &intel_connector->base;
2135235783Skib	connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2136235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2137235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2138235783Skib
2139235783Skib	if (device == 0) {
2140235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2141235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2142235783Skib	} else if (device == 1) {
2143235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2144235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2145235783Skib	}
2146235783Skib
2147235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2148235783Skib				       (1 << INTEL_ANALOG_CLONE_BIT));
2149235783Skib
2150235783Skib	intel_sdvo_connector_init(intel_sdvo_connector,
2151235783Skib				  intel_sdvo);
2152235783Skib	return true;
2153235783Skib}
2154235783Skib
2155235783Skibstatic bool
2156235783Skibintel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2157235783Skib{
2158235783Skib	struct drm_encoder *encoder = &intel_sdvo->base.base;
2159235783Skib	struct drm_connector *connector;
2160235783Skib	struct intel_connector *intel_connector;
2161235783Skib	struct intel_sdvo_connector *intel_sdvo_connector;
2162235783Skib
2163235783Skib	intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector),
2164235783Skib	    DRM_MEM_KMS, M_WAITOK | M_ZERO);
2165235783Skib
2166235783Skib	intel_connector = &intel_sdvo_connector->base;
2167235783Skib	connector = &intel_connector->base;
2168235783Skib	encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2169235783Skib	connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2170235783Skib
2171235783Skib	if (device == 0) {
2172235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2173235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2174235783Skib	} else if (device == 1) {
2175235783Skib		intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2176235783Skib		intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2177235783Skib	}
2178235783Skib
2179235783Skib	intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2180235783Skib				       (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2181235783Skib
2182235783Skib	intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2183235783Skib	if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2184235783Skib		goto err;
2185235783Skib
2186235783Skib	return true;
2187235783Skib
2188235783Skiberr:
2189235783Skib	intel_sdvo_destroy(connector);
2190235783Skib	return false;
2191235783Skib}
2192235783Skib
2193235783Skibstatic bool
2194235783Skibintel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2195235783Skib{
2196235783Skib	intel_sdvo->is_tv = false;
2197235783Skib	intel_sdvo->base.needs_tv_clock = false;
2198235783Skib	intel_sdvo->is_lvds = false;
2199235783Skib
2200235783Skib	/* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2201235783Skib
2202235783Skib	if (flags & SDVO_OUTPUT_TMDS0)
2203235783Skib		if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2204235783Skib			return false;
2205235783Skib
2206235783Skib	if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2207235783Skib		if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2208235783Skib			return false;
2209235783Skib
2210235783Skib	/* TV has no XXX1 function block */
2211235783Skib	if (flags & SDVO_OUTPUT_SVID0)
2212235783Skib		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2213235783Skib			return false;
2214235783Skib
2215235783Skib	if (flags & SDVO_OUTPUT_CVBS0)
2216235783Skib		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2217235783Skib			return false;
2218235783Skib
2219280369Skib	if (flags & SDVO_OUTPUT_YPRPB0)
2220280369Skib		if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2221280369Skib			return false;
2222280369Skib
2223235783Skib	if (flags & SDVO_OUTPUT_RGB0)
2224235783Skib		if (!intel_sdvo_analog_init(intel_sdvo, 0))
2225235783Skib			return false;
2226235783Skib
2227235783Skib	if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2228235783Skib		if (!intel_sdvo_analog_init(intel_sdvo, 1))
2229235783Skib			return false;
2230235783Skib
2231235783Skib	if (flags & SDVO_OUTPUT_LVDS0)
2232235783Skib		if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2233235783Skib			return false;
2234235783Skib
2235235783Skib	if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2236235783Skib		if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2237235783Skib			return false;
2238235783Skib
2239235783Skib	if ((flags & SDVO_OUTPUT_MASK) == 0) {
2240235783Skib		unsigned char bytes[2];
2241235783Skib
2242235783Skib		intel_sdvo->controlled_output = 0;
2243235783Skib		memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2244235783Skib		DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2245235783Skib			      SDVO_NAME(intel_sdvo),
2246235783Skib			      bytes[0], bytes[1]);
2247235783Skib		return false;
2248235783Skib	}
2249235783Skib	intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2250235783Skib
2251235783Skib	return true;
2252235783Skib}
2253235783Skib
2254235783Skibstatic bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2255235783Skib					  struct intel_sdvo_connector *intel_sdvo_connector,
2256235783Skib					  int type)
2257235783Skib{
2258235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2259235783Skib	struct intel_sdvo_tv_format format;
2260235783Skib	uint32_t format_map, i;
2261235783Skib
2262235783Skib	if (!intel_sdvo_set_target_output(intel_sdvo, type))
2263235783Skib		return false;
2264235783Skib
2265235783Skib	CTASSERT(sizeof(format) == 6);
2266235783Skib	if (!intel_sdvo_get_value(intel_sdvo,
2267235783Skib				  SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2268235783Skib				  &format, sizeof(format)))
2269235783Skib		return false;
2270235783Skib
2271235783Skib	memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2272235783Skib
2273235783Skib	if (format_map == 0)
2274235783Skib		return false;
2275235783Skib
2276235783Skib	intel_sdvo_connector->format_supported_num = 0;
2277235783Skib	for (i = 0 ; i < TV_FORMAT_NUM; i++)
2278235783Skib		if (format_map & (1 << i))
2279235783Skib			intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2280235783Skib
2281235783Skib
2282235783Skib	intel_sdvo_connector->tv_format =
2283235783Skib			drm_property_create(dev, DRM_MODE_PROP_ENUM,
2284235783Skib					    "mode", intel_sdvo_connector->format_supported_num);
2285235783Skib	if (!intel_sdvo_connector->tv_format)
2286235783Skib		return false;
2287235783Skib
2288235783Skib	for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2289235783Skib		drm_property_add_enum(
2290235783Skib				intel_sdvo_connector->tv_format, i,
2291235783Skib				i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2292235783Skib
2293235783Skib	intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2294282199Sdumbbell	drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2295235783Skib				      intel_sdvo_connector->tv_format, 0);
2296235783Skib	return true;
2297235783Skib
2298235783Skib}
2299235783Skib
2300235783Skib#define ENHANCEMENT(name, NAME) do { \
2301235783Skib	if (enhancements.name) { \
2302235783Skib		if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2303235783Skib		    !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2304235783Skib			return false; \
2305235783Skib		intel_sdvo_connector->max_##name = data_value[0]; \
2306235783Skib		intel_sdvo_connector->cur_##name = response; \
2307235783Skib		intel_sdvo_connector->name = \
2308235783Skib			drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2309235783Skib		if (!intel_sdvo_connector->name) return false; \
2310282199Sdumbbell		drm_object_attach_property(&connector->base, \
2311235783Skib					      intel_sdvo_connector->name, \
2312235783Skib					      intel_sdvo_connector->cur_##name); \
2313235783Skib		DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2314235783Skib			      data_value[0], data_value[1], response); \
2315235783Skib	} \
2316235783Skib} while (0)
2317235783Skib
2318235783Skibstatic bool
2319235783Skibintel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2320235783Skib				      struct intel_sdvo_connector *intel_sdvo_connector,
2321235783Skib				      struct intel_sdvo_enhancements_reply enhancements)
2322235783Skib{
2323235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2324235783Skib	struct drm_connector *connector = &intel_sdvo_connector->base.base;
2325235783Skib	uint16_t response, data_value[2];
2326235783Skib
2327235783Skib	/* when horizontal overscan is supported, Add the left/right  property */
2328235783Skib	if (enhancements.overscan_h) {
2329235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2330235783Skib					  SDVO_CMD_GET_MAX_OVERSCAN_H,
2331235783Skib					  &data_value, 4))
2332235783Skib			return false;
2333235783Skib
2334235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2335235783Skib					  SDVO_CMD_GET_OVERSCAN_H,
2336235783Skib					  &response, 2))
2337235783Skib			return false;
2338235783Skib
2339235783Skib		intel_sdvo_connector->max_hscan = data_value[0];
2340235783Skib		intel_sdvo_connector->left_margin = data_value[0] - response;
2341235783Skib		intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2342235783Skib		intel_sdvo_connector->left =
2343235783Skib			drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2344235783Skib		if (!intel_sdvo_connector->left)
2345235783Skib			return false;
2346235783Skib
2347282199Sdumbbell		drm_object_attach_property(&connector->base,
2348235783Skib					      intel_sdvo_connector->left,
2349235783Skib					      intel_sdvo_connector->left_margin);
2350235783Skib
2351235783Skib		intel_sdvo_connector->right =
2352235783Skib			drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2353235783Skib		if (!intel_sdvo_connector->right)
2354235783Skib			return false;
2355235783Skib
2356282199Sdumbbell		drm_object_attach_property(&connector->base,
2357235783Skib					      intel_sdvo_connector->right,
2358235783Skib					      intel_sdvo_connector->right_margin);
2359235783Skib		DRM_DEBUG_KMS("h_overscan: max %d, "
2360235783Skib			      "default %d, current %d\n",
2361235783Skib			      data_value[0], data_value[1], response);
2362235783Skib	}
2363235783Skib
2364235783Skib	if (enhancements.overscan_v) {
2365235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2366235783Skib					  SDVO_CMD_GET_MAX_OVERSCAN_V,
2367235783Skib					  &data_value, 4))
2368235783Skib			return false;
2369235783Skib
2370235783Skib		if (!intel_sdvo_get_value(intel_sdvo,
2371235783Skib					  SDVO_CMD_GET_OVERSCAN_V,
2372235783Skib					  &response, 2))
2373235783Skib			return false;
2374235783Skib
2375235783Skib		intel_sdvo_connector->max_vscan = data_value[0];
2376235783Skib		intel_sdvo_connector->top_margin = data_value[0] - response;
2377235783Skib		intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2378235783Skib		intel_sdvo_connector->top =
2379235783Skib			drm_property_create_range(dev, 0,
2380235783Skib					    "top_margin", 0, data_value[0]);
2381235783Skib		if (!intel_sdvo_connector->top)
2382235783Skib			return false;
2383235783Skib
2384282199Sdumbbell		drm_object_attach_property(&connector->base,
2385235783Skib					      intel_sdvo_connector->top,
2386235783Skib					      intel_sdvo_connector->top_margin);
2387235783Skib
2388235783Skib		intel_sdvo_connector->bottom =
2389235783Skib			drm_property_create_range(dev, 0,
2390235783Skib					    "bottom_margin", 0, data_value[0]);
2391235783Skib		if (!intel_sdvo_connector->bottom)
2392235783Skib			return false;
2393235783Skib
2394282199Sdumbbell		drm_object_attach_property(&connector->base,
2395235783Skib					      intel_sdvo_connector->bottom,
2396235783Skib					      intel_sdvo_connector->bottom_margin);
2397235783Skib		DRM_DEBUG_KMS("v_overscan: max %d, "
2398235783Skib			      "default %d, current %d\n",
2399235783Skib			      data_value[0], data_value[1], response);
2400235783Skib	}
2401235783Skib
2402235783Skib	ENHANCEMENT(hpos, HPOS);
2403235783Skib	ENHANCEMENT(vpos, VPOS);
2404235783Skib	ENHANCEMENT(saturation, SATURATION);
2405235783Skib	ENHANCEMENT(contrast, CONTRAST);
2406235783Skib	ENHANCEMENT(hue, HUE);
2407235783Skib	ENHANCEMENT(sharpness, SHARPNESS);
2408235783Skib	ENHANCEMENT(brightness, BRIGHTNESS);
2409235783Skib	ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2410235783Skib	ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2411235783Skib	ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2412235783Skib	ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2413235783Skib	ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2414235783Skib
2415235783Skib	if (enhancements.dot_crawl) {
2416235783Skib		if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2417235783Skib			return false;
2418235783Skib
2419235783Skib		intel_sdvo_connector->max_dot_crawl = 1;
2420235783Skib		intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2421235783Skib		intel_sdvo_connector->dot_crawl =
2422235783Skib			drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2423235783Skib		if (!intel_sdvo_connector->dot_crawl)
2424235783Skib			return false;
2425235783Skib
2426282199Sdumbbell		drm_object_attach_property(&connector->base,
2427235783Skib					      intel_sdvo_connector->dot_crawl,
2428235783Skib					      intel_sdvo_connector->cur_dot_crawl);
2429235783Skib		DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2430235783Skib	}
2431235783Skib
2432235783Skib	return true;
2433235783Skib}
2434235783Skib
2435235783Skibstatic bool
2436235783Skibintel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2437235783Skib					struct intel_sdvo_connector *intel_sdvo_connector,
2438235783Skib					struct intel_sdvo_enhancements_reply enhancements)
2439235783Skib{
2440235783Skib	struct drm_device *dev = intel_sdvo->base.base.dev;
2441235783Skib	struct drm_connector *connector = &intel_sdvo_connector->base.base;
2442235783Skib	uint16_t response, data_value[2];
2443235783Skib
2444235783Skib	ENHANCEMENT(brightness, BRIGHTNESS);
2445235783Skib
2446235783Skib	return true;
2447235783Skib}
2448235783Skib#undef ENHANCEMENT
2449235783Skib
2450235783Skibstatic bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2451235783Skib					       struct intel_sdvo_connector *intel_sdvo_connector)
2452235783Skib{
2453235783Skib	union {
2454235783Skib		struct intel_sdvo_enhancements_reply reply;
2455235783Skib		uint16_t response;
2456235783Skib	} enhancements;
2457235783Skib
2458235783Skib	CTASSERT(sizeof(enhancements) == 2);
2459235783Skib
2460235783Skib	enhancements.response = 0;
2461235783Skib	intel_sdvo_get_value(intel_sdvo,
2462235783Skib			     SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2463235783Skib			     &enhancements, sizeof(enhancements));
2464235783Skib	if (enhancements.response == 0) {
2465235783Skib		DRM_DEBUG_KMS("No enhancement is supported\n");
2466235783Skib		return true;
2467235783Skib	}
2468235783Skib
2469235783Skib	if (IS_TV(intel_sdvo_connector))
2470235783Skib		return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2471235783Skib	else if (IS_LVDS(intel_sdvo_connector))
2472235783Skib		return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2473235783Skib	else
2474235783Skib		return true;
2475235783Skib}
2476235783Skib
2477235783Skibstruct intel_sdvo_ddc_proxy_sc {
2478235783Skib	struct intel_sdvo *intel_sdvo;
2479235783Skib	device_t port;
2480235783Skib};
2481235783Skib
2482235783Skibstatic int
2483235783Skibintel_sdvo_ddc_proxy_probe(device_t idev)
2484235783Skib{
2485235783Skib
2486235783Skib	return (BUS_PROBE_DEFAULT);
2487235783Skib}
2488235783Skib
2489235783Skibstatic int
2490235783Skibintel_sdvo_ddc_proxy_attach(device_t idev)
2491235783Skib{
2492235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2493235783Skib
2494235783Skib	sc = device_get_softc(idev);
2495235783Skib	sc->port = device_add_child(idev, "iicbus", -1);
2496235783Skib	if (sc->port == NULL)
2497235783Skib		return (ENXIO);
2498235783Skib	device_quiet(sc->port);
2499235783Skib	bus_generic_attach(idev);
2500235783Skib	return (0);
2501235783Skib}
2502235783Skib
2503235783Skibstatic int
2504235783Skibintel_sdvo_ddc_proxy_detach(device_t idev)
2505235783Skib{
2506235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2507235783Skib	device_t port;
2508235783Skib
2509235783Skib	sc = device_get_softc(idev);
2510235783Skib	port = sc->port;
2511235783Skib	bus_generic_detach(idev);
2512235783Skib	if (port != NULL)
2513235783Skib		device_delete_child(idev, port);
2514235783Skib	return (0);
2515235783Skib}
2516235783Skib
2517235783Skibstatic int
2518235783Skibintel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr,
2519235783Skib    u_char *oldaddr)
2520235783Skib{
2521235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2522235783Skib	struct intel_sdvo *sdvo;
2523235783Skib
2524235783Skib	sc = device_get_softc(idev);
2525235783Skib	sdvo = sc->intel_sdvo;
2526235783Skib
2527235783Skib	return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr,
2528235783Skib	    oldaddr));
2529235783Skib}
2530235783Skib
2531235783Skibstatic int
2532235783Skibintel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num)
2533235783Skib{
2534235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2535235783Skib	struct intel_sdvo *sdvo;
2536235783Skib
2537235783Skib	sc = device_get_softc(idev);
2538235783Skib	sdvo = sc->intel_sdvo;
2539235783Skib
2540235783Skib	if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2541235783Skib		return (EIO);
2542235783Skib
2543235783Skib	return (iicbus_transfer(sdvo->i2c, msgs, num));
2544235783Skib}
2545235783Skib
2546235783Skibstatic bool
2547235783Skibintel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev,
2548235783Skib    int sdvo_reg)
2549235783Skib{
2550235783Skib	struct intel_sdvo_ddc_proxy_sc *sc;
2551235783Skib	int ret;
2552235783Skib
2553282199Sdumbbell	sdvo->ddc_iic_bus = device_add_child(dev->dev,
2554235783Skib	    "intel_sdvo_ddc_proxy", sdvo_reg);
2555235783Skib	if (sdvo->ddc_iic_bus == NULL) {
2556235783Skib		DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg);
2557235783Skib		return (false);
2558235783Skib	}
2559235783Skib	device_quiet(sdvo->ddc_iic_bus);
2560235783Skib	ret = device_probe_and_attach(sdvo->ddc_iic_bus);
2561235783Skib	if (ret != 0) {
2562235783Skib		DRM_ERROR("cannot attach proxy bus %d error %d\n",
2563235783Skib		    sdvo_reg, ret);
2564282199Sdumbbell		device_delete_child(dev->dev, sdvo->ddc_iic_bus);
2565235783Skib		return (false);
2566235783Skib	}
2567235783Skib	sc = device_get_softc(sdvo->ddc_iic_bus);
2568235783Skib	sc->intel_sdvo = sdvo;
2569235783Skib
2570235783Skib	sdvo->ddc = sc->port;
2571235783Skib	return (true);
2572235783Skib}
2573235783Skib
2574235783Skibstatic device_method_t intel_sdvo_ddc_proxy_methods[] = {
2575235783Skib	DEVMETHOD(device_probe,		intel_sdvo_ddc_proxy_probe),
2576235783Skib	DEVMETHOD(device_attach,	intel_sdvo_ddc_proxy_attach),
2577235783Skib	DEVMETHOD(device_detach,	intel_sdvo_ddc_proxy_detach),
2578235783Skib	DEVMETHOD(iicbus_reset,		intel_sdvo_ddc_proxy_reset),
2579235783Skib	DEVMETHOD(iicbus_transfer,	intel_sdvo_ddc_proxy_transfer),
2580235783Skib	DEVMETHOD_END
2581235783Skib};
2582235783Skibstatic driver_t intel_sdvo_ddc_proxy_driver = {
2583235783Skib	"intel_sdvo_ddc_proxy",
2584235783Skib	intel_sdvo_ddc_proxy_methods,
2585235783Skib	sizeof(struct intel_sdvo_ddc_proxy_sc)
2586235783Skib};
2587235783Skibstatic devclass_t intel_sdvo_devclass;
2588235783SkibDRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver,
2589235783Skib    intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST);
2590235783Skib
2591235783Skib
2592280369Skibbool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2593235783Skib{
2594235783Skib	struct drm_i915_private *dev_priv = dev->dev_private;
2595235783Skib	struct intel_encoder *intel_encoder;
2596235783Skib	struct intel_sdvo *intel_sdvo;
2597235783Skib	int i;
2598235783Skib
2599235783Skib	intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS,
2600235783Skib	    M_WAITOK | M_ZERO);
2601235783Skib
2602235783Skib	intel_sdvo->sdvo_reg = sdvo_reg;
2603280369Skib	intel_sdvo->is_sdvob = is_sdvob;
2604280369Skib	intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2605235783Skib	intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2606235783Skib	if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) {
2607235783Skib		free(intel_sdvo, DRM_MEM_KMS);
2608235783Skib		return false;
2609235783Skib	}
2610235783Skib
2611235783Skib	/* encoder type will be decided later */
2612235783Skib	intel_encoder = &intel_sdvo->base;
2613235783Skib	intel_encoder->type = INTEL_OUTPUT_SDVO;
2614235783Skib	drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2615235783Skib
2616235783Skib	/* Read the regs to test if we can talk to the device */
2617235783Skib	for (i = 0; i < 0x40; i++) {
2618235783Skib		u8 byte;
2619235783Skib
2620235783Skib		if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2621280369Skib			DRM_DEBUG_KMS("No SDVO device found on %s\n",
2622280369Skib				      SDVO_NAME(intel_sdvo));
2623235783Skib			goto err;
2624235783Skib		}
2625235783Skib	}
2626235783Skib
2627280369Skib	if (intel_sdvo->is_sdvob)
2628235783Skib		dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2629235783Skib	else
2630235783Skib		dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2631235783Skib
2632235783Skib	drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2633235783Skib
2634235783Skib	/* In default case sdvo lvds is false */
2635235783Skib	if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2636235783Skib		goto err;
2637235783Skib
2638235783Skib	/* Set up hotplug command - note paranoia about contents of reply.
2639235783Skib	 * We assume that the hardware is in a sane state, and only touch
2640235783Skib	 * the bits we think we understand.
2641235783Skib	 */
2642235783Skib	intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2643235783Skib			     &intel_sdvo->hotplug_active, 2);
2644235783Skib	intel_sdvo->hotplug_active[0] &= ~0x3;
2645235783Skib
2646280369Skib 	if (intel_sdvo_output_setup(intel_sdvo,
2647280369Skib 				    intel_sdvo->caps.output_flags) != true) {
2648280369Skib		DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2649280369Skib			      SDVO_NAME(intel_sdvo));
2650280369Skib 		goto err;
2651280369Skib 	}
2652235783Skib
2653235783Skib	intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2654235783Skib
2655235783Skib	/* Set the input timing to the screen. Assume always input 0. */
2656235783Skib	if (!intel_sdvo_set_target_input(intel_sdvo))
2657235783Skib		goto err;
2658235783Skib
2659235783Skib	if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2660235783Skib						    &intel_sdvo->pixel_clock_min,
2661235783Skib						    &intel_sdvo->pixel_clock_max))
2662235783Skib		goto err;
2663235783Skib
2664235783Skib	DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2665235783Skib			"clock range %dMHz - %dMHz, "
2666235783Skib			"input 1: %c, input 2: %c, "
2667235783Skib			"output 1: %c, output 2: %c\n",
2668235783Skib			SDVO_NAME(intel_sdvo),
2669235783Skib			intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2670235783Skib			intel_sdvo->caps.device_rev_id,
2671235783Skib			intel_sdvo->pixel_clock_min / 1000,
2672235783Skib			intel_sdvo->pixel_clock_max / 1000,
2673235783Skib			(intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2674235783Skib			(intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2675235783Skib			/* check currently supported outputs */
2676235783Skib			intel_sdvo->caps.output_flags &
2677235783Skib			(SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2678235783Skib			intel_sdvo->caps.output_flags &
2679235783Skib			(SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2680235783Skib	return true;
2681235783Skib
2682235783Skiberr:
2683235783Skib	drm_encoder_cleanup(&intel_encoder->base);
2684235783Skib	free(intel_sdvo, DRM_MEM_KMS);
2685235783Skib
2686235783Skib	return false;
2687235783Skib}
2688