1/* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright �� 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: releng/10.3/sys/dev/drm2/i915/intel_sdvo.c 282199 2015-04-28 19:35:05Z dumbbell $"); 31 32#include <dev/drm2/drmP.h> 33#include <dev/drm2/drm.h> 34#include <dev/drm2/drm_crtc.h> 35#include <dev/drm2/drm_edid.h> 36#include <dev/drm2/i915/i915_drm.h> 37#include <dev/drm2/i915/i915_drv.h> 38#include <dev/drm2/i915/intel_sdvo_regs.h> 39#include <dev/drm2/i915/intel_drv.h> 40#include <dev/iicbus/iic.h> 41#include <dev/iicbus/iiconf.h> 42#include "iicbus_if.h" 43 44#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 45#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 46#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 47#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0) 48 49#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 50 SDVO_TV_MASK) 51 52#define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 53#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 54#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 55#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 56#define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK)) 57 58 59static const char *tv_format_names[] = { 60 "NTSC_M" , "NTSC_J" , "NTSC_443", 61 "PAL_B" , "PAL_D" , "PAL_G" , 62 "PAL_H" , "PAL_I" , "PAL_M" , 63 "PAL_N" , "PAL_NC" , "PAL_60" , 64 "SECAM_B" , "SECAM_D" , "SECAM_G" , 65 "SECAM_K" , "SECAM_K1", "SECAM_L" , 66 "SECAM_60" 67}; 68 69#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 70 71struct intel_sdvo { 72 struct intel_encoder base; 73 74 device_t i2c; 75 u8 slave_addr; 76 77 device_t ddc_iic_bus, ddc; 78 79 /* Register for the SDVO device: SDVOB or SDVOC */ 80 uint32_t sdvo_reg; 81 82 /* Active outputs controlled by this SDVO output */ 83 uint16_t controlled_output; 84 85 /* 86 * Capabilities of the SDVO device returned by 87 * i830_sdvo_get_capabilities() 88 */ 89 struct intel_sdvo_caps caps; 90 91 /* Pixel clock limitations reported by the SDVO device, in kHz */ 92 int pixel_clock_min, pixel_clock_max; 93 94 /* 95 * For multiple function SDVO device, 96 * this is for current attached outputs. 97 */ 98 uint16_t attached_output; 99 100 /* 101 * Hotplug activation bits for this device 102 */ 103 uint8_t hotplug_active[2]; 104 105 /** 106 * This is used to select the color range of RBG outputs in HDMI mode. 107 * It is only valid when using TMDS encoding and 8 bit per color mode. 108 */ 109 uint32_t color_range; 110 111 /** 112 * This is set if we're going to treat the device as TV-out. 113 * 114 * While we have these nice friendly flags for output types that ought 115 * to decide this for us, the S-Video output on our HDMI+S-Video card 116 * shows up as RGB1 (VGA). 117 */ 118 bool is_tv; 119 120 /* On different gens SDVOB is at different places. */ 121 bool is_sdvob; 122 123 /* This is for current tv format name */ 124 int tv_format_index; 125 126 /** 127 * This is set if we treat the device as HDMI, instead of DVI. 128 */ 129 bool is_hdmi; 130 bool has_hdmi_monitor; 131 bool has_hdmi_audio; 132 133 /** 134 * This is set if we detect output of sdvo device as LVDS and 135 * have a valid fixed mode to use with the panel. 136 */ 137 bool is_lvds; 138 139 /** 140 * This is sdvo fixed pannel mode pointer 141 */ 142 struct drm_display_mode *sdvo_lvds_fixed_mode; 143 144 /* DDC bus used by this SDVO encoder */ 145 uint8_t ddc_bus; 146 147 /* Input timings for adjusted_mode */ 148 struct intel_sdvo_dtd input_dtd; 149}; 150 151struct intel_sdvo_connector { 152 struct intel_connector base; 153 154 /* Mark the type of connector */ 155 uint16_t output_flag; 156 157 enum hdmi_force_audio force_audio; 158 159 /* This contains all current supported TV format */ 160 u8 tv_format_supported[TV_FORMAT_NUM]; 161 int format_supported_num; 162 struct drm_property *tv_format; 163 164 /* add the property for the SDVO-TV */ 165 struct drm_property *left; 166 struct drm_property *right; 167 struct drm_property *top; 168 struct drm_property *bottom; 169 struct drm_property *hpos; 170 struct drm_property *vpos; 171 struct drm_property *contrast; 172 struct drm_property *saturation; 173 struct drm_property *hue; 174 struct drm_property *sharpness; 175 struct drm_property *flicker_filter; 176 struct drm_property *flicker_filter_adaptive; 177 struct drm_property *flicker_filter_2d; 178 struct drm_property *tv_chroma_filter; 179 struct drm_property *tv_luma_filter; 180 struct drm_property *dot_crawl; 181 182 /* add the property for the SDVO-TV/LVDS */ 183 struct drm_property *brightness; 184 185 /* Add variable to record current setting for the above property */ 186 u32 left_margin, right_margin, top_margin, bottom_margin; 187 188 /* this is to get the range of margin.*/ 189 u32 max_hscan, max_vscan; 190 u32 max_hpos, cur_hpos; 191 u32 max_vpos, cur_vpos; 192 u32 cur_brightness, max_brightness; 193 u32 cur_contrast, max_contrast; 194 u32 cur_saturation, max_saturation; 195 u32 cur_hue, max_hue; 196 u32 cur_sharpness, max_sharpness; 197 u32 cur_flicker_filter, max_flicker_filter; 198 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 199 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 200 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 201 u32 cur_tv_luma_filter, max_tv_luma_filter; 202 u32 cur_dot_crawl, max_dot_crawl; 203}; 204 205static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder) 206{ 207 return container_of(encoder, struct intel_sdvo, base.base); 208} 209 210static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 211{ 212 return container_of(intel_attached_encoder(connector), 213 struct intel_sdvo, base); 214} 215 216static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector) 217{ 218 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base); 219} 220 221static bool 222intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags); 223static bool 224intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 225 struct intel_sdvo_connector *intel_sdvo_connector, 226 int type); 227static bool 228intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 229 struct intel_sdvo_connector *intel_sdvo_connector); 230 231/** 232 * Writes the SDVOB or SDVOC with the given value, but always writes both 233 * SDVOB and SDVOC to work around apparent hardware issues (according to 234 * comments in the BIOS). 235 */ 236static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val) 237{ 238 struct drm_device *dev = intel_sdvo->base.base.dev; 239 struct drm_i915_private *dev_priv = dev->dev_private; 240 u32 bval = val, cval = val; 241 int i; 242 243 if (intel_sdvo->sdvo_reg == PCH_SDVOB) { 244 I915_WRITE(intel_sdvo->sdvo_reg, val); 245 I915_READ(intel_sdvo->sdvo_reg); 246 return; 247 } 248 249 if (intel_sdvo->sdvo_reg == SDVOB) { 250 cval = I915_READ(SDVOC); 251 } else { 252 bval = I915_READ(SDVOB); 253 } 254 /* 255 * Write the registers twice for luck. Sometimes, 256 * writing them only once doesn't appear to 'stick'. 257 * The BIOS does this too. Yay, magic 258 */ 259 for (i = 0; i < 2; i++) 260 { 261 I915_WRITE(SDVOB, bval); 262 I915_READ(SDVOB); 263 I915_WRITE(SDVOC, cval); 264 I915_READ(SDVOC); 265 } 266} 267 268static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) 269{ 270 struct iic_msg msgs[] = { 271 { 272 .slave = intel_sdvo->slave_addr << 1, 273 .flags = 0, 274 .len = 1, 275 .buf = &addr, 276 }, 277 { 278 .slave = intel_sdvo->slave_addr << 1, 279 .flags = IIC_M_RD, 280 .len = 1, 281 .buf = ch, 282 } 283 }; 284 int ret; 285 286 if ((ret = iicbus_transfer(intel_sdvo->i2c, msgs, 2)) == 0) 287 return true; 288 289 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 290 return false; 291} 292 293#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 294/** Mapping of command numbers to names, for debug output */ 295static const struct _sdvo_cmd_name { 296 u8 cmd; 297 const char *name; 298} sdvo_cmd_names[] = { 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 342 343 /* Add the op code for SDVO enhancements */ 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 388 389 /* HDMI op code */ 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 408 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 409 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 410}; 411 412#define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC") 413 414static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd, 415 const void *args, int args_len) 416{ 417 int i; 418 419 if ((drm_debug & DRM_DEBUGBITS_KMS) == 0) 420 return; 421 DRM_DEBUG_KMS("%s: W: %02X ", SDVO_NAME(intel_sdvo), cmd); 422 for (i = 0; i < args_len; i++) 423 printf("%02X ", ((const u8 *)args)[i]); 424 for (; i < 8; i++) 425 printf(" "); 426 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 427 if (cmd == sdvo_cmd_names[i].cmd) { 428 printf("(%s)", sdvo_cmd_names[i].name); 429 break; 430 } 431 } 432 if (i == ARRAY_SIZE(sdvo_cmd_names)) 433 printf("(%02X)", cmd); 434 printf("\n"); 435} 436 437static const char *cmd_status_names[] = { 438 "Power on", 439 "Success", 440 "Not supported", 441 "Invalid arg", 442 "Pending", 443 "Target not specified", 444 "Scaling not supported" 445}; 446 447static bool 448intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args, 449 int args_len) 450{ 451 u8 buf[args_len*2 + 2], status; 452 struct iic_msg msgs[args_len + 3]; 453 int i, ret; 454 455 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); 456 457 for (i = 0; i < args_len; i++) { 458 msgs[i].slave = intel_sdvo->slave_addr << 1; 459 msgs[i].flags = 0; 460 msgs[i].len = 2; 461 msgs[i].buf = buf + 2 *i; 462 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 463 buf[2*i + 1] = ((const u8*)args)[i]; 464 } 465 msgs[i].slave = intel_sdvo->slave_addr << 1; 466 msgs[i].flags = 0; 467 msgs[i].len = 2; 468 msgs[i].buf = buf + 2*i; 469 buf[2*i + 0] = SDVO_I2C_OPCODE; 470 buf[2*i + 1] = cmd; 471 472 /* the following two are to read the response */ 473 status = SDVO_I2C_CMD_STATUS; 474 msgs[i+1].slave = intel_sdvo->slave_addr << 1; 475 msgs[i+1].flags = 0; 476 msgs[i+1].len = 1; 477 msgs[i+1].buf = &status; 478 479 msgs[i+2].slave = intel_sdvo->slave_addr << 1; 480 msgs[i+2].flags = IIC_M_RD; 481 msgs[i+2].len = 1; 482 msgs[i+2].buf = &status; 483 484 ret = iicbus_transfer(intel_sdvo->i2c, msgs, i+3); 485 if (ret != 0) { 486 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 487 return (false); 488 } 489#if 0 490 if (ret != i+3) { 491 /* failure in I2C transfer */ 492 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 493 return false; 494 } 495#endif 496 497 return true; 498} 499 500static bool 501intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, void *response, 502 int response_len) 503{ 504 u8 retry = 5; 505 u8 status; 506 int i; 507 508 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); 509 510 /* 511 * The documentation states that all commands will be 512 * processed within 15��s, and that we need only poll 513 * the status byte a maximum of 3 times in order for the 514 * command to be complete. 515 * 516 * Check 5 times in case the hardware failed to read the docs. 517 */ 518 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS, &status)) 519 goto log_fail; 520 521 while (status == SDVO_CMD_STATUS_PENDING && retry--) { 522 DELAY(15); 523 if (!intel_sdvo_read_byte(intel_sdvo, 524 SDVO_I2C_CMD_STATUS, &status)) 525 goto log_fail; 526 } 527 528 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) { 529 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 530 printf("(%s)", cmd_status_names[status]); 531 else 532 printf("(??? %d)", status); 533 } 534 535 if (status != SDVO_CMD_STATUS_SUCCESS) 536 goto log_fail; 537 538 /* Read the command response */ 539 for (i = 0; i < response_len; i++) { 540 if (!intel_sdvo_read_byte(intel_sdvo, 541 SDVO_I2C_RETURN_0 + i, 542 &((u8 *)response)[i])) 543 goto log_fail; 544 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 545 printf(" %02X", ((u8 *)response)[i]); 546 } 547 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 548 printf("\n"); 549 return (true); 550 551log_fail: 552 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) 553 printf("... failed\n"); 554 return (false); 555} 556 557static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 558{ 559 if (mode->clock >= 100000) 560 return 1; 561 else if (mode->clock >= 50000) 562 return 2; 563 else 564 return 4; 565} 566 567static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, 568 u8 ddc_bus) 569{ 570 /* This must be the immediately preceding write before the i2c xfer */ 571 return intel_sdvo_write_cmd(intel_sdvo, 572 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 573 &ddc_bus, 1); 574} 575 576static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) 577{ 578 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) 579 return false; 580 581 return intel_sdvo_read_response(intel_sdvo, NULL, 0); 582} 583 584static bool 585intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len) 586{ 587 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0)) 588 return false; 589 590 return intel_sdvo_read_response(intel_sdvo, value, len); 591} 592 593static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo) 594{ 595 struct intel_sdvo_set_target_input_args targets = {0}; 596 return intel_sdvo_set_value(intel_sdvo, 597 SDVO_CMD_SET_TARGET_INPUT, 598 &targets, sizeof(targets)); 599} 600 601/** 602 * Return whether each input is trained. 603 * 604 * This function is making an assumption about the layout of the response, 605 * which should be checked against the docs. 606 */ 607static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2) 608{ 609 struct intel_sdvo_get_trained_inputs_response response; 610 611 CTASSERT(sizeof(response) == 1); 612 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 613 &response, sizeof(response))) 614 return false; 615 616 *input_1 = response.input0_trained; 617 *input_2 = response.input1_trained; 618 return true; 619} 620 621static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo, 622 u16 outputs) 623{ 624 return intel_sdvo_set_value(intel_sdvo, 625 SDVO_CMD_SET_ACTIVE_OUTPUTS, 626 &outputs, sizeof(outputs)); 627} 628 629static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, 630 int mode) 631{ 632 u8 state = SDVO_ENCODER_STATE_ON; 633 634 switch (mode) { 635 case DRM_MODE_DPMS_ON: 636 state = SDVO_ENCODER_STATE_ON; 637 break; 638 case DRM_MODE_DPMS_STANDBY: 639 state = SDVO_ENCODER_STATE_STANDBY; 640 break; 641 case DRM_MODE_DPMS_SUSPEND: 642 state = SDVO_ENCODER_STATE_SUSPEND; 643 break; 644 case DRM_MODE_DPMS_OFF: 645 state = SDVO_ENCODER_STATE_OFF; 646 break; 647 } 648 649 return intel_sdvo_set_value(intel_sdvo, 650 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 651} 652 653static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, 654 int *clock_min, 655 int *clock_max) 656{ 657 struct intel_sdvo_pixel_clock_range clocks; 658 659 CTASSERT(sizeof(clocks) == 4); 660 if (!intel_sdvo_get_value(intel_sdvo, 661 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 662 &clocks, sizeof(clocks))) 663 return false; 664 665 /* Convert the values from units of 10 kHz to kHz. */ 666 *clock_min = clocks.min * 10; 667 *clock_max = clocks.max * 10; 668 return true; 669} 670 671static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo, 672 u16 outputs) 673{ 674 return intel_sdvo_set_value(intel_sdvo, 675 SDVO_CMD_SET_TARGET_OUTPUT, 676 &outputs, sizeof(outputs)); 677} 678 679static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd, 680 struct intel_sdvo_dtd *dtd) 681{ 682 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 683 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 684} 685 686static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo, 687 struct intel_sdvo_dtd *dtd) 688{ 689 return intel_sdvo_set_timing(intel_sdvo, 690 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 691} 692 693static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo, 694 struct intel_sdvo_dtd *dtd) 695{ 696 return intel_sdvo_set_timing(intel_sdvo, 697 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 698} 699 700static bool 701intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo, 702 uint16_t clock, 703 uint16_t width, 704 uint16_t height) 705{ 706 struct intel_sdvo_preferred_input_timing_args args; 707 708 memset(&args, 0, sizeof(args)); 709 args.clock = clock; 710 args.width = width; 711 args.height = height; 712 args.interlace = 0; 713 714 if (intel_sdvo->is_lvds && 715 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 716 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 717 args.scaled = 1; 718 719 return intel_sdvo_set_value(intel_sdvo, 720 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 721 &args, sizeof(args)); 722} 723 724static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo, 725 struct intel_sdvo_dtd *dtd) 726{ 727 CTASSERT(sizeof(dtd->part1) == 8); 728 CTASSERT(sizeof(dtd->part2) == 8); 729 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 730 &dtd->part1, sizeof(dtd->part1)) && 731 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 732 &dtd->part2, sizeof(dtd->part2)); 733} 734 735static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val) 736{ 737 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 738} 739 740static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd, 741 const struct drm_display_mode *mode) 742{ 743 uint16_t width, height; 744 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 745 uint16_t h_sync_offset, v_sync_offset; 746 int mode_clock; 747 748 width = mode->hdisplay; 749 height = mode->vdisplay; 750 751 /* do some mode translations */ 752 h_blank_len = mode->htotal - mode->hdisplay; 753 h_sync_len = mode->hsync_end - mode->hsync_start; 754 755 v_blank_len = mode->vtotal - mode->vdisplay; 756 v_sync_len = mode->vsync_end - mode->vsync_start; 757 758 h_sync_offset = mode->hsync_start - mode->hdisplay; 759 v_sync_offset = mode->vsync_start - mode->vdisplay; 760 761 mode_clock = mode->clock; 762 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1; 763 mode_clock /= 10; 764 dtd->part1.clock = mode_clock; 765 766 dtd->part1.h_active = width & 0xff; 767 dtd->part1.h_blank = h_blank_len & 0xff; 768 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 769 ((h_blank_len >> 8) & 0xf); 770 dtd->part1.v_active = height & 0xff; 771 dtd->part1.v_blank = v_blank_len & 0xff; 772 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 773 ((v_blank_len >> 8) & 0xf); 774 775 dtd->part2.h_sync_off = h_sync_offset & 0xff; 776 dtd->part2.h_sync_width = h_sync_len & 0xff; 777 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 778 (v_sync_len & 0xf); 779 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 780 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 781 ((v_sync_len & 0x30) >> 4); 782 783 dtd->part2.dtd_flags = 0x18; 784 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 785 dtd->part2.dtd_flags |= 0x2; 786 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 787 dtd->part2.dtd_flags |= 0x4; 788 789 dtd->part2.sdvo_flags = 0; 790 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 791 dtd->part2.reserved = 0; 792} 793 794static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 795 const struct intel_sdvo_dtd *dtd) 796{ 797 mode->hdisplay = dtd->part1.h_active; 798 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 799 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 800 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 801 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 802 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 803 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 804 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 805 806 mode->vdisplay = dtd->part1.v_active; 807 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 808 mode->vsync_start = mode->vdisplay; 809 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 810 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 811 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 812 mode->vsync_end = mode->vsync_start + 813 (dtd->part2.v_sync_off_width & 0xf); 814 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 815 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 816 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 817 818 mode->clock = dtd->part1.clock * 10; 819 820 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 821 if (dtd->part2.dtd_flags & 0x2) 822 mode->flags |= DRM_MODE_FLAG_PHSYNC; 823 if (dtd->part2.dtd_flags & 0x4) 824 mode->flags |= DRM_MODE_FLAG_PVSYNC; 825} 826 827static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo) 828{ 829 struct intel_sdvo_encode encode; 830 831 CTASSERT(sizeof(encode) == 2); 832 return intel_sdvo_get_value(intel_sdvo, 833 SDVO_CMD_GET_SUPP_ENCODE, 834 &encode, sizeof(encode)); 835} 836 837static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo, 838 uint8_t mode) 839{ 840 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 841} 842 843static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo, 844 uint8_t mode) 845{ 846 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 847} 848 849#if 0 850static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) 851{ 852 int i, j; 853 uint8_t set_buf_index[2]; 854 uint8_t av_split; 855 uint8_t buf_size; 856 uint8_t buf[48]; 857 uint8_t *pos; 858 859 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 860 861 for (i = 0; i <= av_split; i++) { 862 set_buf_index[0] = i; set_buf_index[1] = 0; 863 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 864 set_buf_index, 2); 865 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 866 intel_sdvo_read_response(encoder, &buf_size, 1); 867 868 pos = buf; 869 for (j = 0; j <= buf_size; j += 8) { 870 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 871 NULL, 0); 872 intel_sdvo_read_response(encoder, pos, 8); 873 pos += 8; 874 } 875 } 876} 877#endif 878 879static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) 880{ 881 struct dip_infoframe avi_if = { 882 .type = DIP_TYPE_AVI, 883 .ver = DIP_VERSION_AVI, 884 .len = DIP_LEN_AVI, 885 }; 886 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 887 uint8_t set_buf_index[2] = { 1, 0 }; 888 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; 889 uint64_t *data = (uint64_t *)sdvo_data; 890 unsigned i; 891 892 intel_dip_infoframe_csum(&avi_if); 893 894 /* sdvo spec says that the ecc is handled by the hw, and it looks like 895 * we must not send the ecc field, either. */ 896 memcpy(sdvo_data, &avi_if, 3); 897 sdvo_data[3] = avi_if.checksum; 898 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); 899 900 if (!intel_sdvo_set_value(intel_sdvo, 901 SDVO_CMD_SET_HBUF_INDEX, 902 set_buf_index, 2)) 903 return false; 904 905 for (i = 0; i < sizeof(sdvo_data); i += 8) { 906 if (!intel_sdvo_set_value(intel_sdvo, 907 SDVO_CMD_SET_HBUF_DATA, 908 data, 8)) 909 return false; 910 data++; 911 } 912 913 return intel_sdvo_set_value(intel_sdvo, 914 SDVO_CMD_SET_HBUF_TXRATE, 915 &tx_rate, 1); 916} 917 918static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) 919{ 920 struct intel_sdvo_tv_format format; 921 uint32_t format_map; 922 923 format_map = 1 << intel_sdvo->tv_format_index; 924 memset(&format, 0, sizeof(format)); 925 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 926 927 CTASSERT(sizeof(format) == 6); 928 return intel_sdvo_set_value(intel_sdvo, 929 SDVO_CMD_SET_TV_FORMAT, 930 &format, sizeof(format)); 931} 932 933static bool 934intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo, 935 const struct drm_display_mode *mode) 936{ 937 struct intel_sdvo_dtd output_dtd; 938 939 if (!intel_sdvo_set_target_output(intel_sdvo, 940 intel_sdvo->attached_output)) 941 return false; 942 943 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 944 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd)) 945 return false; 946 947 return true; 948} 949 950static bool 951intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo, 952 const struct drm_display_mode *mode, 953 struct drm_display_mode *adjusted_mode) 954{ 955 /* Reset the input timing to the screen. Assume always input 0. */ 956 if (!intel_sdvo_set_target_input(intel_sdvo)) 957 return false; 958 959 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo, 960 mode->clock / 10, 961 mode->hdisplay, 962 mode->vdisplay)) 963 return false; 964 965 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo, 966 &intel_sdvo->input_dtd)) 967 return false; 968 969 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd); 970 971 return true; 972} 973 974static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, 975 const struct drm_display_mode *mode, 976 struct drm_display_mode *adjusted_mode) 977{ 978 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 979 int multiplier; 980 981 /* We need to construct preferred input timings based on our 982 * output timings. To do that, we have to set the output 983 * timings, even though this isn't really the right place in 984 * the sequence to do it. Oh well. 985 */ 986 if (intel_sdvo->is_tv) { 987 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode)) 988 return false; 989 990 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 991 mode, 992 adjusted_mode); 993 } else if (intel_sdvo->is_lvds) { 994 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, 995 intel_sdvo->sdvo_lvds_fixed_mode)) 996 return false; 997 998 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo, 999 mode, 1000 adjusted_mode); 1001 } 1002 1003 /* Make the CRTC code factor in the SDVO pixel multiplier. The 1004 * SDVO device will factor out the multiplier during mode_set. 1005 */ 1006 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode); 1007 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 1008 1009 return true; 1010} 1011 1012static void intel_sdvo_mode_set(struct drm_encoder *encoder, 1013 struct drm_display_mode *mode, 1014 struct drm_display_mode *adjusted_mode) 1015{ 1016 struct drm_device *dev = encoder->dev; 1017 struct drm_i915_private *dev_priv = dev->dev_private; 1018 struct drm_crtc *crtc = encoder->crtc; 1019 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1020 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1021 u32 sdvox; 1022 struct intel_sdvo_in_out_map in_out; 1023 struct intel_sdvo_dtd input_dtd, output_dtd; 1024 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode); 1025 int rate; 1026 1027 if (!mode) 1028 return; 1029 1030 /* First, set the input mapping for the first input to our controlled 1031 * output. This is only correct if we're a single-input device, in 1032 * which case the first input is the output from the appropriate SDVO 1033 * channel on the motherboard. In a two-input device, the first input 1034 * will be SDVOB and the second SDVOC. 1035 */ 1036 in_out.in0 = intel_sdvo->attached_output; 1037 in_out.in1 = 0; 1038 1039 intel_sdvo_set_value(intel_sdvo, 1040 SDVO_CMD_SET_IN_OUT_MAP, 1041 &in_out, sizeof(in_out)); 1042 1043 /* Set the output timings to the screen */ 1044 if (!intel_sdvo_set_target_output(intel_sdvo, 1045 intel_sdvo->attached_output)) 1046 return; 1047 1048 /* lvds has a special fixed output timing. */ 1049 if (intel_sdvo->is_lvds) 1050 intel_sdvo_get_dtd_from_mode(&output_dtd, 1051 intel_sdvo->sdvo_lvds_fixed_mode); 1052 else 1053 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1054 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd); 1055 1056 /* Set the input timing to the screen. Assume always input 0. */ 1057 if (!intel_sdvo_set_target_input(intel_sdvo)) 1058 return; 1059 1060 if (intel_sdvo->has_hdmi_monitor) { 1061 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI); 1062 intel_sdvo_set_colorimetry(intel_sdvo, 1063 SDVO_COLORIMETRY_RGB256); 1064 intel_sdvo_set_avi_infoframe(intel_sdvo); 1065 } else 1066 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI); 1067 1068 if (intel_sdvo->is_tv && 1069 !intel_sdvo_set_tv_format(intel_sdvo)) 1070 return; 1071 1072 /* We have tried to get input timing in mode_fixup, and filled into 1073 * adjusted_mode. 1074 */ 1075 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1076 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd); 1077 1078 switch (pixel_multiplier) { 1079 default: 1080 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1081 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1082 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1083 } 1084 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate)) 1085 return; 1086 1087 /* Set the SDVO control regs. */ 1088 if (INTEL_INFO(dev)->gen >= 4) { 1089 /* The real mode polarity is set by the SDVO commands, using 1090 * struct intel_sdvo_dtd. */ 1091 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; 1092 if (intel_sdvo->is_hdmi) 1093 sdvox |= intel_sdvo->color_range; 1094 if (INTEL_INFO(dev)->gen < 5) 1095 sdvox |= SDVO_BORDER_ENABLE; 1096 } else { 1097 sdvox = I915_READ(intel_sdvo->sdvo_reg); 1098 switch (intel_sdvo->sdvo_reg) { 1099 case SDVOB: 1100 sdvox &= SDVOB_PRESERVE_MASK; 1101 break; 1102 case SDVOC: 1103 sdvox &= SDVOC_PRESERVE_MASK; 1104 break; 1105 } 1106 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1107 } 1108 1109 if (INTEL_PCH_TYPE(dev) >= PCH_CPT) 1110 sdvox |= TRANSCODER_CPT(intel_crtc->pipe); 1111 else 1112 sdvox |= TRANSCODER(intel_crtc->pipe); 1113 1114 if (intel_sdvo->has_hdmi_audio) 1115 sdvox |= SDVO_AUDIO_ENABLE; 1116 1117 if (INTEL_INFO(dev)->gen >= 4) { 1118 /* done in crtc_mode_set as the dpll_md reg must be written early */ 1119 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { 1120 /* done in crtc_mode_set as it lives inside the dpll register */ 1121 } else { 1122 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1123 } 1124 1125 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL && 1126 INTEL_INFO(dev)->gen < 5) 1127 sdvox |= SDVO_STALL_SELECT; 1128 intel_sdvo_write_sdvox(intel_sdvo, sdvox); 1129} 1130 1131static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1132{ 1133 struct drm_device *dev = encoder->dev; 1134 struct drm_i915_private *dev_priv = dev->dev_private; 1135 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1136 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); 1137 u32 temp; 1138 1139 if (mode != DRM_MODE_DPMS_ON) { 1140 intel_sdvo_set_active_outputs(intel_sdvo, 0); 1141 if (0) 1142 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1143 1144 if (mode == DRM_MODE_DPMS_OFF) { 1145 temp = I915_READ(intel_sdvo->sdvo_reg); 1146 if ((temp & SDVO_ENABLE) != 0) { 1147 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE); 1148 } 1149 } 1150 } else { 1151 bool input1, input2; 1152 int i; 1153 u8 status; 1154 1155 temp = I915_READ(intel_sdvo->sdvo_reg); 1156 if ((temp & SDVO_ENABLE) == 0) 1157 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE); 1158 for (i = 0; i < 2; i++) 1159 intel_wait_for_vblank(dev, intel_crtc->pipe); 1160 1161 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2); 1162 /* Warn if the device reported failure to sync. 1163 * A lot of SDVO devices fail to notify of sync, but it's 1164 * a given it the status is a success, we succeeded. 1165 */ 1166 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1167 DRM_DEBUG_KMS("First %s output reported failure to " 1168 "sync\n", SDVO_NAME(intel_sdvo)); 1169 } 1170 1171 if (0) 1172 intel_sdvo_set_encoder_power_state(intel_sdvo, mode); 1173 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); 1174 } 1175 return; 1176} 1177 1178static int intel_sdvo_mode_valid(struct drm_connector *connector, 1179 struct drm_display_mode *mode) 1180{ 1181 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1182 1183 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1184 return MODE_NO_DBLESCAN; 1185 1186 if (intel_sdvo->pixel_clock_min > mode->clock) 1187 return MODE_CLOCK_LOW; 1188 1189 if (intel_sdvo->pixel_clock_max < mode->clock) 1190 return MODE_CLOCK_HIGH; 1191 1192 if (intel_sdvo->is_lvds) { 1193 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1194 return MODE_PANEL; 1195 1196 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1197 return MODE_PANEL; 1198 } 1199 1200 return MODE_OK; 1201} 1202 1203static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps) 1204{ 1205 CTASSERT(sizeof(*caps) == 8); 1206 if (!intel_sdvo_get_value(intel_sdvo, 1207 SDVO_CMD_GET_DEVICE_CAPS, 1208 caps, sizeof(*caps))) 1209 return false; 1210 1211 DRM_DEBUG_KMS("SDVO capabilities:\n" 1212 " vendor_id: %d\n" 1213 " device_id: %d\n" 1214 " device_rev_id: %d\n" 1215 " sdvo_version_major: %d\n" 1216 " sdvo_version_minor: %d\n" 1217 " sdvo_inputs_mask: %d\n" 1218 " smooth_scaling: %d\n" 1219 " sharp_scaling: %d\n" 1220 " up_scaling: %d\n" 1221 " down_scaling: %d\n" 1222 " stall_support: %d\n" 1223 " output_flags: %d\n", 1224 caps->vendor_id, 1225 caps->device_id, 1226 caps->device_rev_id, 1227 caps->sdvo_version_major, 1228 caps->sdvo_version_minor, 1229 caps->sdvo_inputs_mask, 1230 caps->smooth_scaling, 1231 caps->sharp_scaling, 1232 caps->up_scaling, 1233 caps->down_scaling, 1234 caps->stall_support, 1235 caps->output_flags); 1236 1237 return true; 1238} 1239 1240static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo) 1241{ 1242 struct drm_device *dev = intel_sdvo->base.base.dev; 1243 u8 response[2]; 1244 1245 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise 1246 * on the line. */ 1247 if (IS_I945G(dev) || IS_I945GM(dev)) 1248 return false; 1249 1250 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1251 &response, 2) && response[0]; 1252} 1253 1254static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder) 1255{ 1256 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base); 1257 1258 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, 1259 &intel_sdvo->hotplug_active, 2); 1260} 1261 1262static bool 1263intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo) 1264{ 1265 /* Is there more than one type of output? */ 1266 return bitcount16(intel_sdvo->caps.output_flags) > 1; 1267} 1268 1269static struct edid * 1270intel_sdvo_get_edid(struct drm_connector *connector) 1271{ 1272 struct intel_sdvo *sdvo = intel_attached_sdvo(connector); 1273 return drm_get_edid(connector, sdvo->ddc); 1274} 1275 1276/* Mac mini hack -- use the same DDC as the analog connector */ 1277static struct edid * 1278intel_sdvo_get_analog_edid(struct drm_connector *connector) 1279{ 1280 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1281 1282 return drm_get_edid(connector, 1283 intel_gmbus_get_adapter(dev_priv, 1284 dev_priv->crt_ddc_pin)); 1285} 1286 1287static enum drm_connector_status 1288intel_sdvo_tmds_sink_detect(struct drm_connector *connector) 1289{ 1290 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1291 enum drm_connector_status status; 1292 struct edid *edid; 1293 1294 edid = intel_sdvo_get_edid(connector); 1295 1296 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) { 1297 u8 ddc, saved_ddc = intel_sdvo->ddc_bus; 1298 1299 /* 1300 * Don't use the 1 as the argument of DDC bus switch to get 1301 * the EDID. It is used for SDVO SPD ROM. 1302 */ 1303 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1304 intel_sdvo->ddc_bus = ddc; 1305 edid = intel_sdvo_get_edid(connector); 1306 if (edid) 1307 break; 1308 } 1309 /* 1310 * If we found the EDID on the other bus, 1311 * assume that is the correct DDC bus. 1312 */ 1313 if (edid == NULL) 1314 intel_sdvo->ddc_bus = saved_ddc; 1315 } 1316 1317 /* 1318 * When there is no edid and no monitor is connected with VGA 1319 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1320 */ 1321 if (edid == NULL) 1322 edid = intel_sdvo_get_analog_edid(connector); 1323 1324 status = connector_status_unknown; 1325 if (edid != NULL) { 1326 /* DDC bus is shared, match EDID to connector type */ 1327 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1328 status = connector_status_connected; 1329 if (intel_sdvo->is_hdmi) { 1330 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1331 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1332 } 1333 } else 1334 status = connector_status_disconnected; 1335 free(edid, DRM_MEM_KMS); 1336 } 1337 1338 if (status == connector_status_connected) { 1339 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1340 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO) 1341 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON); 1342 } 1343 1344 return status; 1345} 1346 1347static bool 1348intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo, 1349 struct edid *edid) 1350{ 1351 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1352 bool connector_is_digital = !!IS_DIGITAL(sdvo); 1353 1354 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n", 1355 connector_is_digital, monitor_is_digital); 1356 return connector_is_digital == monitor_is_digital; 1357} 1358 1359static enum drm_connector_status 1360intel_sdvo_detect(struct drm_connector *connector, bool force) 1361{ 1362 uint16_t response; 1363 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1364 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1365 enum drm_connector_status ret; 1366 1367 if (!intel_sdvo_write_cmd(intel_sdvo, 1368 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1369 return connector_status_unknown; 1370 1371 /* add 30ms delay when the output type might be TV */ 1372 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK) 1373 drm_msleep(30, "915svo"); 1374 1375 if (!intel_sdvo_read_response(intel_sdvo, &response, 2)) 1376 return connector_status_unknown; 1377 1378 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1379 response & 0xff, response >> 8, 1380 intel_sdvo_connector->output_flag); 1381 1382 if (response == 0) 1383 return connector_status_disconnected; 1384 1385 intel_sdvo->attached_output = response; 1386 1387 intel_sdvo->has_hdmi_monitor = false; 1388 intel_sdvo->has_hdmi_audio = false; 1389 1390 if ((intel_sdvo_connector->output_flag & response) == 0) 1391 ret = connector_status_disconnected; 1392 else if (IS_TMDS(intel_sdvo_connector)) 1393 ret = intel_sdvo_tmds_sink_detect(connector); 1394 else { 1395 struct edid *edid; 1396 1397 /* if we have an edid check it matches the connection */ 1398 edid = intel_sdvo_get_edid(connector); 1399 if (edid == NULL) 1400 edid = intel_sdvo_get_analog_edid(connector); 1401 if (edid != NULL) { 1402 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector, 1403 edid)) 1404 ret = connector_status_connected; 1405 else 1406 ret = connector_status_disconnected; 1407 1408 free(edid, DRM_MEM_KMS); 1409 } else 1410 ret = connector_status_connected; 1411 } 1412 1413 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1414 if (ret == connector_status_connected) { 1415 intel_sdvo->is_tv = false; 1416 intel_sdvo->is_lvds = false; 1417 intel_sdvo->base.needs_tv_clock = false; 1418 1419 if (response & SDVO_TV_MASK) { 1420 intel_sdvo->is_tv = true; 1421 intel_sdvo->base.needs_tv_clock = true; 1422 } 1423 if (response & SDVO_LVDS_MASK) 1424 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1425 } 1426 1427 return ret; 1428} 1429 1430static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1431{ 1432 struct edid *edid; 1433 1434 /* set the bus switch and get the modes */ 1435 edid = intel_sdvo_get_edid(connector); 1436 1437 /* 1438 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1439 * link between analog and digital outputs. So, if the regular SDVO 1440 * DDC fails, check to see if the analog output is disconnected, in 1441 * which case we'll look there for the digital DDC data. 1442 */ 1443 if (edid == NULL) 1444 edid = intel_sdvo_get_analog_edid(connector); 1445 1446 if (edid != NULL) { 1447 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector), 1448 edid)) { 1449 drm_mode_connector_update_edid_property(connector, edid); 1450 drm_add_edid_modes(connector, edid); 1451 } 1452 1453 free(edid, DRM_MEM_KMS); 1454 } 1455} 1456 1457/* 1458 * Set of SDVO TV modes. 1459 * Note! This is in reply order (see loop in get_tv_modes). 1460 * XXX: all 60Hz refresh? 1461 */ 1462static const struct drm_display_mode sdvo_tv_modes[] = { 1463 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1464 416, 0, 200, 201, 232, 233, 0, 1465 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1466 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1467 416, 0, 240, 241, 272, 273, 0, 1468 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1469 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1470 496, 0, 300, 301, 332, 333, 0, 1471 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1472 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1473 736, 0, 350, 351, 382, 383, 0, 1474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1475 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1476 736, 0, 400, 401, 432, 433, 0, 1477 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1478 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1479 736, 0, 480, 481, 512, 513, 0, 1480 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1481 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1482 800, 0, 480, 481, 512, 513, 0, 1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1484 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1485 800, 0, 576, 577, 608, 609, 0, 1486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1487 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1488 816, 0, 350, 351, 382, 383, 0, 1489 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1490 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1491 816, 0, 400, 401, 432, 433, 0, 1492 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1493 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1494 816, 0, 480, 481, 512, 513, 0, 1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1496 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1497 816, 0, 540, 541, 572, 573, 0, 1498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1499 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1500 816, 0, 576, 577, 608, 609, 0, 1501 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1502 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1503 864, 0, 576, 577, 608, 609, 0, 1504 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1505 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1506 896, 0, 600, 601, 632, 633, 0, 1507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1508 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1509 928, 0, 624, 625, 656, 657, 0, 1510 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1511 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1512 1016, 0, 766, 767, 798, 799, 0, 1513 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1514 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1515 1120, 0, 768, 769, 800, 801, 0, 1516 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1517 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1518 1376, 0, 1024, 1025, 1056, 1057, 0, 1519 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1520}; 1521 1522static void intel_sdvo_get_tv_modes(struct drm_connector *connector) 1523{ 1524 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1525 struct intel_sdvo_sdtv_resolution_request tv_res; 1526 uint32_t reply = 0, format_map = 0; 1527 int i; 1528 1529 /* Read the list of supported input resolutions for the selected TV 1530 * format. 1531 */ 1532 format_map = 1 << intel_sdvo->tv_format_index; 1533 memcpy(&tv_res, &format_map, 1534 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request))); 1535 1536 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output)) 1537 return; 1538 1539 CTASSERT(sizeof(tv_res) == 3); 1540 if (!intel_sdvo_write_cmd(intel_sdvo, 1541 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1542 &tv_res, sizeof(tv_res))) 1543 return; 1544 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3)) 1545 return; 1546 1547 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1548 if (reply & (1 << i)) { 1549 struct drm_display_mode *nmode; 1550 nmode = drm_mode_duplicate(connector->dev, 1551 &sdvo_tv_modes[i]); 1552 if (nmode) 1553 drm_mode_probed_add(connector, nmode); 1554 } 1555} 1556 1557static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1558{ 1559 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1560 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1561 struct drm_display_mode *newmode; 1562 1563 /* 1564 * Attempt to get the mode list from DDC. 1565 * Assume that the preferred modes are 1566 * arranged in priority order. 1567 */ 1568 intel_ddc_get_modes(connector, intel_sdvo->i2c); 1569 if (!list_empty(&connector->probed_modes)) 1570 goto end; 1571 1572 /* Fetch modes from VBT */ 1573 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1574 newmode = drm_mode_duplicate(connector->dev, 1575 dev_priv->sdvo_lvds_vbt_mode); 1576 if (newmode != NULL) { 1577 /* Guarantee the mode is preferred */ 1578 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1579 DRM_MODE_TYPE_DRIVER); 1580 drm_mode_probed_add(connector, newmode); 1581 } 1582 } 1583 1584end: 1585 list_for_each_entry(newmode, &connector->probed_modes, head) { 1586 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1587 intel_sdvo->sdvo_lvds_fixed_mode = 1588 drm_mode_duplicate(connector->dev, newmode); 1589 1590 intel_sdvo->is_lvds = true; 1591 break; 1592 } 1593 } 1594 1595} 1596 1597static int intel_sdvo_get_modes(struct drm_connector *connector) 1598{ 1599 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1600 1601 if (IS_TV(intel_sdvo_connector)) 1602 intel_sdvo_get_tv_modes(connector); 1603 else if (IS_LVDS(intel_sdvo_connector)) 1604 intel_sdvo_get_lvds_modes(connector); 1605 else 1606 intel_sdvo_get_ddc_modes(connector); 1607 1608 return !list_empty(&connector->probed_modes); 1609} 1610 1611static void 1612intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1613{ 1614 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1615 struct drm_device *dev = connector->dev; 1616 1617 if (intel_sdvo_connector->left) 1618 drm_property_destroy(dev, intel_sdvo_connector->left); 1619 if (intel_sdvo_connector->right) 1620 drm_property_destroy(dev, intel_sdvo_connector->right); 1621 if (intel_sdvo_connector->top) 1622 drm_property_destroy(dev, intel_sdvo_connector->top); 1623 if (intel_sdvo_connector->bottom) 1624 drm_property_destroy(dev, intel_sdvo_connector->bottom); 1625 if (intel_sdvo_connector->hpos) 1626 drm_property_destroy(dev, intel_sdvo_connector->hpos); 1627 if (intel_sdvo_connector->vpos) 1628 drm_property_destroy(dev, intel_sdvo_connector->vpos); 1629 if (intel_sdvo_connector->saturation) 1630 drm_property_destroy(dev, intel_sdvo_connector->saturation); 1631 if (intel_sdvo_connector->contrast) 1632 drm_property_destroy(dev, intel_sdvo_connector->contrast); 1633 if (intel_sdvo_connector->hue) 1634 drm_property_destroy(dev, intel_sdvo_connector->hue); 1635 if (intel_sdvo_connector->sharpness) 1636 drm_property_destroy(dev, intel_sdvo_connector->sharpness); 1637 if (intel_sdvo_connector->flicker_filter) 1638 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter); 1639 if (intel_sdvo_connector->flicker_filter_2d) 1640 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d); 1641 if (intel_sdvo_connector->flicker_filter_adaptive) 1642 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive); 1643 if (intel_sdvo_connector->tv_luma_filter) 1644 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter); 1645 if (intel_sdvo_connector->tv_chroma_filter) 1646 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter); 1647 if (intel_sdvo_connector->dot_crawl) 1648 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl); 1649 if (intel_sdvo_connector->brightness) 1650 drm_property_destroy(dev, intel_sdvo_connector->brightness); 1651} 1652 1653static void intel_sdvo_destroy(struct drm_connector *connector) 1654{ 1655 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1656 1657 if (intel_sdvo_connector->tv_format) 1658 drm_property_destroy(connector->dev, 1659 intel_sdvo_connector->tv_format); 1660 1661 intel_sdvo_destroy_enhance_property(connector); 1662#if 0 1663 drm_sysfs_connector_remove(connector); 1664#endif 1665 drm_connector_cleanup(connector); 1666 free(connector, DRM_MEM_KMS); 1667} 1668 1669static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1670{ 1671 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1672 struct edid *edid; 1673 bool has_audio = false; 1674 1675 if (!intel_sdvo->is_hdmi) 1676 return false; 1677 1678 edid = intel_sdvo_get_edid(connector); 1679 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1680 has_audio = drm_detect_monitor_audio(edid); 1681 1682 return has_audio; 1683} 1684 1685static int 1686intel_sdvo_set_property(struct drm_connector *connector, 1687 struct drm_property *property, 1688 uint64_t val) 1689{ 1690 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); 1691 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); 1692 struct drm_i915_private *dev_priv = connector->dev->dev_private; 1693 uint16_t temp_value; 1694 uint8_t cmd; 1695 int ret; 1696 1697 ret = drm_object_property_set_value(&connector->base, property, val); 1698 if (ret) 1699 return ret; 1700 1701 if (property == dev_priv->force_audio_property) { 1702 int i = val; 1703 bool has_audio; 1704 1705 if (i == intel_sdvo_connector->force_audio) 1706 return 0; 1707 1708 intel_sdvo_connector->force_audio = i; 1709 1710 if (i == HDMI_AUDIO_AUTO) 1711 has_audio = intel_sdvo_detect_hdmi_audio(connector); 1712 else 1713 has_audio = (i == HDMI_AUDIO_ON); 1714 1715 if (has_audio == intel_sdvo->has_hdmi_audio) 1716 return 0; 1717 1718 intel_sdvo->has_hdmi_audio = has_audio; 1719 goto done; 1720 } 1721 1722 if (property == dev_priv->broadcast_rgb_property) { 1723 if (val == !!intel_sdvo->color_range) 1724 return 0; 1725 1726 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1727 goto done; 1728 } 1729 1730#define CHECK_PROPERTY(name, NAME) \ 1731 if (intel_sdvo_connector->name == property) { \ 1732 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1733 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1734 cmd = SDVO_CMD_SET_##NAME; \ 1735 intel_sdvo_connector->cur_##name = temp_value; \ 1736 goto set_value; \ 1737 } 1738 1739 if (property == intel_sdvo_connector->tv_format) { 1740 if (val >= TV_FORMAT_NUM) 1741 return -EINVAL; 1742 1743 if (intel_sdvo->tv_format_index == 1744 intel_sdvo_connector->tv_format_supported[val]) 1745 return 0; 1746 1747 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val]; 1748 goto done; 1749 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) { 1750 temp_value = val; 1751 if (intel_sdvo_connector->left == property) { 1752 drm_object_property_set_value(&connector->base, 1753 intel_sdvo_connector->right, val); 1754 if (intel_sdvo_connector->left_margin == temp_value) 1755 return 0; 1756 1757 intel_sdvo_connector->left_margin = temp_value; 1758 intel_sdvo_connector->right_margin = temp_value; 1759 temp_value = intel_sdvo_connector->max_hscan - 1760 intel_sdvo_connector->left_margin; 1761 cmd = SDVO_CMD_SET_OVERSCAN_H; 1762 goto set_value; 1763 } else if (intel_sdvo_connector->right == property) { 1764 drm_object_property_set_value(&connector->base, 1765 intel_sdvo_connector->left, val); 1766 if (intel_sdvo_connector->right_margin == temp_value) 1767 return 0; 1768 1769 intel_sdvo_connector->left_margin = temp_value; 1770 intel_sdvo_connector->right_margin = temp_value; 1771 temp_value = intel_sdvo_connector->max_hscan - 1772 intel_sdvo_connector->left_margin; 1773 cmd = SDVO_CMD_SET_OVERSCAN_H; 1774 goto set_value; 1775 } else if (intel_sdvo_connector->top == property) { 1776 drm_object_property_set_value(&connector->base, 1777 intel_sdvo_connector->bottom, val); 1778 if (intel_sdvo_connector->top_margin == temp_value) 1779 return 0; 1780 1781 intel_sdvo_connector->top_margin = temp_value; 1782 intel_sdvo_connector->bottom_margin = temp_value; 1783 temp_value = intel_sdvo_connector->max_vscan - 1784 intel_sdvo_connector->top_margin; 1785 cmd = SDVO_CMD_SET_OVERSCAN_V; 1786 goto set_value; 1787 } else if (intel_sdvo_connector->bottom == property) { 1788 drm_object_property_set_value(&connector->base, 1789 intel_sdvo_connector->top, val); 1790 if (intel_sdvo_connector->bottom_margin == temp_value) 1791 return 0; 1792 1793 intel_sdvo_connector->top_margin = temp_value; 1794 intel_sdvo_connector->bottom_margin = temp_value; 1795 temp_value = intel_sdvo_connector->max_vscan - 1796 intel_sdvo_connector->top_margin; 1797 cmd = SDVO_CMD_SET_OVERSCAN_V; 1798 goto set_value; 1799 } 1800 CHECK_PROPERTY(hpos, HPOS) 1801 CHECK_PROPERTY(vpos, VPOS) 1802 CHECK_PROPERTY(saturation, SATURATION) 1803 CHECK_PROPERTY(contrast, CONTRAST) 1804 CHECK_PROPERTY(hue, HUE) 1805 CHECK_PROPERTY(brightness, BRIGHTNESS) 1806 CHECK_PROPERTY(sharpness, SHARPNESS) 1807 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1808 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1809 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1810 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1811 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1812 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1813 } 1814 1815 return -EINVAL; /* unknown property */ 1816 1817set_value: 1818 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2)) 1819 return -EIO; 1820 1821 1822done: 1823 if (intel_sdvo->base.base.crtc) { 1824 struct drm_crtc *crtc = intel_sdvo->base.base.crtc; 1825 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1826 crtc->y, crtc->fb); 1827 } 1828 1829 return 0; 1830#undef CHECK_PROPERTY 1831} 1832 1833static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = { 1834 .dpms = intel_sdvo_dpms, 1835 .mode_fixup = intel_sdvo_mode_fixup, 1836 .prepare = intel_encoder_prepare, 1837 .mode_set = intel_sdvo_mode_set, 1838 .commit = intel_encoder_commit, 1839}; 1840 1841static const struct drm_connector_funcs intel_sdvo_connector_funcs = { 1842 .dpms = drm_helper_connector_dpms, 1843 .detect = intel_sdvo_detect, 1844 .fill_modes = drm_helper_probe_single_connector_modes, 1845 .set_property = intel_sdvo_set_property, 1846 .destroy = intel_sdvo_destroy, 1847}; 1848 1849static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = { 1850 .get_modes = intel_sdvo_get_modes, 1851 .mode_valid = intel_sdvo_mode_valid, 1852 .best_encoder = intel_best_encoder, 1853}; 1854 1855static void intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1856{ 1857 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder); 1858 1859 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1860 drm_mode_destroy(encoder->dev, 1861 intel_sdvo->sdvo_lvds_fixed_mode); 1862 1863 device_delete_child(intel_sdvo->base.base.dev->dev, 1864 intel_sdvo->ddc_iic_bus); 1865 intel_encoder_destroy(encoder); 1866} 1867 1868static const struct drm_encoder_funcs intel_sdvo_enc_funcs = { 1869 .destroy = intel_sdvo_enc_destroy, 1870}; 1871 1872static void 1873intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) 1874{ 1875 uint16_t mask = 0; 1876 unsigned int num_bits; 1877 1878 /* Make a mask of outputs less than or equal to our own priority in the 1879 * list. 1880 */ 1881 switch (sdvo->controlled_output) { 1882 case SDVO_OUTPUT_LVDS1: 1883 mask |= SDVO_OUTPUT_LVDS1; 1884 case SDVO_OUTPUT_LVDS0: 1885 mask |= SDVO_OUTPUT_LVDS0; 1886 case SDVO_OUTPUT_TMDS1: 1887 mask |= SDVO_OUTPUT_TMDS1; 1888 case SDVO_OUTPUT_TMDS0: 1889 mask |= SDVO_OUTPUT_TMDS0; 1890 case SDVO_OUTPUT_RGB1: 1891 mask |= SDVO_OUTPUT_RGB1; 1892 case SDVO_OUTPUT_RGB0: 1893 mask |= SDVO_OUTPUT_RGB0; 1894 break; 1895 } 1896 1897 /* Count bits to find what number we are in the priority list. */ 1898 mask &= sdvo->caps.output_flags; 1899 num_bits = bitcount16(mask); 1900 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1901 if (num_bits > 3) 1902 num_bits = 3; 1903 1904 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1905 sdvo->ddc_bus = 1 << num_bits; 1906} 1907 1908/** 1909 * Choose the appropriate DDC bus for control bus switch command for this 1910 * SDVO output based on the controlled output. 1911 * 1912 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1913 * outputs, then LVDS outputs. 1914 */ 1915static void 1916intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv, 1917 struct intel_sdvo *sdvo, u32 reg) 1918{ 1919 struct sdvo_device_mapping *mapping; 1920 1921 if (sdvo->is_sdvob) 1922 mapping = &(dev_priv->sdvo_mappings[0]); 1923 else 1924 mapping = &(dev_priv->sdvo_mappings[1]); 1925 1926 if (mapping->initialized) 1927 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1928 else 1929 intel_sdvo_guess_ddc_bus(sdvo); 1930} 1931 1932static void 1933intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv, 1934 struct intel_sdvo *sdvo, u32 reg) 1935{ 1936 struct sdvo_device_mapping *mapping; 1937 u8 pin; 1938 1939 if (sdvo->is_sdvob) 1940 mapping = &dev_priv->sdvo_mappings[0]; 1941 else 1942 mapping = &dev_priv->sdvo_mappings[1]; 1943 1944 pin = GMBUS_PORT_DPB; 1945 if (mapping->initialized) 1946 pin = mapping->i2c_pin; 1947 1948 if (intel_gmbus_is_port_valid(pin)) { 1949 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin); 1950 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ); 1951 intel_gmbus_force_bit(sdvo->i2c, true); 1952 } else { 1953 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); 1954 } 1955} 1956 1957static bool 1958intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device) 1959{ 1960 return intel_sdvo_check_supp_encode(intel_sdvo); 1961} 1962 1963static u8 1964intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo) 1965{ 1966 struct drm_i915_private *dev_priv = dev->dev_private; 1967 struct sdvo_device_mapping *my_mapping, *other_mapping; 1968 1969 if (sdvo->is_sdvob) { 1970 my_mapping = &dev_priv->sdvo_mappings[0]; 1971 other_mapping = &dev_priv->sdvo_mappings[1]; 1972 } else { 1973 my_mapping = &dev_priv->sdvo_mappings[1]; 1974 other_mapping = &dev_priv->sdvo_mappings[0]; 1975 } 1976 1977 /* If the BIOS described our SDVO device, take advantage of it. */ 1978 if (my_mapping->slave_addr) 1979 return my_mapping->slave_addr; 1980 1981 /* If the BIOS only described a different SDVO device, use the 1982 * address that it isn't using. 1983 */ 1984 if (other_mapping->slave_addr) { 1985 if (other_mapping->slave_addr == 0x70) 1986 return 0x72; 1987 else 1988 return 0x70; 1989 } 1990 1991 /* No SDVO device info is found for another DVO port, 1992 * so use mapping assumption we had before BIOS parsing. 1993 */ 1994 if (sdvo->is_sdvob) 1995 return 0x70; 1996 else 1997 return 0x72; 1998} 1999 2000static void 2001intel_sdvo_connector_init(struct intel_sdvo_connector *connector, 2002 struct intel_sdvo *encoder) 2003{ 2004 drm_connector_init(encoder->base.base.dev, 2005 &connector->base.base, 2006 &intel_sdvo_connector_funcs, 2007 connector->base.base.connector_type); 2008 2009 drm_connector_helper_add(&connector->base.base, 2010 &intel_sdvo_connector_helper_funcs); 2011 2012 connector->base.base.interlace_allowed = 1; 2013 connector->base.base.doublescan_allowed = 0; 2014 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2015 2016 intel_connector_attach_encoder(&connector->base, &encoder->base); 2017#if 0 2018 drm_sysfs_connector_add(&connector->base.base); 2019#endif 2020} 2021 2022static void 2023intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) 2024{ 2025 struct drm_device *dev = connector->base.base.dev; 2026 2027 intel_attach_force_audio_property(&connector->base.base); 2028 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) 2029 intel_attach_broadcast_rgb_property(&connector->base.base); 2030} 2031 2032static bool 2033intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device) 2034{ 2035 struct drm_encoder *encoder = &intel_sdvo->base.base; 2036 struct drm_connector *connector; 2037 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 2038 struct intel_connector *intel_connector; 2039 struct intel_sdvo_connector *intel_sdvo_connector; 2040 2041 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), 2042 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2043 2044 if (device == 0) { 2045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2047 } else if (device == 1) { 2048 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2049 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2050 } 2051 2052 intel_connector = &intel_sdvo_connector->base; 2053 connector = &intel_connector->base; 2054 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) { 2055 connector->polled = DRM_CONNECTOR_POLL_HPD; 2056 intel_sdvo->hotplug_active[0] |= 1 << device; 2057 /* Some SDVO devices have one-shot hotplug interrupts. 2058 * Ensure that they get re-enabled when an interrupt happens. 2059 */ 2060 intel_encoder->hot_plug = intel_sdvo_enable_hotplug; 2061 intel_sdvo_enable_hotplug(intel_encoder); 2062 } 2063 else 2064 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2065 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2066 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2067 2068 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) { 2069 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2070 intel_sdvo->is_hdmi = true; 2071 } 2072 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2073 (1 << INTEL_ANALOG_CLONE_BIT)); 2074 2075 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2076 if (intel_sdvo->is_hdmi) 2077 intel_sdvo_add_hdmi_properties(intel_sdvo_connector); 2078 2079 return true; 2080} 2081 2082static bool 2083intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type) 2084{ 2085 struct drm_encoder *encoder = &intel_sdvo->base.base; 2086 struct drm_connector *connector; 2087 struct intel_connector *intel_connector; 2088 struct intel_sdvo_connector *intel_sdvo_connector; 2089 2090 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), 2091 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2092 if (!intel_sdvo_connector) 2093 return false; 2094 2095 intel_connector = &intel_sdvo_connector->base; 2096 connector = &intel_connector->base; 2097 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2098 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2099 2100 intel_sdvo->controlled_output |= type; 2101 intel_sdvo_connector->output_flag = type; 2102 2103 intel_sdvo->is_tv = true; 2104 intel_sdvo->base.needs_tv_clock = true; 2105 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2106 2107 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2108 2109 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type)) 2110 goto err; 2111 2112 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2113 goto err; 2114 2115 return true; 2116 2117err: 2118 intel_sdvo_destroy(connector); 2119 return false; 2120} 2121 2122static bool 2123intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device) 2124{ 2125 struct drm_encoder *encoder = &intel_sdvo->base.base; 2126 struct drm_connector *connector; 2127 struct intel_connector *intel_connector; 2128 struct intel_sdvo_connector *intel_sdvo_connector; 2129 2130 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), 2131 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2132 2133 intel_connector = &intel_sdvo_connector->base; 2134 connector = &intel_connector->base; 2135 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2136 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2137 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2138 2139 if (device == 0) { 2140 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2141 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2142 } else if (device == 1) { 2143 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2144 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2145 } 2146 2147 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2148 (1 << INTEL_ANALOG_CLONE_BIT)); 2149 2150 intel_sdvo_connector_init(intel_sdvo_connector, 2151 intel_sdvo); 2152 return true; 2153} 2154 2155static bool 2156intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device) 2157{ 2158 struct drm_encoder *encoder = &intel_sdvo->base.base; 2159 struct drm_connector *connector; 2160 struct intel_connector *intel_connector; 2161 struct intel_sdvo_connector *intel_sdvo_connector; 2162 2163 intel_sdvo_connector = malloc(sizeof(struct intel_sdvo_connector), 2164 DRM_MEM_KMS, M_WAITOK | M_ZERO); 2165 2166 intel_connector = &intel_sdvo_connector->base; 2167 connector = &intel_connector->base; 2168 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2169 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2170 2171 if (device == 0) { 2172 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2173 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2174 } else if (device == 1) { 2175 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2176 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2177 } 2178 2179 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2180 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2181 2182 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo); 2183 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector)) 2184 goto err; 2185 2186 return true; 2187 2188err: 2189 intel_sdvo_destroy(connector); 2190 return false; 2191} 2192 2193static bool 2194intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) 2195{ 2196 intel_sdvo->is_tv = false; 2197 intel_sdvo->base.needs_tv_clock = false; 2198 intel_sdvo->is_lvds = false; 2199 2200 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2201 2202 if (flags & SDVO_OUTPUT_TMDS0) 2203 if (!intel_sdvo_dvi_init(intel_sdvo, 0)) 2204 return false; 2205 2206 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2207 if (!intel_sdvo_dvi_init(intel_sdvo, 1)) 2208 return false; 2209 2210 /* TV has no XXX1 function block */ 2211 if (flags & SDVO_OUTPUT_SVID0) 2212 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0)) 2213 return false; 2214 2215 if (flags & SDVO_OUTPUT_CVBS0) 2216 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0)) 2217 return false; 2218 2219 if (flags & SDVO_OUTPUT_YPRPB0) 2220 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0)) 2221 return false; 2222 2223 if (flags & SDVO_OUTPUT_RGB0) 2224 if (!intel_sdvo_analog_init(intel_sdvo, 0)) 2225 return false; 2226 2227 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2228 if (!intel_sdvo_analog_init(intel_sdvo, 1)) 2229 return false; 2230 2231 if (flags & SDVO_OUTPUT_LVDS0) 2232 if (!intel_sdvo_lvds_init(intel_sdvo, 0)) 2233 return false; 2234 2235 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2236 if (!intel_sdvo_lvds_init(intel_sdvo, 1)) 2237 return false; 2238 2239 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2240 unsigned char bytes[2]; 2241 2242 intel_sdvo->controlled_output = 0; 2243 memcpy(bytes, &intel_sdvo->caps.output_flags, 2); 2244 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2245 SDVO_NAME(intel_sdvo), 2246 bytes[0], bytes[1]); 2247 return false; 2248 } 2249 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); 2250 2251 return true; 2252} 2253 2254static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, 2255 struct intel_sdvo_connector *intel_sdvo_connector, 2256 int type) 2257{ 2258 struct drm_device *dev = intel_sdvo->base.base.dev; 2259 struct intel_sdvo_tv_format format; 2260 uint32_t format_map, i; 2261 2262 if (!intel_sdvo_set_target_output(intel_sdvo, type)) 2263 return false; 2264 2265 CTASSERT(sizeof(format) == 6); 2266 if (!intel_sdvo_get_value(intel_sdvo, 2267 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2268 &format, sizeof(format))) 2269 return false; 2270 2271 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2272 2273 if (format_map == 0) 2274 return false; 2275 2276 intel_sdvo_connector->format_supported_num = 0; 2277 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2278 if (format_map & (1 << i)) 2279 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i; 2280 2281 2282 intel_sdvo_connector->tv_format = 2283 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2284 "mode", intel_sdvo_connector->format_supported_num); 2285 if (!intel_sdvo_connector->tv_format) 2286 return false; 2287 2288 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++) 2289 drm_property_add_enum( 2290 intel_sdvo_connector->tv_format, i, 2291 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]); 2292 2293 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0]; 2294 drm_object_attach_property(&intel_sdvo_connector->base.base.base, 2295 intel_sdvo_connector->tv_format, 0); 2296 return true; 2297 2298} 2299 2300#define ENHANCEMENT(name, NAME) do { \ 2301 if (enhancements.name) { \ 2302 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2303 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2304 return false; \ 2305 intel_sdvo_connector->max_##name = data_value[0]; \ 2306 intel_sdvo_connector->cur_##name = response; \ 2307 intel_sdvo_connector->name = \ 2308 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2309 if (!intel_sdvo_connector->name) return false; \ 2310 drm_object_attach_property(&connector->base, \ 2311 intel_sdvo_connector->name, \ 2312 intel_sdvo_connector->cur_##name); \ 2313 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2314 data_value[0], data_value[1], response); \ 2315 } \ 2316} while (0) 2317 2318static bool 2319intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo, 2320 struct intel_sdvo_connector *intel_sdvo_connector, 2321 struct intel_sdvo_enhancements_reply enhancements) 2322{ 2323 struct drm_device *dev = intel_sdvo->base.base.dev; 2324 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2325 uint16_t response, data_value[2]; 2326 2327 /* when horizontal overscan is supported, Add the left/right property */ 2328 if (enhancements.overscan_h) { 2329 if (!intel_sdvo_get_value(intel_sdvo, 2330 SDVO_CMD_GET_MAX_OVERSCAN_H, 2331 &data_value, 4)) 2332 return false; 2333 2334 if (!intel_sdvo_get_value(intel_sdvo, 2335 SDVO_CMD_GET_OVERSCAN_H, 2336 &response, 2)) 2337 return false; 2338 2339 intel_sdvo_connector->max_hscan = data_value[0]; 2340 intel_sdvo_connector->left_margin = data_value[0] - response; 2341 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin; 2342 intel_sdvo_connector->left = 2343 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2344 if (!intel_sdvo_connector->left) 2345 return false; 2346 2347 drm_object_attach_property(&connector->base, 2348 intel_sdvo_connector->left, 2349 intel_sdvo_connector->left_margin); 2350 2351 intel_sdvo_connector->right = 2352 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2353 if (!intel_sdvo_connector->right) 2354 return false; 2355 2356 drm_object_attach_property(&connector->base, 2357 intel_sdvo_connector->right, 2358 intel_sdvo_connector->right_margin); 2359 DRM_DEBUG_KMS("h_overscan: max %d, " 2360 "default %d, current %d\n", 2361 data_value[0], data_value[1], response); 2362 } 2363 2364 if (enhancements.overscan_v) { 2365 if (!intel_sdvo_get_value(intel_sdvo, 2366 SDVO_CMD_GET_MAX_OVERSCAN_V, 2367 &data_value, 4)) 2368 return false; 2369 2370 if (!intel_sdvo_get_value(intel_sdvo, 2371 SDVO_CMD_GET_OVERSCAN_V, 2372 &response, 2)) 2373 return false; 2374 2375 intel_sdvo_connector->max_vscan = data_value[0]; 2376 intel_sdvo_connector->top_margin = data_value[0] - response; 2377 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin; 2378 intel_sdvo_connector->top = 2379 drm_property_create_range(dev, 0, 2380 "top_margin", 0, data_value[0]); 2381 if (!intel_sdvo_connector->top) 2382 return false; 2383 2384 drm_object_attach_property(&connector->base, 2385 intel_sdvo_connector->top, 2386 intel_sdvo_connector->top_margin); 2387 2388 intel_sdvo_connector->bottom = 2389 drm_property_create_range(dev, 0, 2390 "bottom_margin", 0, data_value[0]); 2391 if (!intel_sdvo_connector->bottom) 2392 return false; 2393 2394 drm_object_attach_property(&connector->base, 2395 intel_sdvo_connector->bottom, 2396 intel_sdvo_connector->bottom_margin); 2397 DRM_DEBUG_KMS("v_overscan: max %d, " 2398 "default %d, current %d\n", 2399 data_value[0], data_value[1], response); 2400 } 2401 2402 ENHANCEMENT(hpos, HPOS); 2403 ENHANCEMENT(vpos, VPOS); 2404 ENHANCEMENT(saturation, SATURATION); 2405 ENHANCEMENT(contrast, CONTRAST); 2406 ENHANCEMENT(hue, HUE); 2407 ENHANCEMENT(sharpness, SHARPNESS); 2408 ENHANCEMENT(brightness, BRIGHTNESS); 2409 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2410 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2411 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2412 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2413 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2414 2415 if (enhancements.dot_crawl) { 2416 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2417 return false; 2418 2419 intel_sdvo_connector->max_dot_crawl = 1; 2420 intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2421 intel_sdvo_connector->dot_crawl = 2422 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2423 if (!intel_sdvo_connector->dot_crawl) 2424 return false; 2425 2426 drm_object_attach_property(&connector->base, 2427 intel_sdvo_connector->dot_crawl, 2428 intel_sdvo_connector->cur_dot_crawl); 2429 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2430 } 2431 2432 return true; 2433} 2434 2435static bool 2436intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo, 2437 struct intel_sdvo_connector *intel_sdvo_connector, 2438 struct intel_sdvo_enhancements_reply enhancements) 2439{ 2440 struct drm_device *dev = intel_sdvo->base.base.dev; 2441 struct drm_connector *connector = &intel_sdvo_connector->base.base; 2442 uint16_t response, data_value[2]; 2443 2444 ENHANCEMENT(brightness, BRIGHTNESS); 2445 2446 return true; 2447} 2448#undef ENHANCEMENT 2449 2450static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo, 2451 struct intel_sdvo_connector *intel_sdvo_connector) 2452{ 2453 union { 2454 struct intel_sdvo_enhancements_reply reply; 2455 uint16_t response; 2456 } enhancements; 2457 2458 CTASSERT(sizeof(enhancements) == 2); 2459 2460 enhancements.response = 0; 2461 intel_sdvo_get_value(intel_sdvo, 2462 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2463 &enhancements, sizeof(enhancements)); 2464 if (enhancements.response == 0) { 2465 DRM_DEBUG_KMS("No enhancement is supported\n"); 2466 return true; 2467 } 2468 2469 if (IS_TV(intel_sdvo_connector)) 2470 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2471 else if (IS_LVDS(intel_sdvo_connector)) 2472 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply); 2473 else 2474 return true; 2475} 2476 2477struct intel_sdvo_ddc_proxy_sc { 2478 struct intel_sdvo *intel_sdvo; 2479 device_t port; 2480}; 2481 2482static int 2483intel_sdvo_ddc_proxy_probe(device_t idev) 2484{ 2485 2486 return (BUS_PROBE_DEFAULT); 2487} 2488 2489static int 2490intel_sdvo_ddc_proxy_attach(device_t idev) 2491{ 2492 struct intel_sdvo_ddc_proxy_sc *sc; 2493 2494 sc = device_get_softc(idev); 2495 sc->port = device_add_child(idev, "iicbus", -1); 2496 if (sc->port == NULL) 2497 return (ENXIO); 2498 device_quiet(sc->port); 2499 bus_generic_attach(idev); 2500 return (0); 2501} 2502 2503static int 2504intel_sdvo_ddc_proxy_detach(device_t idev) 2505{ 2506 struct intel_sdvo_ddc_proxy_sc *sc; 2507 device_t port; 2508 2509 sc = device_get_softc(idev); 2510 port = sc->port; 2511 bus_generic_detach(idev); 2512 if (port != NULL) 2513 device_delete_child(idev, port); 2514 return (0); 2515} 2516 2517static int 2518intel_sdvo_ddc_proxy_reset(device_t idev, u_char speed, u_char addr, 2519 u_char *oldaddr) 2520{ 2521 struct intel_sdvo_ddc_proxy_sc *sc; 2522 struct intel_sdvo *sdvo; 2523 2524 sc = device_get_softc(idev); 2525 sdvo = sc->intel_sdvo; 2526 2527 return (IICBUS_RESET(device_get_parent(sdvo->i2c), speed, addr, 2528 oldaddr)); 2529} 2530 2531static int 2532intel_sdvo_ddc_proxy_transfer(device_t idev, struct iic_msg *msgs, uint32_t num) 2533{ 2534 struct intel_sdvo_ddc_proxy_sc *sc; 2535 struct intel_sdvo *sdvo; 2536 2537 sc = device_get_softc(idev); 2538 sdvo = sc->intel_sdvo; 2539 2540 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2541 return (EIO); 2542 2543 return (iicbus_transfer(sdvo->i2c, msgs, num)); 2544} 2545 2546static bool 2547intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo, struct drm_device *dev, 2548 int sdvo_reg) 2549{ 2550 struct intel_sdvo_ddc_proxy_sc *sc; 2551 int ret; 2552 2553 sdvo->ddc_iic_bus = device_add_child(dev->dev, 2554 "intel_sdvo_ddc_proxy", sdvo_reg); 2555 if (sdvo->ddc_iic_bus == NULL) { 2556 DRM_ERROR("cannot create ddc proxy bus %d\n", sdvo_reg); 2557 return (false); 2558 } 2559 device_quiet(sdvo->ddc_iic_bus); 2560 ret = device_probe_and_attach(sdvo->ddc_iic_bus); 2561 if (ret != 0) { 2562 DRM_ERROR("cannot attach proxy bus %d error %d\n", 2563 sdvo_reg, ret); 2564 device_delete_child(dev->dev, sdvo->ddc_iic_bus); 2565 return (false); 2566 } 2567 sc = device_get_softc(sdvo->ddc_iic_bus); 2568 sc->intel_sdvo = sdvo; 2569 2570 sdvo->ddc = sc->port; 2571 return (true); 2572} 2573 2574static device_method_t intel_sdvo_ddc_proxy_methods[] = { 2575 DEVMETHOD(device_probe, intel_sdvo_ddc_proxy_probe), 2576 DEVMETHOD(device_attach, intel_sdvo_ddc_proxy_attach), 2577 DEVMETHOD(device_detach, intel_sdvo_ddc_proxy_detach), 2578 DEVMETHOD(iicbus_reset, intel_sdvo_ddc_proxy_reset), 2579 DEVMETHOD(iicbus_transfer, intel_sdvo_ddc_proxy_transfer), 2580 DEVMETHOD_END 2581}; 2582static driver_t intel_sdvo_ddc_proxy_driver = { 2583 "intel_sdvo_ddc_proxy", 2584 intel_sdvo_ddc_proxy_methods, 2585 sizeof(struct intel_sdvo_ddc_proxy_sc) 2586}; 2587static devclass_t intel_sdvo_devclass; 2588DRIVER_MODULE_ORDERED(intel_sdvo_ddc_proxy, drmn, intel_sdvo_ddc_proxy_driver, 2589 intel_sdvo_devclass, 0, 0, SI_ORDER_FIRST); 2590 2591 2592bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) 2593{ 2594 struct drm_i915_private *dev_priv = dev->dev_private; 2595 struct intel_encoder *intel_encoder; 2596 struct intel_sdvo *intel_sdvo; 2597 int i; 2598 2599 intel_sdvo = malloc(sizeof(struct intel_sdvo), DRM_MEM_KMS, 2600 M_WAITOK | M_ZERO); 2601 2602 intel_sdvo->sdvo_reg = sdvo_reg; 2603 intel_sdvo->is_sdvob = is_sdvob; 2604 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1; 2605 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg); 2606 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev, sdvo_reg)) { 2607 free(intel_sdvo, DRM_MEM_KMS); 2608 return false; 2609 } 2610 2611 /* encoder type will be decided later */ 2612 intel_encoder = &intel_sdvo->base; 2613 intel_encoder->type = INTEL_OUTPUT_SDVO; 2614 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); 2615 2616 /* Read the regs to test if we can talk to the device */ 2617 for (i = 0; i < 0x40; i++) { 2618 u8 byte; 2619 2620 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) { 2621 DRM_DEBUG_KMS("No SDVO device found on %s\n", 2622 SDVO_NAME(intel_sdvo)); 2623 goto err; 2624 } 2625 } 2626 2627 if (intel_sdvo->is_sdvob) 2628 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2629 else 2630 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2631 2632 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); 2633 2634 /* In default case sdvo lvds is false */ 2635 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) 2636 goto err; 2637 2638 /* Set up hotplug command - note paranoia about contents of reply. 2639 * We assume that the hardware is in a sane state, and only touch 2640 * the bits we think we understand. 2641 */ 2642 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, 2643 &intel_sdvo->hotplug_active, 2); 2644 intel_sdvo->hotplug_active[0] &= ~0x3; 2645 2646 if (intel_sdvo_output_setup(intel_sdvo, 2647 intel_sdvo->caps.output_flags) != true) { 2648 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", 2649 SDVO_NAME(intel_sdvo)); 2650 goto err; 2651 } 2652 2653 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); 2654 2655 /* Set the input timing to the screen. Assume always input 0. */ 2656 if (!intel_sdvo_set_target_input(intel_sdvo)) 2657 goto err; 2658 2659 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, 2660 &intel_sdvo->pixel_clock_min, 2661 &intel_sdvo->pixel_clock_max)) 2662 goto err; 2663 2664 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2665 "clock range %dMHz - %dMHz, " 2666 "input 1: %c, input 2: %c, " 2667 "output 1: %c, output 2: %c\n", 2668 SDVO_NAME(intel_sdvo), 2669 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id, 2670 intel_sdvo->caps.device_rev_id, 2671 intel_sdvo->pixel_clock_min / 1000, 2672 intel_sdvo->pixel_clock_max / 1000, 2673 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2674 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2675 /* check currently supported outputs */ 2676 intel_sdvo->caps.output_flags & 2677 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2678 intel_sdvo->caps.output_flags & 2679 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2680 return true; 2681 2682err: 2683 drm_encoder_cleanup(&intel_encoder->base); 2684 free(intel_sdvo, DRM_MEM_KMS); 2685 2686 return false; 2687} 2688