1//===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10/// \file 11/// \brief Interface definition for R600RegisterInfo 12// 13//===----------------------------------------------------------------------===// 14 15#ifndef R600REGISTERINFO_H_ 16#define R600REGISTERINFO_H_ 17 18#include "AMDGPURegisterInfo.h" 19#include "AMDGPUTargetMachine.h" 20 21namespace llvm { 22 23class R600TargetMachine; 24 25struct R600RegisterInfo : public AMDGPURegisterInfo { 26 AMDGPUTargetMachine &TM; 27 RegClassWeight RCW; 28 29 R600RegisterInfo(AMDGPUTargetMachine &tm); 30 31 virtual BitVector getReservedRegs(const MachineFunction &MF) const; 32 33 /// \param RC is an AMDIL reg class. 34 /// 35 /// \returns the R600 reg class that is equivalent to \p RC. 36 virtual const TargetRegisterClass *getISARegClass( 37 const TargetRegisterClass *RC) const; 38 39 /// \brief get the HW encoding for a register's channel. 40 unsigned getHWRegChan(unsigned reg) const; 41 42 virtual unsigned getHWRegIndex(unsigned Reg) const; 43 44 /// \brief get the register class of the specified type to use in the 45 /// CFGStructurizer 46 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const; 47 48 virtual const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const; 49 50 // \returns true if \p Reg can be defined in one ALU caluse and used in another. 51 virtual bool isPhysRegLiveAcrossClauses(unsigned Reg) const; 52}; 53 54} // End namespace llvm 55 56#endif // AMDIDSAREGISTERINFO_H_ 57