1262569Simp/* 2262569Simp * Copyright 2013 Ideas On Board SPRL 3262569Simp * 4262569Simp * This program is free software; you can redistribute it and/or modify 5262569Simp * it under the terms of the GNU General Public License as published by 6262569Simp * the Free Software Foundation; either version 2 of the License, or 7262569Simp * (at your option) any later version. 8262569Simp */ 9262569Simp 10262569Simp#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__ 11262569Simp#define __DT_BINDINGS_CLOCK_R8A7790_H__ 12262569Simp 13262569Simp/* CPG */ 14262569Simp#define R8A7790_CLK_MAIN 0 15262569Simp#define R8A7790_CLK_PLL0 1 16262569Simp#define R8A7790_CLK_PLL1 2 17262569Simp#define R8A7790_CLK_PLL3 3 18262569Simp#define R8A7790_CLK_LB 4 19262569Simp#define R8A7790_CLK_QSPI 5 20262569Simp#define R8A7790_CLK_SDH 6 21262569Simp#define R8A7790_CLK_SD0 7 22262569Simp#define R8A7790_CLK_SD1 8 23262569Simp#define R8A7790_CLK_Z 9 24262569Simp 25262569Simp/* MSTP0 */ 26262569Simp#define R8A7790_CLK_MSIOF0 0 27262569Simp 28262569Simp/* MSTP1 */ 29284090Sian#define R8A7790_CLK_VCP1 0 30284090Sian#define R8A7790_CLK_VCP0 1 31284090Sian#define R8A7790_CLK_VPC1 2 32284090Sian#define R8A7790_CLK_VPC0 3 33284090Sian#define R8A7790_CLK_JPU 6 34284090Sian#define R8A7790_CLK_SSP1 9 35262569Simp#define R8A7790_CLK_TMU1 11 36284090Sian#define R8A7790_CLK_3DG 12 37284090Sian#define R8A7790_CLK_2DDMAC 15 38284090Sian#define R8A7790_CLK_FDP1_2 17 39284090Sian#define R8A7790_CLK_FDP1_1 18 40284090Sian#define R8A7790_CLK_FDP1_0 19 41262569Simp#define R8A7790_CLK_TMU3 21 42262569Simp#define R8A7790_CLK_TMU2 22 43262569Simp#define R8A7790_CLK_CMT0 24 44262569Simp#define R8A7790_CLK_TMU0 25 45262569Simp#define R8A7790_CLK_VSP1_DU1 27 46262569Simp#define R8A7790_CLK_VSP1_DU0 28 47273712Sian#define R8A7790_CLK_VSP1_R 30 48273712Sian#define R8A7790_CLK_VSP1_S 31 49262569Simp 50262569Simp/* MSTP2 */ 51262569Simp#define R8A7790_CLK_SCIFA2 2 52262569Simp#define R8A7790_CLK_SCIFA1 3 53262569Simp#define R8A7790_CLK_SCIFA0 4 54262569Simp#define R8A7790_CLK_MSIOF2 5 55262569Simp#define R8A7790_CLK_SCIFB0 6 56262569Simp#define R8A7790_CLK_SCIFB1 7 57262569Simp#define R8A7790_CLK_MSIOF1 8 58262569Simp#define R8A7790_CLK_MSIOF3 15 59262569Simp#define R8A7790_CLK_SCIFB2 16 60273712Sian#define R8A7790_CLK_SYS_DMAC1 18 61273712Sian#define R8A7790_CLK_SYS_DMAC0 19 62262569Simp 63262569Simp/* MSTP3 */ 64273712Sian#define R8A7790_CLK_IIC2 0 65262569Simp#define R8A7790_CLK_TPU0 4 66262569Simp#define R8A7790_CLK_MMCIF1 5 67262569Simp#define R8A7790_CLK_SDHI3 11 68262569Simp#define R8A7790_CLK_SDHI2 12 69262569Simp#define R8A7790_CLK_SDHI1 13 70262569Simp#define R8A7790_CLK_SDHI0 14 71262569Simp#define R8A7790_CLK_MMCIF0 15 72273712Sian#define R8A7790_CLK_IIC0 18 73273712Sian#define R8A7790_CLK_PCIEC 19 74273712Sian#define R8A7790_CLK_IIC1 23 75262569Simp#define R8A7790_CLK_SSUSB 28 76262569Simp#define R8A7790_CLK_CMT1 29 77262569Simp#define R8A7790_CLK_USBDMAC0 30 78262569Simp#define R8A7790_CLK_USBDMAC1 31 79262569Simp 80262569Simp/* MSTP5 */ 81284090Sian#define R8A7790_CLK_AUDIO_DMAC1 1 82284090Sian#define R8A7790_CLK_AUDIO_DMAC0 2 83262569Simp#define R8A7790_CLK_THERMAL 22 84262569Simp#define R8A7790_CLK_PWM 23 85262569Simp 86262569Simp/* MSTP7 */ 87262569Simp#define R8A7790_CLK_EHCI 3 88262569Simp#define R8A7790_CLK_HSUSB 4 89262569Simp#define R8A7790_CLK_HSCIF1 16 90262569Simp#define R8A7790_CLK_HSCIF0 17 91262569Simp#define R8A7790_CLK_SCIF1 20 92262569Simp#define R8A7790_CLK_SCIF0 21 93262569Simp#define R8A7790_CLK_DU2 22 94262569Simp#define R8A7790_CLK_DU1 23 95262569Simp#define R8A7790_CLK_DU0 24 96262569Simp#define R8A7790_CLK_LVDS1 25 97262569Simp#define R8A7790_CLK_LVDS0 26 98262569Simp 99262569Simp/* MSTP8 */ 100284090Sian#define R8A7790_CLK_MLB 2 101262569Simp#define R8A7790_CLK_VIN3 8 102262569Simp#define R8A7790_CLK_VIN2 9 103262569Simp#define R8A7790_CLK_VIN1 10 104262569Simp#define R8A7790_CLK_VIN0 11 105262569Simp#define R8A7790_CLK_ETHER 13 106262569Simp#define R8A7790_CLK_SATA1 14 107262569Simp#define R8A7790_CLK_SATA0 15 108262569Simp 109262569Simp/* MSTP9 */ 110262569Simp#define R8A7790_CLK_GPIO5 7 111262569Simp#define R8A7790_CLK_GPIO4 8 112262569Simp#define R8A7790_CLK_GPIO3 9 113262569Simp#define R8A7790_CLK_GPIO2 10 114262569Simp#define R8A7790_CLK_GPIO1 11 115262569Simp#define R8A7790_CLK_GPIO0 12 116262569Simp#define R8A7790_CLK_RCAN1 15 117262569Simp#define R8A7790_CLK_RCAN0 16 118262569Simp#define R8A7790_CLK_QSPI_MOD 17 119262569Simp#define R8A7790_CLK_IICDVFS 26 120262569Simp#define R8A7790_CLK_I2C3 28 121262569Simp#define R8A7790_CLK_I2C2 29 122262569Simp#define R8A7790_CLK_I2C1 30 123262569Simp#define R8A7790_CLK_I2C0 31 124262569Simp 125273712Sian/* MSTP10 */ 126273712Sian#define R8A7790_CLK_SSI_ALL 5 127273712Sian#define R8A7790_CLK_SSI9 6 128273712Sian#define R8A7790_CLK_SSI8 7 129273712Sian#define R8A7790_CLK_SSI7 8 130273712Sian#define R8A7790_CLK_SSI6 9 131273712Sian#define R8A7790_CLK_SSI5 10 132273712Sian#define R8A7790_CLK_SSI4 11 133273712Sian#define R8A7790_CLK_SSI3 12 134273712Sian#define R8A7790_CLK_SSI2 13 135273712Sian#define R8A7790_CLK_SSI1 14 136273712Sian#define R8A7790_CLK_SSI0 15 137273712Sian#define R8A7790_CLK_SCU_ALL 17 138273712Sian#define R8A7790_CLK_SCU_DVC1 18 139273712Sian#define R8A7790_CLK_SCU_DVC0 19 140273712Sian#define R8A7790_CLK_SCU_SRC9 22 141273712Sian#define R8A7790_CLK_SCU_SRC8 23 142273712Sian#define R8A7790_CLK_SCU_SRC7 24 143273712Sian#define R8A7790_CLK_SCU_SRC6 25 144273712Sian#define R8A7790_CLK_SCU_SRC5 26 145273712Sian#define R8A7790_CLK_SCU_SRC4 27 146273712Sian#define R8A7790_CLK_SCU_SRC3 28 147273712Sian#define R8A7790_CLK_SCU_SRC2 29 148273712Sian#define R8A7790_CLK_SCU_SRC1 30 149273712Sian#define R8A7790_CLK_SCU_SRC0 31 150273712Sian 151262569Simp#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */ 152