1/*
2 * Copyright 2013 Ideas On Board SPRL
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
11#define __DT_BINDINGS_CLOCK_R8A7790_H__
12
13/* CPG */
14#define R8A7790_CLK_MAIN		0
15#define R8A7790_CLK_PLL0		1
16#define R8A7790_CLK_PLL1		2
17#define R8A7790_CLK_PLL3		3
18#define R8A7790_CLK_LB			4
19#define R8A7790_CLK_QSPI		5
20#define R8A7790_CLK_SDH			6
21#define R8A7790_CLK_SD0			7
22#define R8A7790_CLK_SD1			8
23#define R8A7790_CLK_Z			9
24
25/* MSTP0 */
26#define R8A7790_CLK_MSIOF0		0
27
28/* MSTP1 */
29#define R8A7790_CLK_VCP1		0
30#define R8A7790_CLK_VCP0		1
31#define R8A7790_CLK_VPC1		2
32#define R8A7790_CLK_VPC0		3
33#define R8A7790_CLK_JPU			6
34#define R8A7790_CLK_SSP1		9
35#define R8A7790_CLK_TMU1		11
36#define R8A7790_CLK_3DG			12
37#define R8A7790_CLK_2DDMAC		15
38#define R8A7790_CLK_FDP1_2		17
39#define R8A7790_CLK_FDP1_1		18
40#define R8A7790_CLK_FDP1_0		19
41#define R8A7790_CLK_TMU3		21
42#define R8A7790_CLK_TMU2		22
43#define R8A7790_CLK_CMT0		24
44#define R8A7790_CLK_TMU0		25
45#define R8A7790_CLK_VSP1_DU1		27
46#define R8A7790_CLK_VSP1_DU0		28
47#define R8A7790_CLK_VSP1_R		30
48#define R8A7790_CLK_VSP1_S		31
49
50/* MSTP2 */
51#define R8A7790_CLK_SCIFA2		2
52#define R8A7790_CLK_SCIFA1		3
53#define R8A7790_CLK_SCIFA0		4
54#define R8A7790_CLK_MSIOF2		5
55#define R8A7790_CLK_SCIFB0		6
56#define R8A7790_CLK_SCIFB1		7
57#define R8A7790_CLK_MSIOF1		8
58#define R8A7790_CLK_MSIOF3		15
59#define R8A7790_CLK_SCIFB2		16
60#define R8A7790_CLK_SYS_DMAC1		18
61#define R8A7790_CLK_SYS_DMAC0		19
62
63/* MSTP3 */
64#define R8A7790_CLK_IIC2		0
65#define R8A7790_CLK_TPU0		4
66#define R8A7790_CLK_MMCIF1		5
67#define R8A7790_CLK_SDHI3		11
68#define R8A7790_CLK_SDHI2		12
69#define R8A7790_CLK_SDHI1		13
70#define R8A7790_CLK_SDHI0		14
71#define R8A7790_CLK_MMCIF0		15
72#define R8A7790_CLK_IIC0		18
73#define R8A7790_CLK_PCIEC		19
74#define R8A7790_CLK_IIC1		23
75#define R8A7790_CLK_SSUSB		28
76#define R8A7790_CLK_CMT1		29
77#define R8A7790_CLK_USBDMAC0		30
78#define R8A7790_CLK_USBDMAC1		31
79
80/* MSTP5 */
81#define R8A7790_CLK_AUDIO_DMAC1		1
82#define R8A7790_CLK_AUDIO_DMAC0		2
83#define R8A7790_CLK_THERMAL		22
84#define R8A7790_CLK_PWM			23
85
86/* MSTP7 */
87#define R8A7790_CLK_EHCI		3
88#define R8A7790_CLK_HSUSB		4
89#define R8A7790_CLK_HSCIF1		16
90#define R8A7790_CLK_HSCIF0		17
91#define R8A7790_CLK_SCIF1		20
92#define R8A7790_CLK_SCIF0		21
93#define R8A7790_CLK_DU2			22
94#define R8A7790_CLK_DU1			23
95#define R8A7790_CLK_DU0			24
96#define R8A7790_CLK_LVDS1		25
97#define R8A7790_CLK_LVDS0		26
98
99/* MSTP8 */
100#define R8A7790_CLK_MLB			2
101#define R8A7790_CLK_VIN3		8
102#define R8A7790_CLK_VIN2		9
103#define R8A7790_CLK_VIN1		10
104#define R8A7790_CLK_VIN0		11
105#define R8A7790_CLK_ETHER		13
106#define R8A7790_CLK_SATA1		14
107#define R8A7790_CLK_SATA0		15
108
109/* MSTP9 */
110#define R8A7790_CLK_GPIO5		7
111#define R8A7790_CLK_GPIO4		8
112#define R8A7790_CLK_GPIO3		9
113#define R8A7790_CLK_GPIO2		10
114#define R8A7790_CLK_GPIO1		11
115#define R8A7790_CLK_GPIO0		12
116#define R8A7790_CLK_RCAN1		15
117#define R8A7790_CLK_RCAN0		16
118#define R8A7790_CLK_QSPI_MOD		17
119#define R8A7790_CLK_IICDVFS		26
120#define R8A7790_CLK_I2C3		28
121#define R8A7790_CLK_I2C2		29
122#define R8A7790_CLK_I2C1		30
123#define R8A7790_CLK_I2C0		31
124
125/* MSTP10 */
126#define R8A7790_CLK_SSI_ALL		5
127#define R8A7790_CLK_SSI9		6
128#define R8A7790_CLK_SSI8		7
129#define R8A7790_CLK_SSI7		8
130#define R8A7790_CLK_SSI6		9
131#define R8A7790_CLK_SSI5		10
132#define R8A7790_CLK_SSI4		11
133#define R8A7790_CLK_SSI3		12
134#define R8A7790_CLK_SSI2		13
135#define R8A7790_CLK_SSI1		14
136#define R8A7790_CLK_SSI0		15
137#define R8A7790_CLK_SCU_ALL		17
138#define R8A7790_CLK_SCU_DVC1		18
139#define R8A7790_CLK_SCU_DVC0		19
140#define R8A7790_CLK_SCU_SRC9		22
141#define R8A7790_CLK_SCU_SRC8		23
142#define R8A7790_CLK_SCU_SRC7		24
143#define R8A7790_CLK_SCU_SRC6		25
144#define R8A7790_CLK_SCU_SRC5		26
145#define R8A7790_CLK_SCU_SRC4		27
146#define R8A7790_CLK_SCU_SRC3		28
147#define R8A7790_CLK_SCU_SRC2		29
148#define R8A7790_CLK_SCU_SRC1		30
149#define R8A7790_CLK_SCU_SRC0		31
150
151#endif /* __DT_BINDINGS_CLOCK_R8A7790_H__ */
152