1/*- 2 * Copyright (c) 1997, 1998, 1999, 2000 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: releng/10.2/sys/dev/sk/xmaciireg.h 158070 2006-04-27 05:59:09Z yongari $ 33 */ 34 35/* 36 * Registers and data structures for the XaQti Corporation XMAC II 37 * Gigabit Ethernet MAC. Datasheet is available from http://www.xaqti.com. 38 * The XMAC can be programmed for 16-bit or 32-bit register access modes. 39 * The SysKonnect gigabit ethernet adapters use 16-bit mode, so that's 40 * how the registers are laid out here. 41 */ 42 43#define XM_DEVICEID 0x00E0AE20 44#define XM_XAQTI_OUI 0x00E0AE 45 46#define XM_XMAC_REV(x) (((x) & 0x000000E0) >> 5) 47 48#define XM_XMAC_REV_B2 0x0 49#define XM_XMAC_REV_C1 0x1 50 51#define XM_MMUCMD 0x0000 52#define XM_POFF 0x0008 53#define XM_BURST 0x000C 54#define XM_VLAN_TAGLEV1 0x0010 55#define XM_VLAN_TAGLEV2 0x0014 56#define XM_TXCMD 0x0020 57#define XM_TX_RETRYLIMIT 0x0024 58#define XM_TX_SLOTTIME 0x0028 59#define XM_TX_IPG 0x003C 60#define XM_RXCMD 0x0030 61#define XM_PHY_ADDR 0x0034 62#define XM_PHY_DATA 0x0038 63#define XM_GPIO 0x0040 64#define XM_IMR 0x0044 65#define XM_ISR 0x0048 66#define XM_HWCFG 0x004C 67#define XM_TX_LOWAT 0x0060 68#define XM_TX_HIWAT 0x0062 69#define XM_TX_REQTHRESH_LO 0x0064 70#define XM_TX_REQTHRESH_HI 0x0066 71#define XM_TX_REQTHRESH XM_TX_REQTHRESH_LO 72#define XM_PAUSEDST0 0x0068 73#define XM_PAUSEDST1 0x006A 74#define XM_PAUSEDST2 0x006C 75#define XM_CTLPARM_LO 0x0070 76#define XM_CTLPARM_HI 0x0072 77#define XM_CTLPARM XM_CTLPARM_LO 78#define XM_OPCODE_PAUSE_TIMER 0x0074 79#define XM_TXSTAT_LIFO 0x0078 80 81/* 82 * Perfect filter registers. The XMAC has a table of 16 perfect 83 * filter entries, spaced 8 bytes apart. This is in addition to 84 * the station address registers, which appear below. 85 */ 86#define XM_RXFILT_BASE 0x0080 87#define XM_RXFILT_END 0x0107 88#define XM_RXFILT_MAX 16 89#define XM_RXFILT_ENTRY(ent) (XM_RXFILT_BASE + ((ent * 8))) 90 91/* Primary station address. */ 92#define XM_PAR0 0x0108 93#define XM_PAR1 0x010A 94#define XM_PAR2 0x010C 95 96/* 64-bit multicast hash table registers */ 97#define XM_MAR0 0x0110 98#define XM_MAR1 0x0112 99#define XM_MAR2 0x0114 100#define XM_MAR3 0x0116 101#define XM_RX_LOWAT 0x0118 102#define XM_RX_HIWAT 0x011A 103#define XM_RX_REQTHRESH_LO 0x011C 104#define XM_RX_REQTHRESH_HI 0x011E 105#define XM_RX_REQTHRESH XM_RX_REQTHRESH_LO 106#define XM_DEVID_LO 0x0120 107#define XM_DEVID_HI 0x0122 108#define XM_DEVID XM_DEVID_LO 109#define XM_MODE_LO 0x0124 110#define XM_MODE_HI 0x0126 111#define XM_MODE XM_MODE_LO 112#define XM_LASTSRC0 0x0128 113#define XM_LASTSRC1 0x012A 114#define XM_LASTSRC2 0x012C 115#define XM_TSTAMP_READ 0x0130 116#define XM_TSTAMP_LOAD 0x0134 117#define XM_STATS_CMD 0x0200 118#define XM_RXCNT_EVENT_LO 0x0204 119#define XM_RXCNT_EVENT_HI 0x0206 120#define XM_RXCNT_EVENT XM_RXCNT_EVENT_LO 121#define XM_TXCNT_EVENT_LO 0x0208 122#define XM_TXCNT_EVENT_HI 0x020A 123#define XM_TXCNT_EVENT XM_TXCNT_EVENT_LO 124#define XM_RXCNT_EVMASK_LO 0x020C 125#define XM_RXCNT_EVMASK_HI 0x020E 126#define XM_RXCNT_EVMASK XM_RXCNT_EVMASK_LO 127#define XM_TXCNT_EVMASK_LO 0x0210 128#define XM_TXCNT_EVMASK_HI 0x0212 129#define XM_TXCNT_EVMASK XM_TXCNT_EVMASK_LO 130 131/* Statistics command register */ 132#define XM_STATCMD_CLR_TX 0x0001 133#define XM_STATCMD_CLR_RX 0x0002 134#define XM_STATCMD_COPY_TX 0x0004 135#define XM_STATCMD_COPY_RX 0x0008 136#define XM_STATCMD_SNAP_TX 0x0010 137#define XM_STATCMD_SNAP_RX 0x0020 138 139/* TX statistics registers */ 140#define XM_TXSTATS_PKTSOK 0x280 141#define XM_TXSTATS_BYTESOK_HI 0x284 142#define XM_TXSTATS_BYTESOK_LO 0x288 143#define XM_TXSTATS_BCASTSOK 0x28C 144#define XM_TXSTATS_MCASTSOK 0x290 145#define XM_TXSTATS_UCASTSOK 0x294 146#define XM_TXSTATS_GIANTS 0x298 147#define XM_TXSTATS_BURSTCNT 0x29C 148#define XM_TXSTATS_PAUSEPKTS 0x2A0 149#define XM_TXSTATS_MACCTLPKTS 0x2A4 150#define XM_TXSTATS_SINGLECOLS 0x2A8 151#define XM_TXSTATS_MULTICOLS 0x2AC 152#define XM_TXSTATS_EXCESSCOLS 0x2B0 153#define XM_TXSTATS_LATECOLS 0x2B4 154#define XM_TXSTATS_DEFER 0x2B8 155#define XM_TXSTATS_EXCESSDEFER 0x2BC 156#define XM_TXSTATS_UNDERRUN 0x2C0 157#define XM_TXSTATS_CARRIERSENSE 0x2C4 158#define XM_TXSTATS_UTILIZATION 0x2C8 159#define XM_TXSTATS_64 0x2D0 160#define XM_TXSTATS_65_127 0x2D4 161#define XM_TXSTATS_128_255 0x2D8 162#define XM_TXSTATS_256_511 0x2DC 163#define XM_TXSTATS_512_1023 0x2E0 164#define XM_TXSTATS_1024_MAX 0x2E4 165 166/* RX statistics registers */ 167#define XM_RXSTATS_PKTSOK 0x300 168#define XM_RXSTATS_BYTESOK_HI 0x304 169#define XM_RXSTATS_BYTESOK_LO 0x308 170#define XM_RXSTATS_BCASTSOK 0x30C 171#define XM_RXSTATS_MCASTSOK 0x310 172#define XM_RXSTATS_UCASTSOK 0x314 173#define XM_RXSTATS_PAUSEPKTS 0x318 174#define XM_RXSTATS_MACCTLPKTS 0x31C 175#define XM_RXSTATS_BADPAUSEPKTS 0x320 176#define XM_RXSTATS_BADMACCTLPKTS 0x324 177#define XM_RXSTATS_BURSTCNT 0x328 178#define XM_RXSTATS_MISSEDPKTS 0x32C 179#define XM_RXSTATS_FRAMEERRS 0x330 180#define XM_RXSTATS_OVERRUN 0x334 181#define XM_RXSTATS_JABBER 0x338 182#define XM_RXSTATS_CARRLOSS 0x33C 183#define XM_RXSTATS_INRNGLENERR 0x340 184#define XM_RXSTATS_SYMERR 0x344 185#define XM_RXSTATS_SHORTEVENT 0x348 186#define XM_RXSTATS_RUNTS 0x34C 187#define XM_RXSTATS_GIANTS 0x350 188#define XM_RXSTATS_CRCERRS 0x354 189#define XM_RXSTATS_CEXTERRS 0x35C 190#define XM_RXSTATS_UTILIZATION 0x360 191#define XM_RXSTATS_64 0x368 192#define XM_RXSTATS_65_127 0x36C 193#define XM_RXSTATS_128_255 0x370 194#define XM_RXSTATS_256_511 0x374 195#define XM_RXSTATS_512_1023 0x378 196#define XM_RXSTATS_1024_MAX 0x37C 197 198#define XM_MMUCMD_TX_ENB 0x0001 199#define XM_MMUCMD_RX_ENB 0x0002 200#define XM_MMUCMD_GMIILOOP 0x0004 201#define XM_MMUCMD_RATECTL 0x0008 202#define XM_MMUCMD_GMIIFDX 0x0010 203#define XM_MMUCMD_NO_MGMT_PRMB 0x0020 204#define XM_MMUCMD_SIMCOL 0x0040 205#define XM_MMUCMD_FORCETX 0x0080 206#define XM_MMUCMD_LOOPENB 0x0200 207#define XM_MMUCMD_IGNPAUSE 0x0400 208#define XM_MMUCMD_PHYBUSY 0x0800 209#define XM_MMUCMD_PHYDATARDY 0x1000 210 211#define XM_TXCMD_AUTOPAD 0x0001 212#define XM_TXCMD_NOCRC 0x0002 213#define XM_TXCMD_NOPREAMBLE 0x0004 214#define XM_TXCMD_NOGIGAMODE 0x0008 215#define XM_TXCMD_SAMPLELINE 0x0010 216#define XM_TXCMD_ENCBYPASS 0x0020 217#define XM_TXCMD_XMITBK2BK 0x0040 218#define XM_TXCMD_FAIRSHARE 0x0080 219 220#define XM_RXCMD_DISABLE_CEXT 0x0001 221#define XM_RXCMD_STRIPPAD 0x0002 222#define XM_RXCMD_SAMPLELINE 0x0004 223#define XM_RXCMD_SELFRX 0x0008 224#define XM_RXCMD_STRIPFCS 0x0010 225#define XM_RXCMD_TRANSPARENT 0x0020 226#define XM_RXCMD_IPGCAPTURE 0x0040 227#define XM_RXCMD_BIGPKTOK 0x0080 228#define XM_RXCMD_LENERROK 0x0100 229 230#define XM_GPIO_GP0_SET 0x0001 231#define XM_GPIO_RESETSTATS 0x0004 232#define XM_GPIO_RESETMAC 0x0008 233#define XM_GPIO_FORCEINT 0x0020 234#define XM_GPIO_ANEGINPROG 0x0040 235 236#define XM_IMR_RX_EOF 0x0001 237#define XM_IMR_TX_EOF 0x0002 238#define XM_IMR_TX_UNDERRUN 0x0004 239#define XM_IMR_RX_OVERRUN 0x0008 240#define XM_IMR_TX_STATS_OFLOW 0x0010 241#define XM_IMR_RX_STATS_OFLOW 0x0020 242#define XM_IMR_TSTAMP_OFLOW 0x0040 243#define XM_IMR_AUTONEG_DONE 0x0080 244#define XM_IMR_NEXTPAGE_RDY 0x0100 245#define XM_IMR_PAGE_RECEIVED 0x0200 246#define XM_IMR_LP_REQCFG 0x0400 247#define XM_IMR_GP0_SET 0x0800 248#define XM_IMR_FORCEINTR 0x1000 249#define XM_IMR_TX_ABORT 0x2000 250#define XM_IMR_LINKEVENT 0x4000 251 252#define XM_INTRS \ 253 (~(XM_IMR_GP0_SET|XM_IMR_AUTONEG_DONE|XM_IMR_TX_UNDERRUN)) 254 255#define XM_ISR_RX_EOF 0x0001 256#define XM_ISR_TX_EOF 0x0002 257#define XM_ISR_TX_UNDERRUN 0x0004 258#define XM_ISR_RX_OVERRUN 0x0008 259#define XM_ISR_TX_STATS_OFLOW 0x0010 260#define XM_ISR_RX_STATS_OFLOW 0x0020 261#define XM_ISR_TSTAMP_OFLOW 0x0040 262#define XM_ISR_AUTONEG_DONE 0x0080 263#define XM_ISR_NEXTPAGE_RDY 0x0100 264#define XM_ISR_PAGE_RECEIVED 0x0200 265#define XM_ISR_LP_REQCFG 0x0400 266#define XM_ISR_GP0_SET 0x0800 267#define XM_ISR_FORCEINTR 0x1000 268#define XM_ISR_TX_ABORT 0x2000 269#define XM_ISR_LINKEVENT 0x4000 270 271#define XM_HWCFG_GENEOP 0x0008 272#define XM_HWCFG_SIGSTATCKH 0x0004 273#define XM_HWCFG_GMIIMODE 0x0001 274 275#define XM_MODE_FLUSH_RXFIFO 0x00000001 276#define XM_MODE_FLUSH_TXFIFO 0x00000002 277#define XM_MODE_BIGENDIAN 0x00000004 278#define XM_MODE_RX_PROMISC 0x00000008 279#define XM_MODE_RX_NOBROAD 0x00000010 280#define XM_MODE_RX_NOMULTI 0x00000020 281#define XM_MODE_RX_NOUNI 0x00000040 282#define XM_MODE_RX_BADFRAMES 0x00000080 283#define XM_MODE_RX_CRCERRS 0x00000100 284#define XM_MODE_RX_GIANTS 0x00000200 285#define XM_MODE_RX_INRANGELEN 0x00000400 286#define XM_MODE_RX_RUNTS 0x00000800 287#define XM_MODE_RX_MACCTL 0x00001000 288#define XM_MODE_RX_USE_PERFECT 0x00002000 289#define XM_MODE_RX_USE_STATION 0x00004000 290#define XM_MODE_RX_USE_HASH 0x00008000 291#define XM_MODE_RX_ADDRPAIR 0x00010000 292#define XM_MODE_PAUSEONHI 0x00020000 293#define XM_MODE_PAUSEONLO 0x00040000 294#define XM_MODE_TIMESTAMP 0x00080000 295#define XM_MODE_SENDPAUSE 0x00100000 296#define XM_MODE_SENDCONTINUOUS 0x00200000 297#define XM_MODE_LE_STATUSWORD 0x00400000 298#define XM_MODE_AUTOFIFOPAUSE 0x00800000 299#define XM_MODE_EXPAUSEGEN 0x02000000 300#define XM_MODE_RX_INVERSE 0x04000000 301 302#define XM_RXSTAT_MACCTL 0x00000001 303#define XM_RXSTAT_ERRFRAME 0x00000002 304#define XM_RXSTAT_CRCERR 0x00000004 305#define XM_RXSTAT_GIANT 0x00000008 306#define XM_RXSTAT_RUNT 0x00000010 307#define XM_RXSTAT_FRAMEERR 0x00000020 308#define XM_RXSTAT_INRANGEERR 0x00000040 309#define XM_RXSTAT_CARRIERERR 0x00000080 310#define XM_RXSTAT_COLLERR 0x00000100 311#define XM_RXSTAT_802_3 0x00000200 312#define XM_RXSTAT_CARREXTERR 0x00000400 313#define XM_RXSTAT_BURSTMODE 0x00000800 314#define XM_RXSTAT_UNICAST 0x00002000 315#define XM_RXSTAT_MULTICAST 0x00004000 316#define XM_RXSTAT_BROADCAST 0x00008000 317#define XM_RXSTAT_VLAN_LEV1 0x00010000 318#define XM_RXSTAT_VLAN_LEV2 0x00020000 319#define XM_RXSTAT_LEN 0xFFFC0000 320#define XM_RXSTAT_LENSHIFT 18 321 322#define XM_RXSTAT_BYTES(x) ((x) >> XM_RXSTAT_LENSHIFT) 323 324/* 325 * XMAC PHY registers, indirectly accessed through 326 * XM_PHY_ADDR and XM_PHY_REG. 327 */ 328 329#define XM_PHY_BMCR 0x0000 /* control */ 330#define XM_PHY_BMSR 0x0001 /* status */ 331#define XM_PHY_VENID 0x0002 /* vendor id */ 332#define XM_PHY_DEVID 0x0003 /* device id */ 333#define XM_PHY_ANAR 0x0004 /* autoneg advertisenemt */ 334#define XM_PHY_LPAR 0x0005 /* link partner ability */ 335#define XM_PHY_ANEXP 0x0006 /* autoneg expansion */ 336#define XM_PHY_NEXTP 0x0007 /* nextpage */ 337#define XM_PHY_LPNEXTP 0x0008 /* link partner's nextpage */ 338#define XM_PHY_EXTSTS 0x000F /* extented status */ 339#define XM_PHY_RESAB 0x0010 /* resolved ability */ 340 341#define XM_BMCR_DUPLEX 0x0100 342#define XM_BMCR_RENEGOTIATE 0x0200 343#define XM_BMCR_AUTONEGENBL 0x1000 344#define XM_BMCR_LOOPBACK 0x4000 345#define XM_BMCR_RESET 0x8000 346 347#define XM_BMSR_EXTCAP 0x0001 348#define XM_BMSR_LINKSTAT 0x0004 349#define XM_BMSR_AUTONEGABLE 0x0008 350#define XM_BMSR_REMFAULT 0x0010 351#define XM_BMSR_AUTONEGDONE 0x0020 352#define XM_BMSR_EXTSTAT 0x0100 353 354#define XM_VENID_XAQTI 0xD14C 355#define XM_DEVID_XMAC 0x0002 356 357#define XM_ANAR_FULLDUPLEX 0x0020 358#define XM_ANAR_HALFDUPLEX 0x0040 359#define XM_ANAR_PAUSEBITS 0x0180 360#define XM_ANAR_REMFAULTBITS 0x1800 361#define XM_ANAR_ACK 0x4000 362#define XM_ANAR_NEXTPAGE 0x8000 363 364#define XM_LPAR_FULLDUPLEX 0x0020 365#define XM_LPAR_HALFDUPLEX 0x0040 366#define XM_LPAR_PAUSEBITS 0x0180 367#define XM_LPAR_REMFAULTBITS 0x1800 368#define XM_LPAR_ACK 0x4000 369#define XM_LPAR_NEXTPAGE 0x8000 370 371#define XM_PAUSE_NOPAUSE 0x0000 372#define XM_PAUSE_SYMPAUSE 0x0080 373#define XM_PAUSE_ASYMPAUSE 0x0100 374#define XM_PAUSE_BOTH 0x0180 375 376#define XM_REMFAULT_LINKOK 0x0000 377#define XM_REMFAULT_LINKFAIL 0x0800 378#define XM_REMFAULT_OFFLINE 0x1000 379#define XM_REMFAULT_ANEGERR 0x1800 380 381#define XM_ANEXP_GOTPAGE 0x0002 382#define XM_ANEXP_NEXTPAGE_SELF 0x0004 383#define XM_ANEXP_NEXTPAGE_LP 0x0008 384 385#define XM_NEXTP_MESSAGE 0x07FF 386#define XM_NEXTP_TOGGLE 0x0800 387#define XM_NEXTP_ACK2 0x1000 388#define XM_NEXTP_MPAGE 0x2000 389#define XM_NEXTP_ACK1 0x4000 390#define XM_NEXTP_NPAGE 0x8000 391 392#define XM_LPNEXTP_MESSAGE 0x07FF 393#define XM_LPNEXTP_TOGGLE 0x0800 394#define XM_LPNEXTP_ACK2 0x1000 395#define XM_LPNEXTP_MPAGE 0x2000 396#define XM_LPNEXTP_ACK1 0x4000 397#define XM_LPNEXTP_NPAGE 0x8000 398 399#define XM_EXTSTS_HALFDUPLEX 0x4000 400#define XM_EXTSTS_FULLDUPLEX 0x8000 401 402#define XM_RESAB_PAUSEMISMATCH 0x0008 403#define XM_RESAB_ABLMISMATCH 0x0010 404#define XM_RESAB_FDMODESEL 0x0020 405#define XM_RESAB_HDMODESEL 0x0040 406#define XM_RESAB_PAUSEBITS 0x0180 407