sio.c revision 122844
151078Speter/*- 251078Speter * Copyright (c) 1991 The Regents of the University of California. 351078Speter * All rights reserved. 451078Speter * 551078Speter * Redistribution and use in source and binary forms, with or without 651078Speter * modification, are permitted provided that the following conditions 751078Speter * are met: 851078Speter * 1. Redistributions of source code must retain the above copyright 951078Speter * notice, this list of conditions and the following disclaimer. 1051078Speter * 2. Redistributions in binary form must reproduce the above copyright 1151078Speter * notice, this list of conditions and the following disclaimer in the 1251078Speter * documentation and/or other materials provided with the distribution. 1351078Speter * 3. All advertising materials mentioning features or use of this software 1451078Speter * must display the following acknowledgement: 1551078Speter * This product includes software developed by the University of 1651078Speter * California, Berkeley and its contributors. 1751078Speter * 4. Neither the name of the University nor the names of its contributors 1851078Speter * may be used to endorse or promote products derived from this software 1951078Speter * without specific prior written permission. 2051078Speter * 2151078Speter * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 2251078Speter * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2351078Speter * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2451078Speter * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 2551078Speter * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2651078Speter * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2751078Speter * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2851078Speter * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2951078Speter * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3051078Speter * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3151078Speter * SUCH DAMAGE. 3251078Speter * 3351078Speter * from: @(#)com.c 7.5 (Berkeley) 5/16/91 3451078Speter * from: i386/isa sio.c,v 1.234 3551078Speter */ 3651078Speter 37119419Sobrien#include <sys/cdefs.h> 38119419Sobrien__FBSDID("$FreeBSD: head/sys/dev/sio/sio.c 122844 2003-11-17 07:21:19Z bde $"); 39119419Sobrien 4051078Speter#include "opt_comconsole.h" 4151078Speter#include "opt_compat.h" 4251078Speter#include "opt_ddb.h" 4351078Speter#include "opt_sio.h" 4451078Speter 4551078Speter/* 4651078Speter * Serial driver, based on 386BSD-0.1 com driver. 4751078Speter * Mostly rewritten to use pseudo-DMA. 4851078Speter * Works for National Semiconductor NS8250-NS16550AF UARTs. 4951078Speter * COM driver, based on HP dca driver. 5051078Speter * 5151078Speter * Changes for PC-Card integration: 5251078Speter * - Added PC-Card driver table and handlers 5351078Speter */ 5451078Speter#include <sys/param.h> 5576166Smarkm#include <sys/systm.h> 5665822Sjhb#include <sys/bus.h> 5751078Speter#include <sys/conf.h> 5851078Speter#include <sys/fcntl.h> 5951078Speter#include <sys/interrupt.h> 6051078Speter#include <sys/kernel.h> 61114216Skan#include <sys/limits.h> 6276166Smarkm#include <sys/lock.h> 6376166Smarkm#include <sys/malloc.h> 6476166Smarkm#include <sys/module.h> 6576166Smarkm#include <sys/mutex.h> 6676166Smarkm#include <sys/proc.h> 6776166Smarkm#include <sys/reboot.h> 6876166Smarkm#include <sys/sysctl.h> 6951078Speter#include <sys/syslog.h> 7076166Smarkm#include <sys/tty.h> 7160471Snyan#include <machine/bus_pio.h> 7251078Speter#include <machine/bus.h> 7351078Speter#include <sys/rman.h> 7451078Speter#include <sys/timepps.h> 7593466Sbde#include <sys/uio.h> 76119485Snjl#include <sys/cons.h> 77119485Snjl#if DDB > 0 78119485Snjl#include <ddb/ddb.h> 79119485Snjl#endif 8051078Speter 8186909Simp#include <isa/isavar.h> 8286909Simp 8351078Speter#include <machine/resource.h> 8451078Speter 8585302Simp#include <dev/sio/sioreg.h> 8685365Simp#include <dev/sio/siovar.h> 8751078Speter 8851078Speter#ifdef COM_ESP 8977726Sjoerg#include <dev/ic/esp.h> 9051078Speter#endif 9177726Sjoerg#include <dev/ic/ns16550.h> 9251078Speter 9351078Speter#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 9451078Speter 9551078Speter#define CALLOUT_MASK 0x80 9651078Speter#define CONTROL_MASK 0x60 9751078Speter#define CONTROL_INIT_STATE 0x20 9851078Speter#define CONTROL_LOCK_STATE 0x40 9951078Speter#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 10093470Sbde#define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 10193470Sbde | ((mynor) & 0x1f)) 10293470Sbde#define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 10393470Sbde | ((unit) & 0x1f)) 10451078Speter 10551078Speter#ifdef COM_MULTIPORT 10651078Speter/* checks in flags for multiport and which is multiport "master chip" 10751078Speter * for a given card 10851078Speter */ 10951078Speter#define COM_ISMULTIPORT(flags) ((flags) & 0x01) 11051078Speter#define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff) 11151078Speter#define COM_NOTAST4(flags) ((flags) & 0x04) 112104067Sphk#else 113104067Sphk#define COM_ISMULTIPORT(flags) (0) 11451078Speter#endif /* COM_MULTIPORT */ 11551078Speter 116120175Sbde#define COM_C_IIR_TXRDYBUG 0x80000 11751078Speter#define COM_CONSOLE(flags) ((flags) & 0x10) 118120175Sbde#define COM_DEBUGGER(flags) ((flags) & 0x80) 119120175Sbde#define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24) 12051078Speter#define COM_FORCECONSOLE(flags) ((flags) & 0x20) 121120175Sbde#define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG) 12251078Speter#define COM_LLCONSOLE(flags) ((flags) & 0x40) 12351078Speter#define COM_LOSESOUTINTS(flags) ((flags) & 0x08) 124120175Sbde#define COM_NOFIFO(flags) ((flags) & 0x02) 125120175Sbde#define COM_NOPROBE(flags) ((flags) & 0x40000) 126120175Sbde#define COM_NOSCR(flags) ((flags) & 0x100000) 127111613Sphk#define COM_PPSCTS(flags) ((flags) & 0x10000) 128120175Sbde#define COM_ST16650A(flags) ((flags) & 0x20000) 129112384Ssobomax#define COM_TI16754(flags) ((flags) & 0x200000) 13051078Speter 13160471Snyan#define sio_getreg(com, off) \ 13260471Snyan (bus_space_read_1((com)->bst, (com)->bsh, (off))) 13360471Snyan#define sio_setreg(com, off, value) \ 13460471Snyan (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 13560471Snyan 13651078Speter/* 13751078Speter * com state bits. 13851078Speter * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 13951078Speter * than the other bits so that they can be tested as a group without masking 14051078Speter * off the low bits. 14151078Speter * 14251078Speter * The following com and tty flags correspond closely: 14351078Speter * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 14453344Speter * comstop()) 14551078Speter * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 14651078Speter * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 14751078Speter * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 14851078Speter * TS_FLUSH is not used. 14951078Speter * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 15051078Speter * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 15151078Speter */ 15251078Speter#define CS_BUSY 0x80 /* output in progress */ 15351078Speter#define CS_TTGO 0x40 /* output not stopped by XOFF */ 15451078Speter#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 15551078Speter#define CS_CHECKMSR 1 /* check of MSR scheduled */ 15651078Speter#define CS_CTS_OFLOW 2 /* use CTS output flow control */ 15751078Speter#define CS_DTR_OFF 0x10 /* DTR held off */ 15851078Speter#define CS_ODONE 4 /* output completed */ 15951078Speter#define CS_RTS_IFLOW 8 /* use RTS input flow control */ 16051078Speter#define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 16151078Speter 16251078Speterstatic char const * const error_desc[] = { 16351078Speter#define CE_OVERRUN 0 16451078Speter "silo overflow", 16551078Speter#define CE_INTERRUPT_BUF_OVERFLOW 1 16651078Speter "interrupt-level buffer overflow", 16751078Speter#define CE_TTY_BUF_OVERFLOW 2 16851078Speter "tty-level buffer overflow", 16951078Speter}; 17051078Speter 17186909Simp#define CE_NTYPES 3 17251078Speter#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum]) 17351078Speter 17486909Simp/* types. XXX - should be elsewhere */ 17586909Simptypedef u_int Port_t; /* hardware port */ 17686909Simptypedef u_char bool_t; /* boolean */ 17786909Simp 17886909Simp/* queue of linear buffers */ 17986909Simpstruct lbq { 18086909Simp u_char *l_head; /* next char to process */ 18186909Simp u_char *l_tail; /* one past the last char to process */ 18286909Simp struct lbq *l_next; /* next in queue */ 18386909Simp bool_t l_queued; /* nonzero if queued */ 18486909Simp}; 18586909Simp 18686909Simp/* com device structure */ 18786909Simpstruct com_s { 18886909Simp u_char state; /* miscellaneous flag bits */ 18986909Simp bool_t active_out; /* nonzero if the callout device is open */ 19086909Simp u_char cfcr_image; /* copy of value written to CFCR */ 19151078Speter#ifdef COM_ESP 19286909Simp bool_t esp; /* is this unit a hayes esp board? */ 19386909Simp#endif 19486909Simp u_char extra_state; /* more flag bits, separate for order trick */ 19586909Simp u_char fifo_image; /* copy of value written to FIFO */ 19686909Simp bool_t hasfifo; /* nonzero for 16550 UARTs */ 19786909Simp bool_t loses_outints; /* nonzero if device loses output interrupts */ 19886909Simp u_char mcr_image; /* copy of value written to MCR */ 19986909Simp#ifdef COM_MULTIPORT 20086909Simp bool_t multiport; /* is this unit part of a multiport device? */ 20186909Simp#endif /* COM_MULTIPORT */ 20286909Simp bool_t no_irq; /* nonzero if irq is not attached */ 20386909Simp bool_t gone; /* hardware disappeared */ 20486909Simp bool_t poll; /* nonzero if polling is required */ 20586909Simp bool_t poll_output; /* nonzero if polling for output is required */ 206120175Sbde bool_t st16650a; /* nonzero if Startech 16650A compatible */ 20786909Simp int unit; /* unit number */ 20886909Simp int dtr_wait; /* time to hold DTR down on close (* 1/hz) */ 209120189Sbde u_int flags; /* copy of device flags */ 21086909Simp u_int tx_fifo_size; 21186909Simp u_int wopeners; /* # processes waiting for DCD in open() */ 21286909Simp 21386909Simp /* 21486909Simp * The high level of the driver never reads status registers directly 21586909Simp * because there would be too many side effects to handle conveniently. 21686909Simp * Instead, it reads copies of the registers stored here by the 21786909Simp * interrupt handler. 21886909Simp */ 21986909Simp u_char last_modem_status; /* last MSR read by intr handler */ 22086909Simp u_char prev_modem_status; /* last MSR handled by high level */ 22186909Simp 22286909Simp u_char hotchar; /* ldisc-specific char to be handled ASAP */ 22386909Simp u_char *ibuf; /* start of input buffer */ 22486909Simp u_char *ibufend; /* end of input buffer */ 22586909Simp u_char *ibufold; /* old input buffer, to be freed */ 22686909Simp u_char *ihighwater; /* threshold in input buffer */ 22786909Simp u_char *iptr; /* next free spot in input buffer */ 22886909Simp int ibufsize; /* size of ibuf (not include error bytes) */ 22986909Simp int ierroff; /* offset of error bytes in ibuf */ 23086909Simp 23186909Simp struct lbq obufq; /* head of queue of output buffers */ 23286909Simp struct lbq obufs[2]; /* output buffers */ 23386909Simp 23486909Simp bus_space_tag_t bst; 23586909Simp bus_space_handle_t bsh; 23686909Simp 23786909Simp Port_t data_port; /* i/o ports */ 23886909Simp#ifdef COM_ESP 23986909Simp Port_t esp_port; 24086909Simp#endif 241120189Sbde Port_t int_ctl_port; 24286909Simp Port_t int_id_port; 24386909Simp Port_t modem_ctl_port; 24486909Simp Port_t line_status_port; 24586909Simp Port_t modem_status_port; 24686909Simp 24786909Simp struct tty *tp; /* cross reference */ 24886909Simp 24986909Simp /* Initial state. */ 25086909Simp struct termios it_in; /* should be in struct tty */ 25186909Simp struct termios it_out; 25286909Simp 25386909Simp /* Lock state. */ 25486909Simp struct termios lt_in; /* should be in struct tty */ 25586909Simp struct termios lt_out; 25686909Simp 25786909Simp bool_t do_timestamp; 25886909Simp bool_t do_dcd_timestamp; 25986909Simp struct timeval timestamp; 26086909Simp struct timeval dcd_timestamp; 26186909Simp struct pps_state pps; 262111613Sphk int pps_bit; 263119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 264119485Snjl int alt_brk_state; 265119485Snjl#endif 26686909Simp 26786909Simp u_long bytes_in; /* statistics */ 26886909Simp u_long bytes_out; 26986909Simp u_int delta_error_counts[CE_NTYPES]; 27086909Simp u_long error_counts[CE_NTYPES]; 27186909Simp 27289986Sjhay u_long rclk; 27389986Sjhay 27486909Simp struct resource *irqres; 27586909Simp struct resource *ioportres; 276116120Sscottl int ioportrid; 277116120Sscottl void *cookie; 278116120Sscottl dev_t devs[6]; 27986909Simp 28086909Simp /* 28186909Simp * Data area for output buffers. Someday we should build the output 28286909Simp * buffer queue without copying data. 28386909Simp */ 28486909Simp u_char obuf1[256]; 28586909Simp u_char obuf2[256]; 28686909Simp}; 28786909Simp 28886909Simp#ifdef COM_ESP 28993010Sbdestatic int espattach(struct com_s *com, Port_t esp_port); 29051078Speter#endif 29151078Speter 29251078Speterstatic timeout_t siobusycheck; 29393010Sbdestatic u_int siodivisor(u_long rclk, speed_t speed); 29451078Speterstatic timeout_t siodtrwakeup; 29593010Sbdestatic void comhardclose(struct com_s *com); 29693010Sbdestatic void sioinput(struct com_s *com); 29793010Sbdestatic void siointr1(struct com_s *com); 29893010Sbdestatic void siointr(void *arg); 29993010Sbdestatic int commctl(struct com_s *com, int bits, int how); 30093010Sbdestatic int comparam(struct tty *tp, struct termios *t); 30193010Sbdestatic void siopoll(void *); 30293010Sbdestatic void siosettimeout(void); 30393010Sbdestatic int siosetwater(struct com_s *com, speed_t speed); 30493010Sbdestatic void comstart(struct tty *tp); 30593010Sbdestatic void comstop(struct tty *tp, int rw); 30651078Speterstatic timeout_t comwakeup; 30793010Sbdestatic void disc_optim(struct tty *tp, struct termios *t, 30893010Sbde struct com_s *com); 30951078Speter 31085365Simpchar sio_driver_name[] = "sio"; 31170174Sjhbstatic struct mtx sio_lock; 31270174Sjhbstatic int sio_inited; 31351078Speter 31451078Speter/* table and macro for fast conversion from a unit number to its com struct */ 31585365Simpdevclass_t sio_devclass; 31651078Speter#define com_addr(unit) ((struct com_s *) \ 31786909Simp devclass_get_softc(sio_devclass, unit)) /* XXX */ 31851078Speter 31951078Speterstatic d_open_t sioopen; 32051078Speterstatic d_close_t sioclose; 32151078Speterstatic d_read_t sioread; 32251078Speterstatic d_write_t siowrite; 32351078Speterstatic d_ioctl_t sioioctl; 32451078Speter 32551078Speter#define CDEV_MAJOR 28 32651078Speterstatic struct cdevsw sio_cdevsw = { 327111815Sphk .d_open = sioopen, 328111815Sphk .d_close = sioclose, 329111815Sphk .d_read = sioread, 330111815Sphk .d_write = siowrite, 331111815Sphk .d_ioctl = sioioctl, 332111815Sphk .d_poll = ttypoll, 333111815Sphk .d_name = sio_driver_name, 334111815Sphk .d_maj = CDEV_MAJOR, 335111821Sphk .d_flags = D_TTY, 336111815Sphk .d_kqfilter = ttykqfilter, 33751078Speter}; 33851078Speter 339114722Sobrienint comconsole = -1; 34051078Speterstatic volatile speed_t comdefaultrate = CONSPEED; 34189986Sjhaystatic u_long comdefaultrclk = DEFAULT_RCLK; 34289986SjhaySYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 34398401Sn_hibmastatic speed_t gdbdefaultrate = GDBSPEED; 34498401Sn_hibmaSYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW, 34598401Sn_hibma &gdbdefaultrate, GDBSPEED, ""); 34651078Speterstatic u_int com_events; /* input chars + weighted output completions */ 34751078Speterstatic Port_t siocniobase; 34898401Sn_hibmastatic int siocnunit = -1; 34951078Speterstatic Port_t siogdbiobase; 35051078Speterstatic int siogdbunit = -1; 35172238Sjhbstatic void *sio_slow_ih; 35272238Sjhbstatic void *sio_fast_ih; 35351078Speterstatic int sio_timeout; 35451078Speterstatic int sio_timeouts_until_log; 35551078Speterstatic struct callout_handle sio_timeout_handle 35651078Speter = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 35753344Speterstatic int sio_numunits; 35851078Speter 35951078Speter#ifdef COM_ESP 36051078Speter/* XXX configure this properly. */ 36186909Simp/* XXX quite broken for new-bus. */ 36251078Speterstatic Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 36351078Speterstatic Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 36451078Speter#endif 36551078Speter 36651078Speter/* 36751078Speter * handle sysctl read/write requests for console speed 36851078Speter * 36951078Speter * In addition to setting comdefaultrate for I/O through /dev/console, 37051078Speter * also set the initial and lock values for the /dev/ttyXX device 37151078Speter * if there is one associated with the console. Finally, if the /dev/tty 37251078Speter * device has already been open, change the speed on the open running port 37351078Speter * itself. 37451078Speter */ 37551078Speter 37651078Speterstatic int 37762573Sphksysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 37851078Speter{ 37951078Speter int error, s; 38051078Speter speed_t newspeed; 38151078Speter struct com_s *com; 38251078Speter struct tty *tp; 38351078Speter 38451078Speter newspeed = comdefaultrate; 38551078Speter 38651078Speter error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 38751078Speter if (error || !req->newptr) 38851078Speter return (error); 38951078Speter 39051078Speter comdefaultrate = newspeed; 39151078Speter 39251078Speter if (comconsole < 0) /* serial console not selected? */ 39351078Speter return (0); 39451078Speter 39551078Speter com = com_addr(comconsole); 39657915Simp if (com == NULL) 39751078Speter return (ENXIO); 39851078Speter 39951078Speter /* 40051078Speter * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 40151078Speter * (note, the lock rates really are boolean -- if non-zero, disallow 40251078Speter * speed changes) 40351078Speter */ 40451078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = 40551078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 40651078Speter com->it_out.c_ispeed = com->it_out.c_ospeed = 40751078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 40851078Speter 40951078Speter /* 41051078Speter * if we're open, change the running rate too 41151078Speter */ 41251078Speter tp = com->tp; 41351078Speter if (tp && (tp->t_state & TS_ISOPEN)) { 41451078Speter tp->t_termios.c_ispeed = 41551078Speter tp->t_termios.c_ospeed = comdefaultrate; 41651078Speter s = spltty(); 41751078Speter error = comparam(tp, &tp->t_termios); 41851078Speter splx(s); 41951078Speter } 42051078Speter return error; 42151078Speter} 42251078Speter 42351078SpeterSYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 42451078Speter 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 42591280Simp/* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */ 42651078Speter 42786909Simp#define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit)) 42886909Simp#define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit)) 42986909Simp 43086909Simp/* 43186909Simp * Unload the driver and clear the table. 43286909Simp * XXX this is mostly wrong. 43386909Simp * XXX TODO: 43486909Simp * This is usually called when the card is ejected, but 435104933Simp * can be caused by a kldunload of a controller driver. 43686909Simp * The idea is to reset the driver's view of the device 43786909Simp * and ensure that any driver entry points such as 43886909Simp * read and write do not hang. 43986909Simp */ 44085365Simpint 44185365Simpsiodetach(dev) 44252471Simp device_t dev; 44351078Speter{ 44451078Speter struct com_s *com; 44565131Sphk int i; 44651078Speter 44752471Simp com = (struct com_s *) device_get_softc(dev); 44857915Simp if (com == NULL) { 44952471Simp device_printf(dev, "NULL com in siounload\n"); 45054386Simp return (0); 45151078Speter } 452120175Sbde com->gone = TRUE; 45365131Sphk for (i = 0 ; i < 6; i++) 45465131Sphk destroy_dev(com->devs[i]); 45554386Simp if (com->irqres) { 45654386Simp bus_teardown_intr(dev, com->irqres, com->cookie); 45754386Simp bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres); 45854386Simp } 45954386Simp if (com->ioportres) 460116120Sscottl bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid, 461116120Sscottl com->ioportres); 46251078Speter if (com->tp && (com->tp->t_state & TS_ISOPEN)) { 46357915Simp device_printf(dev, "still open, forcing close\n"); 46477750Simp (*linesw[com->tp->t_line].l_close)(com->tp, 0); 46551078Speter com->tp->t_gen++; 46651078Speter ttyclose(com->tp); 46751078Speter ttwakeup(com->tp); 46851078Speter ttwwakeup(com->tp); 46951078Speter } else { 47051078Speter if (com->ibuf != NULL) 47151078Speter free(com->ibuf, M_DEVBUF); 47286909Simp device_set_softc(dev, NULL); 47386909Simp free(com, M_DEVBUF); 47451078Speter } 47553978Simp return (0); 47651078Speter} 47751078Speter 47885365Simpint 47989986Sjhaysioprobe(dev, xrid, rclk, noprobe) 48058885Simp device_t dev; 48158885Simp int xrid; 48289986Sjhay u_long rclk; 48385365Simp int noprobe; 48451078Speter{ 48553344Speter#if 0 48651078Speter static bool_t already_init; 48753344Speter device_t xdev; 48853344Speter#endif 48960471Snyan struct com_s *com; 49089986Sjhay u_int divisor; 49151078Speter bool_t failures[10]; 49251078Speter int fn; 49351078Speter device_t idev; 49451078Speter Port_t iobase; 49551078Speter intrmask_t irqmap[4]; 49651078Speter intrmask_t irqs; 49751078Speter u_char mcr_image; 49851078Speter int result; 49954206Speter u_long xirq; 50051088Speter u_int flags = device_get_flags(dev); 50151078Speter int rid; 50251078Speter struct resource *port; 50351078Speter 50458885Simp rid = xrid; 50551078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 50651078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 50751078Speter if (!port) 50857915Simp return (ENXIO); 50951078Speter 51086909Simp com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO); 51186909Simp if (com == NULL) 51286909Simp return (ENOMEM); 51386909Simp device_set_softc(dev, com); 51460471Snyan com->bst = rman_get_bustag(port); 51560471Snyan com->bsh = rman_get_bushandle(port); 51689986Sjhay if (rclk == 0) 51789986Sjhay rclk = DEFAULT_RCLK; 51889986Sjhay com->rclk = rclk; 51960471Snyan 52085209Sjhb while (sio_inited != 2) 52185209Sjhb if (atomic_cmpset_int(&sio_inited, 0, 1)) { 52293818Sjhb mtx_init(&sio_lock, sio_driver_name, NULL, 52393818Sjhb (comconsole != -1) ? 52485209Sjhb MTX_SPIN | MTX_QUIET : MTX_SPIN); 52585209Sjhb atomic_store_rel_int(&sio_inited, 2); 52685209Sjhb } 52770174Sjhb 52853344Speter#if 0 52953344Speter /* 53053344Speter * XXX this is broken - when we are first called, there are no 53153344Speter * previously configured IO ports. We could hard code 53253344Speter * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 53353344Speter * This code has been doing nothing since the conversion since 53453344Speter * "count" is zero the first time around. 53553344Speter */ 53651078Speter if (!already_init) { 53751078Speter /* 53851078Speter * Turn off MCR_IENABLE for all likely serial ports. An unused 53951078Speter * port with its MCR_IENABLE gate open will inhibit interrupts 54051078Speter * from any used port that shares the interrupt vector. 54151078Speter * XXX the gate enable is elsewhere for some multiports. 54251078Speter */ 54351078Speter device_t *devs; 54453344Speter int count, i, xioport; 54551078Speter 54651078Speter devclass_get_devices(sio_devclass, &devs, &count); 54751078Speter for (i = 0; i < count; i++) { 54851078Speter xdev = devs[i]; 54954194Speter if (device_is_enabled(xdev) && 55054194Speter bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 55154194Speter NULL) == 0) 55253344Speter outb(xioport + com_mcr, 0); 55351078Speter } 55451078Speter free(devs, M_TEMP); 55551078Speter already_init = TRUE; 55651078Speter } 55753344Speter#endif 55851078Speter 55951078Speter if (COM_LLCONSOLE(flags)) { 56051078Speter printf("sio%d: reserved for low-level i/o\n", 56151078Speter device_get_unit(dev)); 56256788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 56386909Simp device_set_softc(dev, NULL); 56486909Simp free(com, M_DEVBUF); 56551078Speter return (ENXIO); 56651078Speter } 56751078Speter 56851078Speter /* 56951078Speter * If the device is on a multiport card and has an AST/4 57051078Speter * compatible interrupt control register, initialize this 57151078Speter * register and prepare to leave MCR_IENABLE clear in the mcr. 57251078Speter * Otherwise, prepare to set MCR_IENABLE in the mcr. 57351078Speter * Point idev to the device struct giving the correct id_irq. 57451078Speter * This is the struct for the master device if there is one. 57551078Speter */ 57651078Speter idev = dev; 57751078Speter mcr_image = MCR_IENABLE; 57851078Speter#ifdef COM_MULTIPORT 57957234Sbde if (COM_ISMULTIPORT(flags)) { 58054206Speter Port_t xiobase; 58154206Speter u_long io; 58254206Speter 58351078Speter idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 58451078Speter if (idev == NULL) { 58551078Speter printf("sio%d: master device %d not configured\n", 58651078Speter device_get_unit(dev), COM_MPMASTER(flags)); 58751078Speter idev = dev; 58851078Speter } 58957234Sbde if (!COM_NOTAST4(flags)) { 59057234Sbde if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 59157234Sbde NULL) == 0) { 59257234Sbde xiobase = io; 59357234Sbde if (bus_get_resource(idev, SYS_RES_IRQ, 0, 59457234Sbde NULL, NULL) == 0) 59557234Sbde outb(xiobase + com_scr, 0x80); 59657234Sbde else 59757234Sbde outb(xiobase + com_scr, 0); 59857234Sbde } 59957234Sbde mcr_image = 0; 60051078Speter } 60151078Speter } 60251078Speter#endif /* COM_MULTIPORT */ 60354194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 60451078Speter mcr_image = 0; 60551078Speter 60651078Speter bzero(failures, sizeof failures); 60751078Speter iobase = rman_get_start(port); 60851078Speter 60951078Speter /* 61051078Speter * We don't want to get actual interrupts, just masked ones. 61151078Speter * Interrupts from this line should already be masked in the ICU, 61251078Speter * but mask them in the processor as well in case there are some 61351078Speter * (misconfigured) shared interrupts. 61451078Speter */ 61572200Sbmilekic mtx_lock_spin(&sio_lock); 61651078Speter/* EXTRA DELAY? */ 61751078Speter 61851078Speter /* 619112384Ssobomax * For the TI16754 chips, set prescaler to 1 (4 is often the 620112384Ssobomax * default after-reset value) as otherwise it's impossible to 621112270Ssobomax * get highest baudrates. 622112270Ssobomax */ 623112270Ssobomax if (COM_TI16754(flags)) { 624112384Ssobomax u_char cfcr, efr; 625112270Ssobomax 626112384Ssobomax cfcr = sio_getreg(com, com_cfcr); 627112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 628112384Ssobomax efr = sio_getreg(com, com_efr); 629112384Ssobomax /* Unlock extended features to turn off prescaler. */ 630112384Ssobomax sio_setreg(com, com_efr, efr | EFR_EFE); 631112384Ssobomax /* Disable EFR. */ 632112384Ssobomax sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 633112384Ssobomax /* Turn off prescaler. */ 634112384Ssobomax sio_setreg(com, com_mcr, 635112384Ssobomax sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 636112384Ssobomax sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 637112384Ssobomax sio_setreg(com, com_efr, efr); 638112384Ssobomax sio_setreg(com, com_cfcr, cfcr); 639112270Ssobomax } 640112384Ssobomax 641112270Ssobomax /* 64251078Speter * Initialize the speed and the word size and wait long enough to 64351078Speter * drain the maximum of 16 bytes of junk in device output queues. 64451078Speter * The speed is undefined after a master reset and must be set 64551078Speter * before relying on anything related to output. There may be 64651078Speter * junk after a (very fast) soft reboot and (apparently) after 64751078Speter * master reset. 64851078Speter * XXX what about the UART bug avoided by waiting in comparam()? 64951078Speter * We don't want to to wait long enough to drain at 2 bps. 65051078Speter */ 65151078Speter if (iobase == siocniobase) 65251078Speter DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 65351078Speter else { 65460471Snyan sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 65589986Sjhay divisor = siodivisor(rclk, SIO_TEST_SPEED); 65689986Sjhay sio_setreg(com, com_dlbl, divisor & 0xff); 65789986Sjhay sio_setreg(com, com_dlbh, divisor >> 8); 65860471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 65951078Speter DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 66051078Speter } 66151078Speter 66251078Speter /* 66351078Speter * Enable the interrupt gate and disable device interupts. This 66451078Speter * should leave the device driving the interrupt line low and 66551078Speter * guarantee an edge trigger if an interrupt can be generated. 66651078Speter */ 66751078Speter/* EXTRA DELAY? */ 66860471Snyan sio_setreg(com, com_mcr, mcr_image); 66960471Snyan sio_setreg(com, com_ier, 0); 67051078Speter DELAY(1000); /* XXX */ 67151078Speter irqmap[0] = isa_irq_pending(); 67251078Speter 67351078Speter /* 67451078Speter * Attempt to set loopback mode so that we can send a null byte 67551078Speter * without annoying any external device. 67651078Speter */ 67751078Speter/* EXTRA DELAY? */ 67860471Snyan sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 67951078Speter 68051078Speter /* 68151078Speter * Attempt to generate an output interrupt. On 8250's, setting 68251078Speter * IER_ETXRDY generates an interrupt independent of the current 68351078Speter * setting and independent of whether the THR is empty. On 16450's, 68451078Speter * setting IER_ETXRDY generates an interrupt independent of the 68551078Speter * current setting. On 16550A's, setting IER_ETXRDY only 68651078Speter * generates an interrupt when IER_ETXRDY is not already set. 68751078Speter */ 68860471Snyan sio_setreg(com, com_ier, IER_ETXRDY); 68951078Speter 69051078Speter /* 69151078Speter * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 69251078Speter * an interrupt. They'd better generate one for actually doing 69351078Speter * output. Loopback may be broken on the same incompatibles but 69451078Speter * it's unlikely to do more than allow the null byte out. 69551078Speter */ 69660471Snyan sio_setreg(com, com_data, 0); 697120468Sbde if (iobase == siocniobase) 698120468Sbde DELAY((1 + 2) * 1000000 / (comdefaultrate / 10)); 699120468Sbde else 700120468Sbde DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 70151078Speter 70251078Speter /* 70351078Speter * Turn off loopback mode so that the interrupt gate works again 70451078Speter * (MCR_IENABLE was hidden). This should leave the device driving 70551078Speter * an interrupt line high. It doesn't matter if the interrupt 70651078Speter * line oscillates while we are not looking at it, since interrupts 70751078Speter * are disabled. 70851078Speter */ 70951078Speter/* EXTRA DELAY? */ 71060471Snyan sio_setreg(com, com_mcr, mcr_image); 71192401Simp 71292401Simp /* 71392401Simp * It seems my Xircom CBEM56G Cardbus modem wants to be reset 71492401Simp * to 8 bits *again*, or else probe test 0 will fail. 71592401Simp * gwk@sgi.com, 4/19/2001 71692401Simp */ 71792401Simp sio_setreg(com, com_cfcr, CFCR_8BITS); 71851078Speter 71951078Speter /* 720120189Sbde * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug", 721120189Sbde * so we probe for a buggy IIR_TXRDY implementation even in the 722120189Sbde * noprobe case. We don't probe for it in the !noprobe case because 723120189Sbde * noprobe is always set for PCMCIA cards and the problem is not 724120189Sbde * known to affect any other cards. 72551078Speter */ 72685365Simp if (noprobe) { 727120189Sbde /* Read IIR a few times. */ 72853370Speter for (fn = 0; fn < 2; fn ++) { 72953370Speter DELAY(10000); 73060471Snyan failures[6] = sio_getreg(com, com_iir); 73153370Speter } 732120189Sbde 733120189Sbde /* IIR_TXRDY should be clear. Is it? */ 73453370Speter result = 0; 73553370Speter if (failures[6] & IIR_TXRDY) { 736120189Sbde /* 737120189Sbde * No. We seem to have the bug. Does our fix for 738120189Sbde * it work? 739120189Sbde */ 74060471Snyan sio_setreg(com, com_ier, 0); 74160471Snyan if (sio_getreg(com, com_iir) & IIR_NOPEND) { 742120189Sbde /* Yes. We discovered the TXRDY bug! */ 74353370Speter SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 74453370Speter } else { 745120189Sbde /* No. Just fail. XXX */ 74653370Speter result = ENXIO; 74781793Simp sio_setreg(com, com_mcr, 0); 74853370Speter } 74951078Speter } else { 750120189Sbde /* Yes. No bug. */ 75153370Speter CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 75251078Speter } 75381793Simp sio_setreg(com, com_ier, 0); 75460471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); 75572200Sbmilekic mtx_unlock_spin(&sio_lock); 75653344Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 75786909Simp if (iobase == siocniobase) 75886909Simp result = 0; 75986909Simp if (result != 0) { 76086909Simp device_set_softc(dev, NULL); 76186909Simp free(com, M_DEVBUF); 76286909Simp } 76386909Simp return (result); 76453344Speter } 76553344Speter 76651078Speter /* 76751078Speter * Check that 76851078Speter * o the CFCR, IER and MCR in UART hold the values written to them 76951078Speter * (the values happen to be all distinct - this is good for 77051078Speter * avoiding false positive tests from bus echoes). 77151078Speter * o an output interrupt is generated and its vector is correct. 77251078Speter * o the interrupt goes away when the IIR in the UART is read. 77351078Speter */ 77451078Speter/* EXTRA DELAY? */ 77560471Snyan failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 77660471Snyan failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 777112270Ssobomax failures[2] = sio_getreg(com, com_mcr) - mcr_image; 77851078Speter DELAY(10000); /* Some internal modems need this time */ 77951078Speter irqmap[1] = isa_irq_pending(); 78060471Snyan failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 78151078Speter DELAY(1000); /* XXX */ 78251078Speter irqmap[2] = isa_irq_pending(); 78360471Snyan failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 78451078Speter 78551078Speter /* 78651078Speter * Turn off all device interrupts and check that they go off properly. 78751078Speter * Leave MCR_IENABLE alone. For ports without a master port, it gates 78851078Speter * the OUT2 output of the UART to 78951078Speter * the ICU input. Closing the gate would give a floating ICU input 79051078Speter * (unless there is another device driving it) and spurious interrupts. 79151078Speter * (On the system that this was first tested on, the input floats high 79251078Speter * and gives a (masked) interrupt as soon as the gate is closed.) 79351078Speter */ 79460471Snyan sio_setreg(com, com_ier, 0); 79560471Snyan sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 79660471Snyan failures[7] = sio_getreg(com, com_ier); 79751078Speter DELAY(1000); /* XXX */ 79851078Speter irqmap[3] = isa_irq_pending(); 79960471Snyan failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 80051078Speter 80172200Sbmilekic mtx_unlock_spin(&sio_lock); 80251078Speter 80351078Speter irqs = irqmap[1] & ~irqmap[0]; 80454194Speter if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 80589463Simp ((1 << xirq) & irqs) == 0) { 80651078Speter printf( 80754206Speter "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 80853344Speter device_get_unit(dev), xirq, irqs); 80989447Sbmah printf( 81089470Sbmah "sio%d: port may not be enabled\n", 81189447Sbmah device_get_unit(dev)); 81289463Simp } 81351078Speter if (bootverbose) 81451078Speter printf("sio%d: irq maps: %#x %#x %#x %#x\n", 81551078Speter device_get_unit(dev), 81651078Speter irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 81751078Speter 81851078Speter result = 0; 81951078Speter for (fn = 0; fn < sizeof failures; ++fn) 82051078Speter if (failures[fn]) { 82160471Snyan sio_setreg(com, com_mcr, 0); 82251078Speter result = ENXIO; 82351078Speter if (bootverbose) { 82451078Speter printf("sio%d: probe failed test(s):", 82551078Speter device_get_unit(dev)); 82651078Speter for (fn = 0; fn < sizeof failures; ++fn) 82751078Speter if (failures[fn]) 82851078Speter printf(" %d", fn); 82951078Speter printf("\n"); 83051078Speter } 83151078Speter break; 83251078Speter } 83351078Speter bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 83486909Simp if (iobase == siocniobase) 83586909Simp result = 0; 83686909Simp if (result != 0) { 83786909Simp device_set_softc(dev, NULL); 83886909Simp free(com, M_DEVBUF); 83986909Simp } 84086909Simp return (result); 84151078Speter} 84251078Speter 84351078Speter#ifdef COM_ESP 84451078Speterstatic int 84551078Speterespattach(com, esp_port) 84651078Speter struct com_s *com; 84751078Speter Port_t esp_port; 84851078Speter{ 84951078Speter u_char dips; 85051078Speter u_char val; 85151078Speter 85251078Speter /* 85351078Speter * Check the ESP-specific I/O port to see if we're an ESP 85451078Speter * card. If not, return failure immediately. 85551078Speter */ 85651078Speter if ((inb(esp_port) & 0xf3) == 0) { 85751078Speter printf(" port 0x%x is not an ESP board?\n", esp_port); 85851078Speter return (0); 85951078Speter } 86051078Speter 86151078Speter /* 86251078Speter * We've got something that claims to be a Hayes ESP card. 86351078Speter * Let's hope so. 86451078Speter */ 86551078Speter 86651078Speter /* Get the dip-switch configuration */ 86751078Speter outb(esp_port + ESP_CMD1, ESP_GETDIPS); 86851078Speter dips = inb(esp_port + ESP_STATUS1); 86951078Speter 87051078Speter /* 87151078Speter * Bits 0,1 of dips say which COM port we are. 87251078Speter */ 87360471Snyan if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 87451078Speter printf(" : ESP"); 87551078Speter else { 87651078Speter printf(" esp_port has com %d\n", dips & 0x03); 87751078Speter return (0); 87851078Speter } 87951078Speter 88051078Speter /* 88151078Speter * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 88251078Speter */ 88351078Speter outb(esp_port + ESP_CMD1, ESP_GETTEST); 88451078Speter val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 88551078Speter val = inb(esp_port + ESP_STATUS2); 88651078Speter if ((val & 0x70) < 0x20) { 88751078Speter printf("-old (%o)", val & 0x70); 88851078Speter return (0); 88951078Speter } 89051078Speter 89151078Speter /* 89251078Speter * Check for ability to emulate 16550: bit 7 == 1 89351078Speter */ 89451078Speter if ((dips & 0x80) == 0) { 89551078Speter printf(" slave"); 89651078Speter return (0); 89751078Speter } 89851078Speter 89951078Speter /* 90051078Speter * Okay, we seem to be a Hayes ESP card. Whee. 90151078Speter */ 90251078Speter com->esp = TRUE; 90351078Speter com->esp_port = esp_port; 90451078Speter return (1); 90551078Speter} 90651078Speter#endif /* COM_ESP */ 90751078Speter 90885365Simpint 90989986Sjhaysioattach(dev, xrid, rclk) 91051078Speter device_t dev; 91158885Simp int xrid; 91289986Sjhay u_long rclk; 91351078Speter{ 91451078Speter struct com_s *com; 91551078Speter#ifdef COM_ESP 91651078Speter Port_t *espp; 91751078Speter#endif 91851078Speter Port_t iobase; 91993470Sbde int minorbase; 92051078Speter int unit; 92153344Speter u_int flags; 92251078Speter int rid; 92351078Speter struct resource *port; 92453344Speter int ret; 92551078Speter 92658885Simp rid = xrid; 92751078Speter port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 92851078Speter 0, ~0, IO_COMSIZE, RF_ACTIVE); 92951078Speter if (!port) 93057915Simp return (ENXIO); 93151078Speter 93251078Speter iobase = rman_get_start(port); 93351078Speter unit = device_get_unit(dev); 93451078Speter com = device_get_softc(dev); 93553344Speter flags = device_get_flags(dev); 93651078Speter 93753344Speter if (unit >= sio_numunits) 93853344Speter sio_numunits = unit + 1; 93951078Speter /* 94051078Speter * sioprobe() has initialized the device registers as follows: 94151078Speter * o cfcr = CFCR_8BITS. 94251078Speter * It is most important that CFCR_DLAB is off, so that the 94351078Speter * data port is not hidden when we enable interrupts. 94451078Speter * o ier = 0. 94551078Speter * Interrupts are only enabled when the line is open. 94651078Speter * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 94751078Speter * interrupt control register or the config specifies no irq. 94851078Speter * Keeping MCR_DTR and MCR_RTS off might stop the external 94951078Speter * device from sending before we are ready. 95051078Speter */ 95151078Speter bzero(com, sizeof *com); 95251078Speter com->unit = unit; 95351078Speter com->ioportres = port; 954116120Sscottl com->ioportrid = rid; 95560471Snyan com->bst = rman_get_bustag(port); 95660471Snyan com->bsh = rman_get_bushandle(port); 95751078Speter com->cfcr_image = CFCR_8BITS; 95851078Speter com->dtr_wait = 3 * hz; 95951078Speter com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 96057234Sbde com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 96151078Speter com->tx_fifo_size = 1; 96251078Speter com->obufs[0].l_head = com->obuf1; 96351078Speter com->obufs[1].l_head = com->obuf2; 96451078Speter 96551078Speter com->data_port = iobase + com_data; 966120189Sbde com->int_ctl_port = iobase + com_ier; 96751078Speter com->int_id_port = iobase + com_iir; 96851078Speter com->modem_ctl_port = iobase + com_mcr; 96951078Speter com->mcr_image = inb(com->modem_ctl_port); 97051078Speter com->line_status_port = iobase + com_lsr; 97151078Speter com->modem_status_port = iobase + com_msr; 97251078Speter 97389986Sjhay if (rclk == 0) 97489986Sjhay rclk = DEFAULT_RCLK; 97589986Sjhay com->rclk = rclk; 97689986Sjhay 97751078Speter /* 97851078Speter * We don't use all the flags from <sys/ttydefaults.h> since they 97951078Speter * are only relevant for logins. It's important to have echo off 98051078Speter * initially so that the line doesn't start blathering before the 98151078Speter * echo flag can be turned off. 98251078Speter */ 98351078Speter com->it_in.c_iflag = 0; 98451078Speter com->it_in.c_oflag = 0; 98551078Speter com->it_in.c_cflag = TTYDEF_CFLAG; 98651078Speter com->it_in.c_lflag = 0; 98751078Speter if (unit == comconsole) { 98851078Speter com->it_in.c_iflag = TTYDEF_IFLAG; 98951078Speter com->it_in.c_oflag = TTYDEF_OFLAG; 99051078Speter com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 99151078Speter com->it_in.c_lflag = TTYDEF_LFLAG; 99251078Speter com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 99351078Speter com->lt_out.c_ispeed = com->lt_out.c_ospeed = 99451078Speter com->lt_in.c_ispeed = com->lt_in.c_ospeed = 99551078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 99651078Speter } else 99751078Speter com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 99865605Sjhb if (siosetwater(com, com->it_in.c_ispeed) != 0) { 99972200Sbmilekic mtx_unlock_spin(&sio_lock); 100056788Sbde /* 100156788Sbde * Leave i/o resources allocated if this is a `cn'-level 100256788Sbde * console, so that other devices can't snarf them. 100356788Sbde */ 100456788Sbde if (iobase != siocniobase) 100556788Sbde bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 100656788Sbde return (ENOMEM); 100751078Speter } 100872200Sbmilekic mtx_unlock_spin(&sio_lock); 100951078Speter termioschars(&com->it_in); 101051078Speter com->it_out = com->it_in; 101151078Speter 101251078Speter /* attempt to determine UART type */ 101351078Speter printf("sio%d: type", unit); 101451078Speter 101551078Speter 1016104067Sphk if (!COM_ISMULTIPORT(flags) && 1017104067Sphk !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) { 101851078Speter u_char scr; 101951078Speter u_char scr1; 102051078Speter u_char scr2; 102151078Speter 102260471Snyan scr = sio_getreg(com, com_scr); 102360471Snyan sio_setreg(com, com_scr, 0xa5); 102460471Snyan scr1 = sio_getreg(com, com_scr); 102560471Snyan sio_setreg(com, com_scr, 0x5a); 102660471Snyan scr2 = sio_getreg(com, com_scr); 102760471Snyan sio_setreg(com, com_scr, scr); 102851078Speter if (scr1 != 0xa5 || scr2 != 0x5a) { 102989447Sbmah printf(" 8250 or not responding"); 103051078Speter goto determined_type; 103151078Speter } 103251078Speter } 103360471Snyan sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 103451078Speter DELAY(100); 103551078Speter switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 103651078Speter case FIFO_RX_LOW: 103751078Speter printf(" 16450"); 103851078Speter break; 103951078Speter case FIFO_RX_MEDL: 104051078Speter printf(" 16450?"); 104151078Speter break; 104251078Speter case FIFO_RX_MEDH: 104351078Speter printf(" 16550?"); 104451078Speter break; 104551078Speter case FIFO_RX_HIGH: 104651078Speter if (COM_NOFIFO(flags)) { 104751078Speter printf(" 16550A fifo disabled"); 1048120173Sbde break; 104951078Speter } 1050120173Sbde com->hasfifo = TRUE; 1051120173Sbde if (COM_ST16650A(flags)) { 1052120173Sbde printf(" ST16650A"); 1053120173Sbde com->st16650a = TRUE; 1054120173Sbde com->tx_fifo_size = 32; 1055120173Sbde break; 1056120173Sbde } 1057120173Sbde if (COM_TI16754(flags)) { 1058120173Sbde printf(" TI16754"); 1059120173Sbde com->tx_fifo_size = 64; 1060120173Sbde break; 1061120173Sbde } 1062120173Sbde printf(" 16550A"); 106351078Speter#ifdef COM_ESP 106451078Speter for (espp = likely_esp_ports; *espp != 0; espp++) 106551078Speter if (espattach(com, *espp)) { 106651078Speter com->tx_fifo_size = 1024; 106751078Speter break; 106851078Speter } 1069120173Sbde if (com->esp != NULL) 1070120173Sbde break; 107151078Speter#endif 1072120173Sbde com->tx_fifo_size = COM_FIFOSIZE(flags); 1073120173Sbde if (com->tx_fifo_size == 0) 1074120173Sbde com->tx_fifo_size = 16; 1075120173Sbde else 1076120173Sbde printf(" lookalike with %u bytes FIFO", 1077120173Sbde com->tx_fifo_size); 107851078Speter break; 107951078Speter } 108051078Speter#ifdef COM_ESP 1081120173Sbde if (com->esp != NULL) { 108251078Speter /* 108351078Speter * Set 16550 compatibility mode. 108451078Speter * We don't use the ESP_MODE_SCALE bit to increase the 108551078Speter * fifo trigger levels because we can't handle large 108651078Speter * bursts of input. 108751078Speter * XXX flow control should be set in comparam(), not here. 108851078Speter */ 108951078Speter outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 109051078Speter outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 109151078Speter 109251078Speter /* Set RTS/CTS flow control. */ 109351078Speter outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 109451078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 109551078Speter outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 109651078Speter 109751078Speter /* Set flow-control levels. */ 109851078Speter outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 109951078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 110051078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 110151078Speter outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 110251078Speter outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 110351078Speter } 110451078Speter#endif /* COM_ESP */ 110560471Snyan sio_setreg(com, com_fifo, 0); 110651078Speterdetermined_type: ; 110751078Speter 110851078Speter#ifdef COM_MULTIPORT 110951078Speter if (COM_ISMULTIPORT(flags)) { 111053344Speter device_t masterdev; 111153344Speter 111251078Speter com->multiport = TRUE; 111351078Speter printf(" (multiport"); 111451078Speter if (unit == COM_MPMASTER(flags)) 111551078Speter printf(" master"); 111651078Speter printf(")"); 111753344Speter masterdev = devclass_get_device(sio_devclass, 111853344Speter COM_MPMASTER(flags)); 111957234Sbde com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 112057234Sbde SYS_RES_IRQ, 0, NULL, NULL) != 0); 112151078Speter } 112251078Speter#endif /* COM_MULTIPORT */ 112351078Speter if (unit == comconsole) 112451078Speter printf(", console"); 112553344Speter if (COM_IIR_TXRDYBUG(flags)) 1126120189Sbde printf(" with a buggy IIR_TXRDY implementation"); 112751078Speter printf("\n"); 112851078Speter 112967551Sjhb if (sio_fast_ih == NULL) { 113072238Sjhb swi_add(&tty_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 113172238Sjhb &sio_fast_ih); 113272238Sjhb swi_add(&clk_ithd, "tty:sio", siopoll, NULL, SWI_TTY, 0, 113372238Sjhb &sio_slow_ih); 113451078Speter } 113593470Sbde minorbase = UNIT_TO_MINOR(unit); 113693470Sbde com->devs[0] = make_dev(&sio_cdevsw, minorbase, 113751078Speter UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 113893470Sbde com->devs[1] = make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 113951078Speter UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 114093470Sbde com->devs[2] = make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 114151078Speter UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 114293470Sbde com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 114351078Speter UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 114465131Sphk com->devs[4] = make_dev(&sio_cdevsw, 114593470Sbde minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 114651078Speter UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 114765131Sphk com->devs[5] = make_dev(&sio_cdevsw, 114893470Sbde minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 114951078Speter UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1150110249Sphk for (rid = 0; rid < 6; rid++) 1151110249Sphk com->devs[rid]->si_drv1 = com; 115251078Speter com->flags = flags; 115351078Speter com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1154111613Sphk 1155111613Sphk if (COM_PPSCTS(flags)) 1156111613Sphk com->pps_bit = MSR_CTS; 1157111613Sphk else 1158111613Sphk com->pps_bit = MSR_DCD; 115951078Speter pps_init(&com->pps); 116051078Speter 116151078Speter rid = 0; 116251078Speter com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 116353344Speter RF_ACTIVE); 116453344Speter if (com->irqres) { 116553344Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 116665557Sjasone INTR_TYPE_TTY | INTR_FAST, 116754386Simp siointr, com, &com->cookie); 116854194Speter if (ret) { 116954194Speter ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 117054194Speter com->irqres, INTR_TYPE_TTY, 117154386Simp siointr, com, &com->cookie); 117254194Speter if (ret == 0) 117383246Sdd device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 117454194Speter } 117553344Speter if (ret) 117653344Speter device_printf(dev, "could not activate interrupt\n"); 117778504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 117878504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 117978504Siedowse /* 118078504Siedowse * Enable interrupts for early break-to-debugger support 118178504Siedowse * on the console. 118278504Siedowse */ 118378504Siedowse if (ret == 0 && unit == comconsole) 118478504Siedowse outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 118578504Siedowse IER_EMSC); 118678504Siedowse#endif 118753344Speter } 118851078Speter 118951078Speter return (0); 119051078Speter} 119151078Speter 119251078Speterstatic int 119383366Sjuliansioopen(dev, flag, mode, td) 119451078Speter dev_t dev; 119551078Speter int flag; 119651078Speter int mode; 119783366Sjulian struct thread *td; 119851078Speter{ 119951078Speter struct com_s *com; 120051078Speter int error; 120151078Speter int mynor; 120251078Speter int s; 120351078Speter struct tty *tp; 120451078Speter int unit; 120551078Speter 120651078Speter mynor = minor(dev); 120751078Speter unit = MINOR_TO_UNIT(mynor); 120853344Speter com = com_addr(unit); 120953344Speter if (com == NULL) 121051078Speter return (ENXIO); 121151078Speter if (com->gone) 121251078Speter return (ENXIO); 121351078Speter if (mynor & CONTROL_MASK) 121451078Speter return (0); 121551078Speter tp = dev->si_tty = com->tp = ttymalloc(com->tp); 121651078Speter s = spltty(); 121751078Speter /* 121851078Speter * We jump to this label after all non-interrupted sleeps to pick 121951078Speter * up any changes of the device state. 122051078Speter */ 122151078Speteropen_top: 122251078Speter while (com->state & CS_DTR_OFF) { 122351078Speter error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "siodtr", 0); 122451078Speter if (com_addr(unit) == NULL) 122551078Speter return (ENXIO); 122651078Speter if (error != 0 || com->gone) 122751078Speter goto out; 122851078Speter } 122951078Speter if (tp->t_state & TS_ISOPEN) { 123051078Speter /* 123151078Speter * The device is open, so everything has been initialized. 123251078Speter * Handle conflicts. 123351078Speter */ 123451078Speter if (mynor & CALLOUT_MASK) { 123551078Speter if (!com->active_out) { 123651078Speter error = EBUSY; 123751078Speter goto out; 123851078Speter } 123951078Speter } else { 124051078Speter if (com->active_out) { 124151078Speter if (flag & O_NONBLOCK) { 124251078Speter error = EBUSY; 124351078Speter goto out; 124451078Speter } 124551078Speter error = tsleep(&com->active_out, 124651078Speter TTIPRI | PCATCH, "siobi", 0); 124751078Speter if (com_addr(unit) == NULL) 124851078Speter return (ENXIO); 124951078Speter if (error != 0 || com->gone) 125051078Speter goto out; 125151078Speter goto open_top; 125251078Speter } 125351078Speter } 125451078Speter if (tp->t_state & TS_XCLUDE && 125593593Sjhb suser(td)) { 125651078Speter error = EBUSY; 125751078Speter goto out; 125851078Speter } 125951078Speter } else { 126051078Speter /* 126151078Speter * The device isn't open, so there are no conflicts. 126251078Speter * Initialize it. Initialization is done twice in many 126351078Speter * cases: to preempt sleeping callin opens if we are 126451078Speter * callout, and to complete a callin open after DCD rises. 126551078Speter */ 126651078Speter tp->t_oproc = comstart; 126751078Speter tp->t_param = comparam; 126851654Sphk tp->t_stop = comstop; 126951078Speter tp->t_dev = dev; 127051078Speter tp->t_termios = mynor & CALLOUT_MASK 127151078Speter ? com->it_out : com->it_in; 127251078Speter (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 127351078Speter com->poll = com->no_irq; 127451078Speter com->poll_output = com->loses_outints; 127551078Speter ++com->wopeners; 127651078Speter error = comparam(tp, &tp->t_termios); 127751078Speter --com->wopeners; 127851078Speter if (error != 0) 127951078Speter goto out; 128051078Speter /* 128151078Speter * XXX we should goto open_top if comparam() slept. 128251078Speter */ 128351078Speter if (com->hasfifo) { 1284102542Sphk int i; 128551078Speter /* 128651078Speter * (Re)enable and drain fifos. 128751078Speter * 128851078Speter * Certain SMC chips cause problems if the fifos 128951078Speter * are enabled while input is ready. Turn off the 129051078Speter * fifo if necessary to clear the input. We test 129151078Speter * the input ready bit after enabling the fifos 129251078Speter * since we've already enabled them in comparam() 129351078Speter * and to handle races between enabling and fresh 129451078Speter * input. 129551078Speter */ 1296102542Sphk for (i = 0; i < 500; i++) { 129760471Snyan sio_setreg(com, com_fifo, 129860471Snyan FIFO_RCV_RST | FIFO_XMT_RST 129960471Snyan | com->fifo_image); 130051078Speter /* 130151078Speter * XXX the delays are for superstitious 130251078Speter * historical reasons. It must be less than 130351078Speter * the character time at the maximum 130451078Speter * supported speed (87 usec at 115200 bps 130551078Speter * 8N1). Otherwise we might loop endlessly 130651078Speter * if data is streaming in. We used to use 130751078Speter * delays of 100. That usually worked 130851078Speter * because DELAY(100) used to usually delay 130951078Speter * for about 85 usec instead of 100. 131051078Speter */ 131151078Speter DELAY(50); 131251078Speter if (!(inb(com->line_status_port) & LSR_RXRDY)) 131351078Speter break; 131460471Snyan sio_setreg(com, com_fifo, 0); 131551078Speter DELAY(50); 131651078Speter (void) inb(com->data_port); 131751078Speter } 1318102542Sphk if (i == 500) { 1319102542Sphk error = EIO; 1320102542Sphk goto out; 1321102542Sphk } 132251078Speter } 132351078Speter 132472200Sbmilekic mtx_lock_spin(&sio_lock); 132551078Speter (void) inb(com->line_status_port); 132651078Speter (void) inb(com->data_port); 132751078Speter com->prev_modem_status = com->last_modem_status 132851078Speter = inb(com->modem_status_port); 1329120189Sbde outb(com->int_ctl_port, 1330120189Sbde IER_ERXRDY | IER_ERLS | IER_EMSC 1331120189Sbde | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY)); 133272200Sbmilekic mtx_unlock_spin(&sio_lock); 133351078Speter /* 133451078Speter * Handle initial DCD. Callout devices get a fake initial 133551078Speter * DCD (trapdoor DCD). If we are callout, then any sleeping 133651078Speter * callin opens get woken up and resume sleeping on "siobi" 133751078Speter * instead of "siodcd". 133851078Speter */ 133951078Speter /* 134051078Speter * XXX `mynor & CALLOUT_MASK' should be 134151078Speter * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 134251078Speter * TRAPDOOR_CARRIER is the default initial state for callout 134351078Speter * devices and SOFT_CARRIER is like CLOCAL except it hides 134451078Speter * the true carrier. 134551078Speter */ 134651078Speter if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 134751078Speter (*linesw[tp->t_line].l_modem)(tp, 1); 134851078Speter } 134951078Speter /* 135051078Speter * Wait for DCD if necessary. 135151078Speter */ 135251078Speter if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 135351078Speter && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 135451078Speter ++com->wopeners; 135551078Speter error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0); 135651078Speter if (com_addr(unit) == NULL) 135751078Speter return (ENXIO); 135851078Speter --com->wopeners; 135951078Speter if (error != 0 || com->gone) 136051078Speter goto out; 136151078Speter goto open_top; 136251078Speter } 136351078Speter error = (*linesw[tp->t_line].l_open)(dev, tp); 136451078Speter disc_optim(tp, &tp->t_termios, com); 136551078Speter if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 136651078Speter com->active_out = TRUE; 136751078Speter siosettimeout(); 136851078Speterout: 136951078Speter splx(s); 137051078Speter if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 137151078Speter comhardclose(com); 137251078Speter return (error); 137351078Speter} 137451078Speter 137551078Speterstatic int 137683366Sjuliansioclose(dev, flag, mode, td) 137751078Speter dev_t dev; 137851078Speter int flag; 137951078Speter int mode; 138083366Sjulian struct thread *td; 138151078Speter{ 138251078Speter struct com_s *com; 138351078Speter int mynor; 138451078Speter int s; 138551078Speter struct tty *tp; 138651078Speter 138751078Speter mynor = minor(dev); 138851078Speter if (mynor & CONTROL_MASK) 138951078Speter return (0); 139051078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 139157915Simp if (com == NULL) 139257915Simp return (ENODEV); 139351078Speter tp = com->tp; 139451078Speter s = spltty(); 139551078Speter (*linesw[tp->t_line].l_close)(tp, flag); 139651078Speter disc_optim(tp, &tp->t_termios, com); 139751654Sphk comstop(tp, FREAD | FWRITE); 139851078Speter comhardclose(com); 139951078Speter ttyclose(tp); 140051078Speter siosettimeout(); 140151078Speter splx(s); 140251078Speter if (com->gone) { 140351078Speter printf("sio%d: gone\n", com->unit); 140451078Speter s = spltty(); 140551078Speter if (com->ibuf != NULL) 140651078Speter free(com->ibuf, M_DEVBUF); 140751078Speter bzero(tp, sizeof *tp); 140851078Speter splx(s); 140951078Speter } 141051078Speter return (0); 141151078Speter} 141251078Speter 141351078Speterstatic void 141451078Spetercomhardclose(com) 141551078Speter struct com_s *com; 141651078Speter{ 141751078Speter int s; 141851078Speter struct tty *tp; 141951078Speter 142051078Speter s = spltty(); 142151078Speter com->poll = FALSE; 142251078Speter com->poll_output = FALSE; 142351078Speter com->do_timestamp = FALSE; 142451078Speter com->do_dcd_timestamp = FALSE; 142551078Speter com->pps.ppsparam.mode = 0; 142660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 142778504Siedowse tp = com->tp; 142878504Siedowse 142978504Siedowse#if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 143078504Siedowse defined(ALT_BREAK_TO_DEBUGGER)) 143178504Siedowse /* 143278504Siedowse * Leave interrupts enabled and don't clear DTR if this is the 143378504Siedowse * console. This allows us to detect break-to-debugger events 143478504Siedowse * while the console device is closed. 143578504Siedowse */ 143678504Siedowse if (com->unit != comconsole) 143778504Siedowse#endif 143851078Speter { 143960471Snyan sio_setreg(com, com_ier, 0); 144051078Speter if (tp->t_cflag & HUPCL 144151078Speter /* 144251078Speter * XXX we will miss any carrier drop between here and the 144351078Speter * next open. Perhaps we should watch DCD even when the 144451078Speter * port is closed; it is not sufficient to check it at 144551078Speter * the next open because it might go up and down while 144651078Speter * we're not watching. 144751078Speter */ 144851078Speter || (!com->active_out 144951078Speter && !(com->prev_modem_status & MSR_DCD) 145051078Speter && !(com->it_in.c_cflag & CLOCAL)) 145151078Speter || !(tp->t_state & TS_ISOPEN)) { 145251078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 145351078Speter if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 145451078Speter timeout(siodtrwakeup, com, com->dtr_wait); 145551078Speter com->state |= CS_DTR_OFF; 145651078Speter } 145751078Speter } 145851078Speter } 145951078Speter if (com->hasfifo) { 146051078Speter /* 146151078Speter * Disable fifos so that they are off after controlled 146251078Speter * reboots. Some BIOSes fail to detect 16550s when the 146351078Speter * fifos are enabled. 146451078Speter */ 146560471Snyan sio_setreg(com, com_fifo, 0); 146651078Speter } 146751078Speter com->active_out = FALSE; 146851078Speter wakeup(&com->active_out); 146951078Speter wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 147051078Speter splx(s); 147151078Speter} 147251078Speter 147351078Speterstatic int 147451078Spetersioread(dev, uio, flag) 147551078Speter dev_t dev; 147651078Speter struct uio *uio; 147751078Speter int flag; 147851078Speter{ 147951078Speter int mynor; 148051078Speter struct com_s *com; 148151078Speter 148251078Speter mynor = minor(dev); 148351078Speter if (mynor & CONTROL_MASK) 148451078Speter return (ENODEV); 148551078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 148657915Simp if (com == NULL || com->gone) 148751078Speter return (ENODEV); 148851078Speter return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 148951078Speter} 149051078Speter 149151078Speterstatic int 149251078Spetersiowrite(dev, uio, flag) 149351078Speter dev_t dev; 149451078Speter struct uio *uio; 149551078Speter int flag; 149651078Speter{ 149751078Speter int mynor; 149851078Speter struct com_s *com; 149951078Speter int unit; 150051078Speter 150151078Speter mynor = minor(dev); 150251078Speter if (mynor & CONTROL_MASK) 150351078Speter return (ENODEV); 150451078Speter 150551078Speter unit = MINOR_TO_UNIT(mynor); 150651078Speter com = com_addr(unit); 150757915Simp if (com == NULL || com->gone) 150851078Speter return (ENODEV); 150951078Speter /* 151051078Speter * (XXX) We disallow virtual consoles if the physical console is 151151078Speter * a serial port. This is in case there is a display attached that 151251078Speter * is not the console. In that situation we don't need/want the X 151351078Speter * server taking over the console. 151451078Speter */ 151551078Speter if (constty != NULL && unit == comconsole) 151651078Speter constty = NULL; 151751078Speter return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 151851078Speter} 151951078Speter 152051078Speterstatic void 152151078Spetersiobusycheck(chan) 152251078Speter void *chan; 152351078Speter{ 152451078Speter struct com_s *com; 152551078Speter int s; 152651078Speter 152751078Speter com = (struct com_s *)chan; 152851078Speter 152951078Speter /* 153051078Speter * Clear TS_BUSY if low-level output is complete. 153151078Speter * spl locking is sufficient because siointr1() does not set CS_BUSY. 153251078Speter * If siointr1() clears CS_BUSY after we look at it, then we'll get 153351078Speter * called again. Reading the line status port outside of siointr1() 153451078Speter * is safe because CS_BUSY is clear so there are no output interrupts 153551078Speter * to lose. 153651078Speter */ 153751078Speter s = spltty(); 153851078Speter if (com->state & CS_BUSY) 153951078Speter com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 154051078Speter else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 154151078Speter == (LSR_TSRE | LSR_TXRDY)) { 154251078Speter com->tp->t_state &= ~TS_BUSY; 154351078Speter ttwwakeup(com->tp); 154451078Speter com->extra_state &= ~CSE_BUSYCHECK; 154551078Speter } else 154651078Speter timeout(siobusycheck, com, hz / 100); 154751078Speter splx(s); 154851078Speter} 154951078Speter 155089986Sjhaystatic u_int 155189986Sjhaysiodivisor(rclk, speed) 155289986Sjhay u_long rclk; 155389986Sjhay speed_t speed; 155489986Sjhay{ 155589986Sjhay long actual_speed; 155689986Sjhay u_int divisor; 155789986Sjhay int error; 155889986Sjhay 1559114334Speter if (speed == 0) 156089986Sjhay return (0); 1561114334Speter#if UINT_MAX > (ULONG_MAX - 1) / 8 1562114334Speter if (speed > (ULONG_MAX - 1) / 8) 1563114334Speter return (0); 1564114334Speter#endif 156589986Sjhay divisor = (rclk / (8UL * speed) + 1) / 2; 156689986Sjhay if (divisor == 0 || divisor >= 65536) 156789986Sjhay return (0); 156889986Sjhay actual_speed = rclk / (16UL * divisor); 156989986Sjhay 157089986Sjhay /* 10 times error in percent: */ 157189986Sjhay error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 157289986Sjhay 157389986Sjhay /* 3.0% maximum error tolerance: */ 157489986Sjhay if (error < -30 || error > 30) 157589986Sjhay return (0); 157689986Sjhay 157789986Sjhay return (divisor); 157889986Sjhay} 157989986Sjhay 158051078Speterstatic void 158151078Spetersiodtrwakeup(chan) 158251078Speter void *chan; 158351078Speter{ 158451078Speter struct com_s *com; 158551078Speter 158651078Speter com = (struct com_s *)chan; 158751078Speter com->state &= ~CS_DTR_OFF; 158851078Speter wakeup(&com->dtr_wait); 158951078Speter} 159051078Speter 159165557Sjasone/* 159270174Sjhb * Call this function with the sio_lock mutex held. It will return with the 159370174Sjhb * lock still held. 159465557Sjasone */ 159551078Speterstatic void 159651078Spetersioinput(com) 159751078Speter struct com_s *com; 159851078Speter{ 159951078Speter u_char *buf; 160051078Speter int incc; 160151078Speter u_char line_status; 160251078Speter int recv_data; 160351078Speter struct tty *tp; 160451078Speter 160551078Speter buf = com->ibuf; 160651078Speter tp = com->tp; 160751078Speter if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 160851078Speter com_events -= (com->iptr - com->ibuf); 160951078Speter com->iptr = com->ibuf; 161051078Speter return; 161151078Speter } 161251078Speter if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 161351078Speter /* 161451078Speter * Avoid the grotesquely inefficient lineswitch routine 161551078Speter * (ttyinput) in "raw" mode. It usually takes about 450 161651078Speter * instructions (that's without canonical processing or echo!). 161751078Speter * slinput is reasonably fast (usually 40 instructions plus 161851078Speter * call overhead). 161951078Speter */ 162051078Speter do { 162165557Sjasone /* 162265557Sjasone * This may look odd, but it is using save-and-enable 162365557Sjasone * semantics instead of the save-and-disable semantics 162465557Sjasone * that are used everywhere else. 162565557Sjasone */ 162672200Sbmilekic mtx_unlock_spin(&sio_lock); 162751078Speter incc = com->iptr - buf; 162851078Speter if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 162951078Speter && (com->state & CS_RTS_IFLOW 163051078Speter || tp->t_iflag & IXOFF) 163151078Speter && !(tp->t_state & TS_TBLOCK)) 163251078Speter ttyblock(tp); 163351078Speter com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 163451078Speter += b_to_q((char *)buf, incc, &tp->t_rawq); 163551078Speter buf += incc; 163651078Speter tk_nin += incc; 163751078Speter tk_rawcc += incc; 163851078Speter tp->t_rawcc += incc; 163951078Speter ttwakeup(tp); 164051078Speter if (tp->t_state & TS_TTSTOP 164151078Speter && (tp->t_iflag & IXANY 164251078Speter || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 164351078Speter tp->t_state &= ~TS_TTSTOP; 164451078Speter tp->t_lflag &= ~FLUSHO; 164551078Speter comstart(tp); 164651078Speter } 164772200Sbmilekic mtx_lock_spin(&sio_lock); 164851078Speter } while (buf < com->iptr); 164951078Speter } else { 165051078Speter do { 165165557Sjasone /* 165265557Sjasone * This may look odd, but it is using save-and-enable 165365557Sjasone * semantics instead of the save-and-disable semantics 165465557Sjasone * that are used everywhere else. 165565557Sjasone */ 165672200Sbmilekic mtx_unlock_spin(&sio_lock); 165751078Speter line_status = buf[com->ierroff]; 165851078Speter recv_data = *buf++; 165951078Speter if (line_status 166051078Speter & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 166151078Speter if (line_status & LSR_BI) 166251078Speter recv_data |= TTY_BI; 166351078Speter if (line_status & LSR_FE) 166451078Speter recv_data |= TTY_FE; 166551078Speter if (line_status & LSR_OE) 166651078Speter recv_data |= TTY_OE; 166751078Speter if (line_status & LSR_PE) 166851078Speter recv_data |= TTY_PE; 166951078Speter } 167051078Speter (*linesw[tp->t_line].l_rint)(recv_data, tp); 167172200Sbmilekic mtx_lock_spin(&sio_lock); 167251078Speter } while (buf < com->iptr); 167351078Speter } 167451078Speter com_events -= (com->iptr - com->ibuf); 167551078Speter com->iptr = com->ibuf; 167651078Speter 167751078Speter /* 167851078Speter * There is now room for another low-level buffer full of input, 167951078Speter * so enable RTS if it is now disabled and there is room in the 168051078Speter * high-level buffer. 168151078Speter */ 168251078Speter if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 168351078Speter !(tp->t_state & TS_TBLOCK)) 168451078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 168551078Speter} 168651078Speter 1687104094Sphkstatic void 168851078Spetersiointr(arg) 168951078Speter void *arg; 169051078Speter{ 169170174Sjhb struct com_s *com; 169270174Sjhb 169351078Speter#ifndef COM_MULTIPORT 169470174Sjhb com = (struct com_s *)arg; 169570174Sjhb 169672200Sbmilekic mtx_lock_spin(&sio_lock); 169770174Sjhb siointr1(com); 169872200Sbmilekic mtx_unlock_spin(&sio_lock); 169951078Speter#else /* COM_MULTIPORT */ 170051078Speter bool_t possibly_more_intrs; 170151078Speter int unit; 170251078Speter 170351078Speter /* 170451078Speter * Loop until there is no activity on any port. This is necessary 170551078Speter * to get an interrupt edge more than to avoid another interrupt. 170651078Speter * If the IRQ signal is just an OR of the IRQ signals from several 170751078Speter * devices, then the edge from one may be lost because another is 170851078Speter * on. 170951078Speter */ 171072200Sbmilekic mtx_lock_spin(&sio_lock); 171151078Speter do { 171251078Speter possibly_more_intrs = FALSE; 171353344Speter for (unit = 0; unit < sio_numunits; ++unit) { 171451078Speter com = com_addr(unit); 171551078Speter /* 171651078Speter * XXX COM_LOCK(); 171751078Speter * would it work here, or be counter-productive? 171851078Speter */ 171951078Speter if (com != NULL 172051078Speter && !com->gone 172151078Speter && (inb(com->int_id_port) & IIR_IMASK) 172251078Speter != IIR_NOPEND) { 172351078Speter siointr1(com); 172451078Speter possibly_more_intrs = TRUE; 172551078Speter } 172651078Speter /* XXX COM_UNLOCK(); */ 172751078Speter } 172851078Speter } while (possibly_more_intrs); 172972200Sbmilekic mtx_unlock_spin(&sio_lock); 173051078Speter#endif /* COM_MULTIPORT */ 173151078Speter} 173251078Speter 1733122819Sbdestatic struct timespec siots[8]; 173493466Sbdestatic int siotso; 173593466Sbdestatic int volatile siotsunit = -1; 173693466Sbde 173793466Sbdestatic int 173893466Sbdesysctl_siots(SYSCTL_HANDLER_ARGS) 173993466Sbde{ 174093466Sbde char buf[128]; 174193466Sbde long long delta; 174293466Sbde size_t len; 1743122819Sbde int error, i, tso; 174493466Sbde 1745122819Sbde for (i = 1, tso = siotso; i < tso; i++) { 174693466Sbde delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) * 174793466Sbde 1000000000 + 174893466Sbde (siots[i].tv_nsec - siots[i - 1].tv_nsec); 174993466Sbde len = sprintf(buf, "%lld\n", delta); 175093466Sbde if (delta >= 110000) 175193466Sbde len += sprintf(buf + len - 1, ": *** %ld.%09ld\n", 1752122819Sbde (long)siots[i].tv_sec, siots[i].tv_nsec) - 1; 1753122819Sbde if (i == tso - 1) 175493466Sbde buf[len - 1] = '\0'; 175593466Sbde error = SYSCTL_OUT(req, buf, len); 175693466Sbde if (error != 0) 175793466Sbde return (error); 175893466Sbde uio_yield(); 175993466Sbde } 176093466Sbde return (0); 176193466Sbde} 176293466Sbde 176393466SbdeSYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD, 176493466Sbde 0, 0, sysctl_siots, "A", "sio timestamps"); 176593466Sbde 176651078Speterstatic void 176751078Spetersiointr1(com) 176851078Speter struct com_s *com; 176951078Speter{ 1770120189Sbde u_char int_ctl; 1771120189Sbde u_char int_ctl_new; 177251078Speter u_char line_status; 177351078Speter u_char modem_status; 177451078Speter u_char *ioptr; 177551078Speter u_char recv_data; 177651078Speter 1777120091Sbde if (COM_IIR_TXRDYBUG(com->flags)) { 1778120189Sbde int_ctl = inb(com->int_ctl_port); 1779120091Sbde int_ctl_new = int_ctl; 1780120091Sbde } else { 1781120091Sbde int_ctl = 0; 1782120091Sbde int_ctl_new = 0; 1783120091Sbde } 178451078Speter 178551078Speter while (!com->gone) { 178651078Speter if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 178751078Speter modem_status = inb(com->modem_status_port); 1788111613Sphk if ((modem_status ^ com->last_modem_status) & 1789111613Sphk com->pps_bit) { 179095523Sphk pps_capture(&com->pps); 1791111613Sphk pps_event(&com->pps, 1792111616Sphk (modem_status & com->pps_bit) ? 179351078Speter PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 179451078Speter } 179551078Speter } 179651078Speter line_status = inb(com->line_status_port); 179751078Speter 179851078Speter /* input event? (check first to help avoid overruns) */ 179951078Speter while (line_status & LSR_RCV_MASK) { 180051078Speter /* break/unnattached error bits or real input? */ 180151078Speter if (!(line_status & LSR_RXRDY)) 180251078Speter recv_data = 0; 180351078Speter else 180451078Speter recv_data = inb(com->data_port); 1805119485Snjl#ifdef DDB 1806119485Snjl#ifdef ALT_BREAK_TO_DEBUGGER 1807119485Snjl if (com->unit == comconsole && 1808119485Snjl db_alt_break(recv_data, &com->alt_brk_state) != 0) 1809119485Snjl breakpoint(); 1810119485Snjl#endif /* ALT_BREAK_TO_DEBUGGER */ 1811119485Snjl#endif /* DDB */ 181251078Speter if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 181351078Speter /* 181451078Speter * Don't store BI if IGNBRK or FE/PE if IGNPAR. 181551078Speter * Otherwise, push the work to a higher level 181651078Speter * (to handle PARMRK) if we're bypassing. 181751078Speter * Otherwise, convert BI/FE and PE+INPCK to 0. 181851078Speter * 181951078Speter * This makes bypassing work right in the 182051078Speter * usual "raw" case (IGNBRK set, and IGNPAR 182151078Speter * and INPCK clear). 182251078Speter * 182351078Speter * Note: BI together with FE/PE means just BI. 182451078Speter */ 182551078Speter if (line_status & LSR_BI) { 182651078Speter#if defined(DDB) && defined(BREAK_TO_DEBUGGER) 182751078Speter if (com->unit == comconsole) { 182851078Speter breakpoint(); 182951078Speter goto cont; 183051078Speter } 183151078Speter#endif 183251078Speter if (com->tp == NULL 183351078Speter || com->tp->t_iflag & IGNBRK) 183451078Speter goto cont; 183551078Speter } else { 183651078Speter if (com->tp == NULL 183751078Speter || com->tp->t_iflag & IGNPAR) 183851078Speter goto cont; 183951078Speter } 184051078Speter if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 184151078Speter && (line_status & (LSR_BI | LSR_FE) 184251078Speter || com->tp->t_iflag & INPCK)) 184351078Speter recv_data = 0; 184451078Speter } 184551078Speter ++com->bytes_in; 184651078Speter if (com->hotchar != 0 && recv_data == com->hotchar) 184788900Sjhb swi_sched(sio_fast_ih, 0); 184851078Speter ioptr = com->iptr; 184951078Speter if (ioptr >= com->ibufend) 185051078Speter CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 185151078Speter else { 185251078Speter if (com->do_timestamp) 185351078Speter microtime(&com->timestamp); 185451078Speter ++com_events; 185572238Sjhb swi_sched(sio_slow_ih, SWI_DELAY); 185651078Speter#if 0 /* for testing input latency vs efficiency */ 185751078Speterif (com->iptr - com->ibuf == 8) 185888900Sjhb swi_sched(sio_fast_ih, 0); 185951078Speter#endif 186051078Speter ioptr[0] = recv_data; 186151078Speter ioptr[com->ierroff] = line_status; 186251078Speter com->iptr = ++ioptr; 186351078Speter if (ioptr == com->ihighwater 186451078Speter && com->state & CS_RTS_IFLOW) 186551078Speter outb(com->modem_ctl_port, 186651078Speter com->mcr_image &= ~MCR_RTS); 186751078Speter if (line_status & LSR_OE) 186851078Speter CE_RECORD(com, CE_OVERRUN); 186951078Speter } 187051078Spetercont: 1871122844Sbde if (line_status & LSR_TXRDY 1872122844Sbde && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) 1873122844Sbde goto txrdy; 1874122844Sbde 187551078Speter /* 187651078Speter * "& 0x7F" is to avoid the gcc-1.40 generating a slow 187751078Speter * jump from the top of the loop to here 187851078Speter */ 187951078Speter line_status = inb(com->line_status_port) & 0x7F; 188051078Speter } 188151078Speter 188251078Speter /* modem status change? (always check before doing output) */ 188351078Speter modem_status = inb(com->modem_status_port); 188451078Speter if (modem_status != com->last_modem_status) { 188551078Speter if (com->do_dcd_timestamp 188651078Speter && !(com->last_modem_status & MSR_DCD) 188751078Speter && modem_status & MSR_DCD) 188851078Speter microtime(&com->dcd_timestamp); 188951078Speter 189051078Speter /* 189151078Speter * Schedule high level to handle DCD changes. Note 189251078Speter * that we don't use the delta bits anywhere. Some 189351078Speter * UARTs mess them up, and it's easy to remember the 189451078Speter * previous bits and calculate the delta. 189551078Speter */ 189651078Speter com->last_modem_status = modem_status; 189751078Speter if (!(com->state & CS_CHECKMSR)) { 189851078Speter com_events += LOTS_OF_EVENTS; 189951078Speter com->state |= CS_CHECKMSR; 190088900Sjhb swi_sched(sio_fast_ih, 0); 190151078Speter } 190251078Speter 190351078Speter /* handle CTS change immediately for crisp flow ctl */ 190451078Speter if (com->state & CS_CTS_OFLOW) { 190551078Speter if (modem_status & MSR_CTS) 190651078Speter com->state |= CS_ODEVREADY; 190751078Speter else 190851078Speter com->state &= ~CS_ODEVREADY; 190951078Speter } 191051078Speter } 191151078Speter 1912122844Sbdetxrdy: 191351078Speter /* output queued and everything ready? */ 191451078Speter if (line_status & LSR_TXRDY 191551078Speter && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 191651078Speter ioptr = com->obufq.l_head; 191793466Sbde if (com->tx_fifo_size > 1 && com->unit != siotsunit) { 191851078Speter u_int ocount; 191951078Speter 192051078Speter ocount = com->obufq.l_tail - ioptr; 192151078Speter if (ocount > com->tx_fifo_size) 192251078Speter ocount = com->tx_fifo_size; 192351078Speter com->bytes_out += ocount; 192451078Speter do 192551078Speter outb(com->data_port, *ioptr++); 192651078Speter while (--ocount != 0); 192751078Speter } else { 192851078Speter outb(com->data_port, *ioptr++); 192951078Speter ++com->bytes_out; 1930122819Sbde if (com->unit == siotsunit 1931122819Sbde && siotso < sizeof siots / sizeof siots[0]) 1932122819Sbde nanouptime(&siots[siotso++]); 193351078Speter } 193451078Speter com->obufq.l_head = ioptr; 1935120189Sbde if (COM_IIR_TXRDYBUG(com->flags)) 193651078Speter int_ctl_new = int_ctl | IER_ETXRDY; 193751078Speter if (ioptr >= com->obufq.l_tail) { 193851078Speter struct lbq *qp; 193951078Speter 194051078Speter qp = com->obufq.l_next; 194151078Speter qp->l_queued = FALSE; 194251078Speter qp = qp->l_next; 194351078Speter if (qp != NULL) { 194451078Speter com->obufq.l_head = qp->l_head; 194551078Speter com->obufq.l_tail = qp->l_tail; 194651078Speter com->obufq.l_next = qp; 194751078Speter } else { 194851078Speter /* output just completed */ 1949120189Sbde if (COM_IIR_TXRDYBUG(com->flags)) 1950120189Sbde int_ctl_new = int_ctl 1951120189Sbde & ~IER_ETXRDY; 195251078Speter com->state &= ~CS_BUSY; 195351078Speter } 195451078Speter if (!(com->state & CS_ODONE)) { 195551078Speter com_events += LOTS_OF_EVENTS; 195651078Speter com->state |= CS_ODONE; 195767551Sjhb /* handle at high level ASAP */ 195888900Sjhb swi_sched(sio_fast_ih, 0); 195951078Speter } 196051078Speter } 1961120189Sbde if (COM_IIR_TXRDYBUG(com->flags) 1962120189Sbde && int_ctl != int_ctl_new) 1963120189Sbde outb(com->int_ctl_port, int_ctl_new); 196451078Speter } 196551078Speter 196651078Speter /* finished? */ 196751078Speter#ifndef COM_MULTIPORT 196851078Speter if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 196951078Speter#endif /* COM_MULTIPORT */ 197051078Speter return; 197151078Speter } 197251078Speter} 197351078Speter 197451078Speterstatic int 197583366Sjuliansioioctl(dev, cmd, data, flag, td) 197651078Speter dev_t dev; 197751078Speter u_long cmd; 197851078Speter caddr_t data; 197951078Speter int flag; 198083366Sjulian struct thread *td; 198151078Speter{ 198251078Speter struct com_s *com; 198351078Speter int error; 198451078Speter int mynor; 198551078Speter int s; 198651078Speter struct tty *tp; 198751078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 198851078Speter u_long oldcmd; 198951078Speter struct termios term; 199051078Speter#endif 199151078Speter 199251078Speter mynor = minor(dev); 199351078Speter com = com_addr(MINOR_TO_UNIT(mynor)); 199457915Simp if (com == NULL || com->gone) 199551078Speter return (ENODEV); 199651078Speter if (mynor & CONTROL_MASK) { 199751078Speter struct termios *ct; 199851078Speter 199951078Speter switch (mynor & CONTROL_MASK) { 200051078Speter case CONTROL_INIT_STATE: 200151078Speter ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 200251078Speter break; 200351078Speter case CONTROL_LOCK_STATE: 200451078Speter ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 200551078Speter break; 200651078Speter default: 200751078Speter return (ENODEV); /* /dev/nodev */ 200851078Speter } 200951078Speter switch (cmd) { 201051078Speter case TIOCSETA: 201193593Sjhb error = suser(td); 201251078Speter if (error != 0) 201351078Speter return (error); 201451078Speter *ct = *(struct termios *)data; 201551078Speter return (0); 201651078Speter case TIOCGETA: 201751078Speter *(struct termios *)data = *ct; 201851078Speter return (0); 201951078Speter case TIOCGETD: 202051078Speter *(int *)data = TTYDISC; 202151078Speter return (0); 202251078Speter case TIOCGWINSZ: 202351078Speter bzero(data, sizeof(struct winsize)); 202451078Speter return (0); 202551078Speter default: 202651078Speter return (ENOTTY); 202751078Speter } 202851078Speter } 202951078Speter tp = com->tp; 203051078Speter#if defined(COMPAT_43) || defined(COMPAT_SUNOS) 203151078Speter term = tp->t_termios; 203251078Speter oldcmd = cmd; 203351078Speter error = ttsetcompat(tp, &cmd, data, &term); 203451078Speter if (error != 0) 203551078Speter return (error); 203651078Speter if (cmd != oldcmd) 203751078Speter data = (caddr_t)&term; 203851078Speter#endif 203951078Speter if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 204051078Speter int cc; 204151078Speter struct termios *dt = (struct termios *)data; 204251078Speter struct termios *lt = mynor & CALLOUT_MASK 204351078Speter ? &com->lt_out : &com->lt_in; 204451078Speter 204551078Speter dt->c_iflag = (tp->t_iflag & lt->c_iflag) 204651078Speter | (dt->c_iflag & ~lt->c_iflag); 204751078Speter dt->c_oflag = (tp->t_oflag & lt->c_oflag) 204851078Speter | (dt->c_oflag & ~lt->c_oflag); 204951078Speter dt->c_cflag = (tp->t_cflag & lt->c_cflag) 205051078Speter | (dt->c_cflag & ~lt->c_cflag); 205151078Speter dt->c_lflag = (tp->t_lflag & lt->c_lflag) 205251078Speter | (dt->c_lflag & ~lt->c_lflag); 205351078Speter for (cc = 0; cc < NCCS; ++cc) 205451078Speter if (lt->c_cc[cc] != 0) 205551078Speter dt->c_cc[cc] = tp->t_cc[cc]; 205651078Speter if (lt->c_ispeed != 0) 205751078Speter dt->c_ispeed = tp->t_ispeed; 205851078Speter if (lt->c_ospeed != 0) 205951078Speter dt->c_ospeed = tp->t_ospeed; 206051078Speter } 206183366Sjulian error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 206251078Speter if (error != ENOIOCTL) 206351078Speter return (error); 206451078Speter s = spltty(); 206551078Speter error = ttioctl(tp, cmd, data, flag); 206651078Speter disc_optim(tp, &tp->t_termios, com); 206751078Speter if (error != ENOIOCTL) { 206851078Speter splx(s); 206951078Speter return (error); 207051078Speter } 207151078Speter switch (cmd) { 207251078Speter case TIOCSBRK: 207360471Snyan sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 207451078Speter break; 207551078Speter case TIOCCBRK: 207660471Snyan sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 207751078Speter break; 207851078Speter case TIOCSDTR: 207951078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 208051078Speter break; 208151078Speter case TIOCCDTR: 208251078Speter (void)commctl(com, TIOCM_DTR, DMBIC); 208351078Speter break; 208451078Speter /* 208551078Speter * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 208651078Speter * changes get undone on the next call to comparam(). 208751078Speter */ 208851078Speter case TIOCMSET: 208951078Speter (void)commctl(com, *(int *)data, DMSET); 209051078Speter break; 209151078Speter case TIOCMBIS: 209251078Speter (void)commctl(com, *(int *)data, DMBIS); 209351078Speter break; 209451078Speter case TIOCMBIC: 209551078Speter (void)commctl(com, *(int *)data, DMBIC); 209651078Speter break; 209751078Speter case TIOCMGET: 209851078Speter *(int *)data = commctl(com, 0, DMGET); 209951078Speter break; 210051078Speter case TIOCMSDTRWAIT: 210151078Speter /* must be root since the wait applies to following logins */ 210293593Sjhb error = suser(td); 210351078Speter if (error != 0) { 210451078Speter splx(s); 210551078Speter return (error); 210651078Speter } 210751078Speter com->dtr_wait = *(int *)data * hz / 100; 210851078Speter break; 210951078Speter case TIOCMGDTRWAIT: 211051078Speter *(int *)data = com->dtr_wait * 100 / hz; 211151078Speter break; 211251078Speter case TIOCTIMESTAMP: 211351078Speter com->do_timestamp = TRUE; 211451078Speter *(struct timeval *)data = com->timestamp; 211551078Speter break; 211651078Speter case TIOCDCDTIMESTAMP: 211751078Speter com->do_dcd_timestamp = TRUE; 211851078Speter *(struct timeval *)data = com->dcd_timestamp; 211951078Speter break; 212051078Speter default: 212151078Speter splx(s); 212251078Speter error = pps_ioctl(cmd, data, &com->pps); 212351078Speter if (error == ENODEV) 212451078Speter error = ENOTTY; 212551078Speter return (error); 212651078Speter } 212751078Speter splx(s); 212851078Speter return (0); 212951078Speter} 213051078Speter 213165557Sjasone/* software interrupt handler for SWI_TTY */ 213251078Speterstatic void 213367551Sjhbsiopoll(void *dummy) 213451078Speter{ 213551078Speter int unit; 213651078Speter 213751078Speter if (com_events == 0) 213851078Speter return; 213951078Speterrepeat: 214053344Speter for (unit = 0; unit < sio_numunits; ++unit) { 214151078Speter struct com_s *com; 214251078Speter int incc; 214351078Speter struct tty *tp; 214451078Speter 214551078Speter com = com_addr(unit); 214651078Speter if (com == NULL) 214751078Speter continue; 214851078Speter tp = com->tp; 214951078Speter if (tp == NULL || com->gone) { 215051078Speter /* 215151078Speter * Discard any events related to never-opened or 215251078Speter * going-away devices. 215351078Speter */ 215472200Sbmilekic mtx_lock_spin(&sio_lock); 215551078Speter incc = com->iptr - com->ibuf; 215651078Speter com->iptr = com->ibuf; 215751078Speter if (com->state & CS_CHECKMSR) { 215851078Speter incc += LOTS_OF_EVENTS; 215951078Speter com->state &= ~CS_CHECKMSR; 216051078Speter } 216151078Speter com_events -= incc; 216272200Sbmilekic mtx_unlock_spin(&sio_lock); 216351078Speter continue; 216451078Speter } 216551078Speter if (com->iptr != com->ibuf) { 216672200Sbmilekic mtx_lock_spin(&sio_lock); 216751078Speter sioinput(com); 216872200Sbmilekic mtx_unlock_spin(&sio_lock); 216951078Speter } 217051078Speter if (com->state & CS_CHECKMSR) { 217151078Speter u_char delta_modem_status; 217251078Speter 217372200Sbmilekic mtx_lock_spin(&sio_lock); 217451078Speter delta_modem_status = com->last_modem_status 217551078Speter ^ com->prev_modem_status; 217651078Speter com->prev_modem_status = com->last_modem_status; 217751078Speter com_events -= LOTS_OF_EVENTS; 217851078Speter com->state &= ~CS_CHECKMSR; 217972200Sbmilekic mtx_unlock_spin(&sio_lock); 218051078Speter if (delta_modem_status & MSR_DCD) 218151078Speter (*linesw[tp->t_line].l_modem) 218251078Speter (tp, com->prev_modem_status & MSR_DCD); 218351078Speter } 218451078Speter if (com->state & CS_ODONE) { 218572200Sbmilekic mtx_lock_spin(&sio_lock); 218651078Speter com_events -= LOTS_OF_EVENTS; 218751078Speter com->state &= ~CS_ODONE; 218872200Sbmilekic mtx_unlock_spin(&sio_lock); 218951078Speter if (!(com->state & CS_BUSY) 219051078Speter && !(com->extra_state & CSE_BUSYCHECK)) { 219151078Speter timeout(siobusycheck, com, hz / 100); 219251078Speter com->extra_state |= CSE_BUSYCHECK; 219351078Speter } 219451078Speter (*linesw[tp->t_line].l_start)(tp); 219551078Speter } 219651078Speter if (com_events == 0) 219751078Speter break; 219851078Speter } 219951078Speter if (com_events >= LOTS_OF_EVENTS) 220051078Speter goto repeat; 220151078Speter} 220251078Speter 220351078Speterstatic int 220451078Spetercomparam(tp, t) 220551078Speter struct tty *tp; 220651078Speter struct termios *t; 220751078Speter{ 220851078Speter u_int cfcr; 220951078Speter int cflag; 221051078Speter struct com_s *com; 221189986Sjhay u_int divisor; 221251078Speter u_char dlbh; 221351078Speter u_char dlbl; 2214120159Sbde u_char efr_flowbits; 221551078Speter int s; 221651078Speter int unit; 221751078Speter 221889986Sjhay unit = DEV_TO_UNIT(tp->t_dev); 221989986Sjhay com = com_addr(unit); 222089986Sjhay if (com == NULL) 222189986Sjhay return (ENODEV); 222289986Sjhay 222351078Speter /* check requested parameters */ 2224120505Sbde if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed)) 2225120505Sbde return (EINVAL); 2226120505Sbde divisor = siodivisor(com->rclk, t->c_ispeed); 2227120505Sbde if (divisor == 0) 2228120505Sbde return (EINVAL); 222951078Speter 223051078Speter /* parameters are OK, convert them to the com struct and the device */ 223151078Speter s = spltty(); 2232120505Sbde if (t->c_ospeed == 0) 223351078Speter (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 223451078Speter else 223551078Speter (void)commctl(com, TIOCM_DTR, DMBIS); 223651078Speter cflag = t->c_cflag; 223751078Speter switch (cflag & CSIZE) { 223851078Speter case CS5: 223951078Speter cfcr = CFCR_5BITS; 224051078Speter break; 224151078Speter case CS6: 224251078Speter cfcr = CFCR_6BITS; 224351078Speter break; 224451078Speter case CS7: 224551078Speter cfcr = CFCR_7BITS; 224651078Speter break; 224751078Speter default: 224851078Speter cfcr = CFCR_8BITS; 224951078Speter break; 225051078Speter } 225151078Speter if (cflag & PARENB) { 225251078Speter cfcr |= CFCR_PENAB; 225351078Speter if (!(cflag & PARODD)) 225451078Speter cfcr |= CFCR_PEVEN; 225551078Speter } 225651078Speter if (cflag & CSTOPB) 225751078Speter cfcr |= CFCR_STOPB; 225851078Speter 2259120505Sbde if (com->hasfifo) { 226051078Speter /* 226151078Speter * Use a fifo trigger level low enough so that the input 226251078Speter * latency from the fifo is less than about 16 msec and 226351078Speter * the total latency is less than about 30 msec. These 226451078Speter * latencies are reasonable for humans. Serial comms 226551078Speter * protocols shouldn't expect anything better since modem 226651078Speter * latencies are larger. 226788433Sdillon * 226888433Sdillon * The fifo trigger level cannot be set at RX_HIGH for high 226988433Sdillon * speed connections without further work on reducing 227088433Sdillon * interrupt disablement times in other parts of the system, 227188433Sdillon * without producing silo overflow errors. 227251078Speter */ 227393466Sbde com->fifo_image = com->unit == siotsunit ? 0 2274120505Sbde : t->c_ispeed <= 4800 227588451Stanimura ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 227651078Speter#ifdef COM_ESP 227751078Speter /* 227851078Speter * The Hayes ESP card needs the fifo DMA mode bit set 227951078Speter * in compatibility mode. If not, it will interrupt 228051078Speter * for each character received. 228151078Speter */ 228251078Speter if (com->esp) 228351078Speter com->fifo_image |= FIFO_DMA_MODE; 228451078Speter#endif 228560471Snyan sio_setreg(com, com_fifo, com->fifo_image); 228651078Speter } 228751078Speter 228865605Sjhb /* 228965605Sjhb * This returns with interrupts disabled so that we can complete 229065605Sjhb * the speed change atomically. Keeping interrupts disabled is 229165605Sjhb * especially important while com_data is hidden. 229265605Sjhb */ 229365605Sjhb (void) siosetwater(com, t->c_ispeed); 229465557Sjasone 2295120505Sbde sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2296120505Sbde /* 2297120505Sbde * Only set the divisor registers if they would change, since on 2298120505Sbde * some 16550 incompatibles (UMC8669F), setting them while input 2299120505Sbde * is arriving loses sync until data stops arriving. 2300120505Sbde */ 2301120505Sbde dlbl = divisor & 0xFF; 2302120505Sbde if (sio_getreg(com, com_dlbl) != dlbl) 2303120505Sbde sio_setreg(com, com_dlbl, dlbl); 2304120505Sbde dlbh = divisor >> 8; 2305120505Sbde if (sio_getreg(com, com_dlbh) != dlbh) 2306120505Sbde sio_setreg(com, com_dlbh, dlbh); 230751078Speter 2308120159Sbde efr_flowbits = 0; 230951078Speter 231051078Speter if (cflag & CRTS_IFLOW) { 231151078Speter com->state |= CS_RTS_IFLOW; 2312120159Sbde efr_flowbits |= EFR_AUTORTS; 231351078Speter /* 231451078Speter * If CS_RTS_IFLOW just changed from off to on, the change 231551078Speter * needs to be propagated to MCR_RTS. This isn't urgent, 231651078Speter * so do it later by calling comstart() instead of repeating 231751078Speter * a lot of code from comstart() here. 231851078Speter */ 231951078Speter } else if (com->state & CS_RTS_IFLOW) { 232051078Speter com->state &= ~CS_RTS_IFLOW; 232151078Speter /* 232251078Speter * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 232351078Speter * on here, since comstart() won't do it later. 232451078Speter */ 232551078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 232651078Speter } 232751078Speter 232851078Speter /* 232951078Speter * Set up state to handle output flow control. 233051078Speter * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 233151078Speter * Now has 10+ msec latency, while CTS flow has 50- usec latency. 233251078Speter */ 233351078Speter com->state |= CS_ODEVREADY; 233451078Speter com->state &= ~CS_CTS_OFLOW; 233551078Speter if (cflag & CCTS_OFLOW) { 233651078Speter com->state |= CS_CTS_OFLOW; 2337120159Sbde efr_flowbits |= EFR_AUTOCTS; 233851078Speter if (!(com->last_modem_status & MSR_CTS)) 233951078Speter com->state &= ~CS_ODEVREADY; 234051078Speter } 234151078Speter 2342120159Sbde if (com->st16650a) { 2343120159Sbde sio_setreg(com, com_lcr, LCR_EFR_ENABLE); 2344120159Sbde sio_setreg(com, com_efr, 2345120159Sbde (sio_getreg(com, com_efr) 2346120159Sbde & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits); 2347120159Sbde } 2348120159Sbde sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 234951078Speter 235051078Speter /* XXX shouldn't call functions while intrs are disabled. */ 235151078Speter disc_optim(tp, t, com); 235251078Speter 235372200Sbmilekic mtx_unlock_spin(&sio_lock); 235451078Speter splx(s); 235551078Speter comstart(tp); 235651078Speter if (com->ibufold != NULL) { 235751078Speter free(com->ibufold, M_DEVBUF); 235851078Speter com->ibufold = NULL; 235951078Speter } 236051078Speter return (0); 236151078Speter} 236251078Speter 236365605Sjhb/* 236470174Sjhb * This function must be called with the sio_lock mutex released and will 236570174Sjhb * return with it obtained. 236665605Sjhb */ 236751078Speterstatic int 236865605Sjhbsiosetwater(com, speed) 236951078Speter struct com_s *com; 237051078Speter speed_t speed; 237151078Speter{ 237251078Speter int cp4ticks; 237351078Speter u_char *ibuf; 237451078Speter int ibufsize; 237551078Speter struct tty *tp; 237651078Speter 237751078Speter /* 237851078Speter * Make the buffer size large enough to handle a softtty interrupt 237951078Speter * latency of about 2 ticks without loss of throughput or data 238051078Speter * (about 3 ticks if input flow control is not used or not honoured, 238151078Speter * but a bit less for CS5-CS7 modes). 238251078Speter */ 238351078Speter cp4ticks = speed / 10 / hz * 4; 238451078Speter for (ibufsize = 128; ibufsize < cp4ticks;) 238551078Speter ibufsize <<= 1; 238665605Sjhb if (ibufsize == com->ibufsize) { 238772200Sbmilekic mtx_lock_spin(&sio_lock); 238851078Speter return (0); 238965605Sjhb } 239051078Speter 239151078Speter /* 239251078Speter * Allocate input buffer. The extra factor of 2 in the size is 239351078Speter * to allow for an error byte for each input byte. 239451078Speter */ 239551078Speter ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 239665605Sjhb if (ibuf == NULL) { 239772200Sbmilekic mtx_lock_spin(&sio_lock); 239851078Speter return (ENOMEM); 239965605Sjhb } 240051078Speter 240151078Speter /* Initialize non-critical variables. */ 240251078Speter com->ibufold = com->ibuf; 240351078Speter com->ibufsize = ibufsize; 240451078Speter tp = com->tp; 240551078Speter if (tp != NULL) { 240651078Speter tp->t_ififosize = 2 * ibufsize; 240751078Speter tp->t_ispeedwat = (speed_t)-1; 240851078Speter tp->t_ospeedwat = (speed_t)-1; 240951078Speter } 241051078Speter 241151078Speter /* 241251078Speter * Read current input buffer, if any. Continue with interrupts 241351078Speter * disabled. 241451078Speter */ 241572200Sbmilekic mtx_lock_spin(&sio_lock); 241651078Speter if (com->iptr != com->ibuf) 241751078Speter sioinput(com); 241851078Speter 241951078Speter /*- 242051078Speter * Initialize critical variables, including input buffer watermarks. 242151078Speter * The external device is asked to stop sending when the buffer 242251078Speter * exactly reaches high water, or when the high level requests it. 242351078Speter * The high level is notified immediately (rather than at a later 242451078Speter * clock tick) when this watermark is reached. 242551078Speter * The buffer size is chosen so the watermark should almost never 242651078Speter * be reached. 242751078Speter * The low watermark is invisibly 0 since the buffer is always 242851078Speter * emptied all at once. 242951078Speter */ 243051078Speter com->iptr = com->ibuf = ibuf; 243151078Speter com->ibufend = ibuf + ibufsize; 243251078Speter com->ierroff = ibufsize; 243351078Speter com->ihighwater = ibuf + 3 * ibufsize / 4; 243451078Speter return (0); 243551078Speter} 243651078Speter 243751078Speterstatic void 243851078Spetercomstart(tp) 243951078Speter struct tty *tp; 244051078Speter{ 244151078Speter struct com_s *com; 244251078Speter int s; 244351078Speter int unit; 244451078Speter 244551078Speter unit = DEV_TO_UNIT(tp->t_dev); 244651078Speter com = com_addr(unit); 244757915Simp if (com == NULL) 244857915Simp return; 244951078Speter s = spltty(); 245072200Sbmilekic mtx_lock_spin(&sio_lock); 245151078Speter if (tp->t_state & TS_TTSTOP) 245251078Speter com->state &= ~CS_TTGO; 245351078Speter else 245451078Speter com->state |= CS_TTGO; 245551078Speter if (tp->t_state & TS_TBLOCK) { 245651078Speter if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 245751078Speter outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 245851078Speter } else { 245951078Speter if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 246051078Speter && com->state & CS_RTS_IFLOW) 246151078Speter outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 246251078Speter } 246372200Sbmilekic mtx_unlock_spin(&sio_lock); 246451078Speter if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 246551078Speter ttwwakeup(tp); 246651078Speter splx(s); 246751078Speter return; 246851078Speter } 246951078Speter if (tp->t_outq.c_cc != 0) { 247051078Speter struct lbq *qp; 247151078Speter struct lbq *next; 247251078Speter 247351078Speter if (!com->obufs[0].l_queued) { 247451078Speter com->obufs[0].l_tail 247551078Speter = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 247651078Speter sizeof com->obuf1); 247751078Speter com->obufs[0].l_next = NULL; 247851078Speter com->obufs[0].l_queued = TRUE; 247972200Sbmilekic mtx_lock_spin(&sio_lock); 248051078Speter if (com->state & CS_BUSY) { 248151078Speter qp = com->obufq.l_next; 248251078Speter while ((next = qp->l_next) != NULL) 248351078Speter qp = next; 248451078Speter qp->l_next = &com->obufs[0]; 248551078Speter } else { 248651078Speter com->obufq.l_head = com->obufs[0].l_head; 248751078Speter com->obufq.l_tail = com->obufs[0].l_tail; 248851078Speter com->obufq.l_next = &com->obufs[0]; 248951078Speter com->state |= CS_BUSY; 249051078Speter } 249172200Sbmilekic mtx_unlock_spin(&sio_lock); 249251078Speter } 249351078Speter if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 249451078Speter com->obufs[1].l_tail 249551078Speter = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 249651078Speter sizeof com->obuf2); 249751078Speter com->obufs[1].l_next = NULL; 249851078Speter com->obufs[1].l_queued = TRUE; 249972200Sbmilekic mtx_lock_spin(&sio_lock); 250051078Speter if (com->state & CS_BUSY) { 250151078Speter qp = com->obufq.l_next; 250251078Speter while ((next = qp->l_next) != NULL) 250351078Speter qp = next; 250451078Speter qp->l_next = &com->obufs[1]; 250551078Speter } else { 250651078Speter com->obufq.l_head = com->obufs[1].l_head; 250751078Speter com->obufq.l_tail = com->obufs[1].l_tail; 250851078Speter com->obufq.l_next = &com->obufs[1]; 250951078Speter com->state |= CS_BUSY; 251051078Speter } 251172200Sbmilekic mtx_unlock_spin(&sio_lock); 251251078Speter } 251351078Speter tp->t_state |= TS_BUSY; 251451078Speter } 251572200Sbmilekic mtx_lock_spin(&sio_lock); 251651078Speter if (com->state >= (CS_BUSY | CS_TTGO)) 251751078Speter siointr1(com); /* fake interrupt to start output */ 251872200Sbmilekic mtx_unlock_spin(&sio_lock); 251951078Speter ttwwakeup(tp); 252051078Speter splx(s); 252151078Speter} 252251078Speter 252351078Speterstatic void 252451654Sphkcomstop(tp, rw) 252551078Speter struct tty *tp; 252651078Speter int rw; 252751078Speter{ 252851078Speter struct com_s *com; 252951078Speter 253051078Speter com = com_addr(DEV_TO_UNIT(tp->t_dev)); 253157915Simp if (com == NULL || com->gone) 253251078Speter return; 253372200Sbmilekic mtx_lock_spin(&sio_lock); 253451078Speter if (rw & FWRITE) { 253551078Speter if (com->hasfifo) 253651078Speter#ifdef COM_ESP 253751078Speter /* XXX avoid h/w bug. */ 253851078Speter if (!com->esp) 253951078Speter#endif 254060471Snyan sio_setreg(com, com_fifo, 254160471Snyan FIFO_XMT_RST | com->fifo_image); 254251078Speter com->obufs[0].l_queued = FALSE; 254351078Speter com->obufs[1].l_queued = FALSE; 254451078Speter if (com->state & CS_ODONE) 254551078Speter com_events -= LOTS_OF_EVENTS; 254651078Speter com->state &= ~(CS_ODONE | CS_BUSY); 254751078Speter com->tp->t_state &= ~TS_BUSY; 254851078Speter } 254951078Speter if (rw & FREAD) { 255051078Speter if (com->hasfifo) 255151078Speter#ifdef COM_ESP 255251078Speter /* XXX avoid h/w bug. */ 255351078Speter if (!com->esp) 255451078Speter#endif 255560471Snyan sio_setreg(com, com_fifo, 255660471Snyan FIFO_RCV_RST | com->fifo_image); 255751078Speter com_events -= (com->iptr - com->ibuf); 255851078Speter com->iptr = com->ibuf; 255951078Speter } 256072200Sbmilekic mtx_unlock_spin(&sio_lock); 256151078Speter comstart(tp); 256251078Speter} 256351078Speter 256451078Speterstatic int 256551078Spetercommctl(com, bits, how) 256651078Speter struct com_s *com; 256751078Speter int bits; 256851078Speter int how; 256951078Speter{ 257051078Speter int mcr; 257151078Speter int msr; 257251078Speter 257351078Speter if (how == DMGET) { 257451078Speter bits = TIOCM_LE; /* XXX - always enabled while open */ 257551078Speter mcr = com->mcr_image; 257651078Speter if (mcr & MCR_DTR) 257751078Speter bits |= TIOCM_DTR; 257851078Speter if (mcr & MCR_RTS) 257951078Speter bits |= TIOCM_RTS; 258051078Speter msr = com->prev_modem_status; 258151078Speter if (msr & MSR_CTS) 258251078Speter bits |= TIOCM_CTS; 258351078Speter if (msr & MSR_DCD) 258451078Speter bits |= TIOCM_CD; 258551078Speter if (msr & MSR_DSR) 258651078Speter bits |= TIOCM_DSR; 258751078Speter /* 258851078Speter * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 258951078Speter * more volatile by reading the modem status a lot. Perhaps 259051078Speter * we should latch both bits until the status is read here. 259151078Speter */ 259251078Speter if (msr & (MSR_RI | MSR_TERI)) 259351078Speter bits |= TIOCM_RI; 259451078Speter return (bits); 259551078Speter } 259651078Speter mcr = 0; 259751078Speter if (bits & TIOCM_DTR) 259851078Speter mcr |= MCR_DTR; 259951078Speter if (bits & TIOCM_RTS) 260051078Speter mcr |= MCR_RTS; 260151078Speter if (com->gone) 260251078Speter return(0); 260372200Sbmilekic mtx_lock_spin(&sio_lock); 260451078Speter switch (how) { 260551078Speter case DMSET: 260651078Speter outb(com->modem_ctl_port, 260751078Speter com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 260851078Speter break; 260951078Speter case DMBIS: 261051078Speter outb(com->modem_ctl_port, com->mcr_image |= mcr); 261151078Speter break; 261251078Speter case DMBIC: 261351078Speter outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 261451078Speter break; 261551078Speter } 261672200Sbmilekic mtx_unlock_spin(&sio_lock); 261751078Speter return (0); 261851078Speter} 261951078Speter 262051078Speterstatic void 262151078Spetersiosettimeout() 262251078Speter{ 262351078Speter struct com_s *com; 262451078Speter bool_t someopen; 262551078Speter int unit; 262651078Speter 262751078Speter /* 262851078Speter * Set our timeout period to 1 second if no polled devices are open. 262951078Speter * Otherwise set it to max(1/200, 1/hz). 263051078Speter * Enable timeouts iff some device is open. 263151078Speter */ 263251078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 263351078Speter sio_timeout = hz; 263451078Speter someopen = FALSE; 263553344Speter for (unit = 0; unit < sio_numunits; ++unit) { 263651078Speter com = com_addr(unit); 263751078Speter if (com != NULL && com->tp != NULL 263851078Speter && com->tp->t_state & TS_ISOPEN && !com->gone) { 263951078Speter someopen = TRUE; 264051078Speter if (com->poll || com->poll_output) { 264151078Speter sio_timeout = hz > 200 ? hz / 200 : 1; 264251078Speter break; 264351078Speter } 264451078Speter } 264551078Speter } 264651078Speter if (someopen) { 264751078Speter sio_timeouts_until_log = hz / sio_timeout; 264851078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, 264951078Speter sio_timeout); 265051078Speter } else { 265151078Speter /* Flush error messages, if any. */ 265251078Speter sio_timeouts_until_log = 1; 265351078Speter comwakeup((void *)NULL); 265451078Speter untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 265551078Speter } 265651078Speter} 265751078Speter 265851078Speterstatic void 265951078Spetercomwakeup(chan) 266051078Speter void *chan; 266151078Speter{ 266251078Speter struct com_s *com; 266351078Speter int unit; 266451078Speter 266551078Speter sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 266651078Speter 266751078Speter /* 266851078Speter * Recover from lost output interrupts. 266951078Speter * Poll any lines that don't use interrupts. 267051078Speter */ 267153344Speter for (unit = 0; unit < sio_numunits; ++unit) { 267251078Speter com = com_addr(unit); 267351078Speter if (com != NULL && !com->gone 267451078Speter && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 267572200Sbmilekic mtx_lock_spin(&sio_lock); 267651078Speter siointr1(com); 267772200Sbmilekic mtx_unlock_spin(&sio_lock); 267851078Speter } 267951078Speter } 268051078Speter 268151078Speter /* 268251078Speter * Check for and log errors, but not too often. 268351078Speter */ 268451078Speter if (--sio_timeouts_until_log > 0) 268551078Speter return; 268651078Speter sio_timeouts_until_log = hz / sio_timeout; 268753344Speter for (unit = 0; unit < sio_numunits; ++unit) { 268851078Speter int errnum; 268951078Speter 269051078Speter com = com_addr(unit); 269151078Speter if (com == NULL) 269251078Speter continue; 269351078Speter if (com->gone) 269451078Speter continue; 269551078Speter for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 269651078Speter u_int delta; 269751078Speter u_long total; 269851078Speter 269972200Sbmilekic mtx_lock_spin(&sio_lock); 270051078Speter delta = com->delta_error_counts[errnum]; 270151078Speter com->delta_error_counts[errnum] = 0; 270272200Sbmilekic mtx_unlock_spin(&sio_lock); 270351078Speter if (delta == 0) 270451078Speter continue; 270551078Speter total = com->error_counts[errnum] += delta; 270651078Speter log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 270751078Speter unit, delta, error_desc[errnum], 270851078Speter delta == 1 ? "" : "s", total); 270951078Speter } 271051078Speter } 271151078Speter} 271251078Speter 271351078Speterstatic void 271451078Speterdisc_optim(tp, t, com) 271551078Speter struct tty *tp; 271651078Speter struct termios *t; 271751078Speter struct com_s *com; 271851078Speter{ 271951078Speter if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 272051078Speter && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 272151078Speter && (!(t->c_iflag & PARMRK) 272251078Speter || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 272351078Speter && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 272451078Speter && linesw[tp->t_line].l_rint == ttyinput) 272551078Speter tp->t_state |= TS_CAN_BYPASS_L_RINT; 272651078Speter else 272751078Speter tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 272851078Speter com->hotchar = linesw[tp->t_line].l_hotchar; 272951078Speter} 273051078Speter 273151078Speter/* 273251078Speter * Following are all routines needed for SIO to act as console 273351078Speter */ 273451078Speterstruct siocnstate { 273551078Speter u_char dlbl; 273651078Speter u_char dlbh; 273751078Speter u_char ier; 273851078Speter u_char cfcr; 273951078Speter u_char mcr; 274051078Speter}; 274151078Speter 2742120457Sphk/* 2743120457Sphk * This is a function in order to not replicate "ttyd%d" more 2744120457Sphk * places than absolutely necessary. 2745120457Sphk */ 2746120457Sphkstatic void 2747120457Sphksiocnset(struct consdev *cd, int unit) 2748120457Sphk{ 2749120457Sphk 2750120457Sphk cd->cn_unit = unit; 2751120457Sphk sprintf(cd->cn_name, "ttyd%d", unit); 2752120457Sphk} 2753120457Sphk 275466230Sjhb#ifndef __alpha__ 275592739Salfredstatic speed_t siocngetspeed(Port_t, u_long rclk); 275666230Sjhb#endif 275793010Sbdestatic void siocnclose(struct siocnstate *sp, Port_t iobase); 275893010Sbdestatic void siocnopen(struct siocnstate *sp, Port_t iobase, int speed); 275993010Sbdestatic void siocntxwait(Port_t iobase); 276051078Speter 276166230Sjhb#ifdef __alpha__ 276292739Salfredint siocnattach(int port, int speed); 276392739Salfredint siogdbattach(int port, int speed); 276492739Salfredint siogdbgetc(void); 276592739Salfredvoid siogdbputc(int c); 276666230Sjhb#else 276751078Speterstatic cn_probe_t siocnprobe; 276851078Speterstatic cn_init_t siocninit; 276985371Sjlemonstatic cn_term_t siocnterm; 277066230Sjhb#endif 277151078Speterstatic cn_checkc_t siocncheckc; 277251078Speterstatic cn_getc_t siocngetc; 277351078Speterstatic cn_putc_t siocnputc; 277451078Speter 277583832Sdfr#ifndef __alpha__ 277685371SjlemonCONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc, 277755823Syokota siocnputc, NULL); 277851078Speter#endif 277951078Speter 278051078Speter#if DDB > 0 2781111194Sphkstatic struct consdev gdbconsdev; 278251078Speter#endif 278351078Speter 278451078Speterstatic void 278551078Spetersiocntxwait(iobase) 278651078Speter Port_t iobase; 278751078Speter{ 278851078Speter int timo; 278951078Speter 279051078Speter /* 279151078Speter * Wait for any pending transmission to finish. Required to avoid 279251078Speter * the UART lockup bug when the speed is changed, and for normal 279351078Speter * transmits. 279451078Speter */ 279551078Speter timo = 100000; 279651078Speter while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 279751078Speter != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 279851078Speter ; 279951078Speter} 280051078Speter 280166230Sjhb#ifndef __alpha__ 280266230Sjhb 280351078Speter/* 280451078Speter * Read the serial port specified and try to figure out what speed 280551078Speter * it's currently running at. We're assuming the serial port has 280651078Speter * been initialized and is basicly idle. This routine is only intended 280751078Speter * to be run at system startup. 280851078Speter * 280951078Speter * If the value read from the serial port doesn't make sense, return 0. 281051078Speter */ 281151078Speter 281251078Speterstatic speed_t 281389986Sjhaysiocngetspeed(iobase, rclk) 281489986Sjhay Port_t iobase; 281589986Sjhay u_long rclk; 281651078Speter{ 281789986Sjhay u_int divisor; 281851078Speter u_char dlbh; 281951078Speter u_char dlbl; 282051078Speter u_char cfcr; 282151078Speter 282251078Speter cfcr = inb(iobase + com_cfcr); 282351078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 282451078Speter 282551078Speter dlbl = inb(iobase + com_dlbl); 282651078Speter dlbh = inb(iobase + com_dlbh); 282751078Speter 282851078Speter outb(iobase + com_cfcr, cfcr); 282951078Speter 283089986Sjhay divisor = dlbh << 8 | dlbl; 283151078Speter 283289986Sjhay /* XXX there should be more sanity checking. */ 283389986Sjhay if (divisor == 0) 283489986Sjhay return (CONSPEED); 283589986Sjhay return (rclk / (16UL * divisor)); 283651078Speter} 283751078Speter 283866230Sjhb#endif 283966230Sjhb 284051078Speterstatic void 284151078Spetersiocnopen(sp, iobase, speed) 284251078Speter struct siocnstate *sp; 284351078Speter Port_t iobase; 284451078Speter int speed; 284551078Speter{ 284689986Sjhay u_int divisor; 284751078Speter u_char dlbh; 284851078Speter u_char dlbl; 284951078Speter 285051078Speter /* 285151078Speter * Save all the device control registers except the fifo register 285251078Speter * and set our default ones (cs8 -parenb speed=comdefaultrate). 285351078Speter * We can't save the fifo register since it is read-only. 285451078Speter */ 285551078Speter sp->ier = inb(iobase + com_ier); 285651078Speter outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 285751078Speter siocntxwait(iobase); 285851078Speter sp->cfcr = inb(iobase + com_cfcr); 285951078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 286051078Speter sp->dlbl = inb(iobase + com_dlbl); 286151078Speter sp->dlbh = inb(iobase + com_dlbh); 286251078Speter /* 286351078Speter * Only set the divisor registers if they would change, since on 286451078Speter * some 16550 incompatibles (Startech), setting them clears the 286551078Speter * data input register. This also reduces the effects of the 286651078Speter * UMC8669F bug. 286751078Speter */ 286889986Sjhay divisor = siodivisor(comdefaultrclk, speed); 286951078Speter dlbl = divisor & 0xFF; 287051078Speter if (sp->dlbl != dlbl) 287151078Speter outb(iobase + com_dlbl, dlbl); 287289986Sjhay dlbh = divisor >> 8; 287351078Speter if (sp->dlbh != dlbh) 287451078Speter outb(iobase + com_dlbh, dlbh); 287551078Speter outb(iobase + com_cfcr, CFCR_8BITS); 287651078Speter sp->mcr = inb(iobase + com_mcr); 287751078Speter /* 287851078Speter * We don't want interrupts, but must be careful not to "disable" 287951078Speter * them by clearing the MCR_IENABLE bit, since that might cause 288051078Speter * an interrupt by floating the IRQ line. 288151078Speter */ 288251078Speter outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 288351078Speter} 288451078Speter 288551078Speterstatic void 288651078Spetersiocnclose(sp, iobase) 288751078Speter struct siocnstate *sp; 288851078Speter Port_t iobase; 288951078Speter{ 289051078Speter /* 289151078Speter * Restore the device control registers. 289251078Speter */ 289351078Speter siocntxwait(iobase); 289451078Speter outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 289551078Speter if (sp->dlbl != inb(iobase + com_dlbl)) 289651078Speter outb(iobase + com_dlbl, sp->dlbl); 289751078Speter if (sp->dlbh != inb(iobase + com_dlbh)) 289851078Speter outb(iobase + com_dlbh, sp->dlbh); 289951078Speter outb(iobase + com_cfcr, sp->cfcr); 290051078Speter /* 290151078Speter * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 290251078Speter */ 290351078Speter outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 290451078Speter outb(iobase + com_ier, sp->ier); 290551078Speter} 290651078Speter 290766230Sjhb#ifndef __alpha__ 290866230Sjhb 290951078Speterstatic void 291051078Spetersiocnprobe(cp) 291151078Speter struct consdev *cp; 291251078Speter{ 291351078Speter speed_t boot_speed; 291451078Speter u_char cfcr; 291589986Sjhay u_int divisor; 291651078Speter int s, unit; 291751078Speter struct siocnstate sp; 291851078Speter 291951078Speter /* 292051078Speter * Find our first enabled console, if any. If it is a high-level 292151078Speter * console device, then initialize it and return successfully. 292251078Speter * If it is a low-level console device, then initialize it and 292351078Speter * return unsuccessfully. It must be initialized in both cases 292451078Speter * for early use by console drivers and debuggers. Initializing 292551078Speter * the hardware is not necessary in all cases, since the i/o 292651078Speter * routines initialize it on the fly, but it is necessary if 292751078Speter * input might arrive while the hardware is switched back to an 292851078Speter * uninitialized state. We can't handle multiple console devices 292951078Speter * yet because our low-level routines don't take a device arg. 293051078Speter * We trust the user to set the console flags properly so that we 293151078Speter * don't need to probe. 293251078Speter */ 293351078Speter cp->cn_pri = CN_DEAD; 293451078Speter 293551078Speter for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 293651078Speter int flags; 2937117167Sjhb 2938117167Sjhb if (resource_disabled("sio", unit)) 2939117167Sjhb continue; 294051078Speter if (resource_int_value("sio", unit, "flags", &flags)) 294151078Speter continue; 294251078Speter if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 294351078Speter int port; 294451078Speter Port_t iobase; 294551078Speter 294651078Speter if (resource_int_value("sio", unit, "port", &port)) 294751078Speter continue; 294851078Speter iobase = port; 294951078Speter s = spltty(); 295051078Speter if (boothowto & RB_SERIAL) { 295189986Sjhay boot_speed = 295289986Sjhay siocngetspeed(iobase, comdefaultrclk); 295351078Speter if (boot_speed) 295451078Speter comdefaultrate = boot_speed; 295551078Speter } 295651078Speter 295751078Speter /* 295851078Speter * Initialize the divisor latch. We can't rely on 295951078Speter * siocnopen() to do this the first time, since it 296051078Speter * avoids writing to the latch if the latch appears 296151078Speter * to have the correct value. Also, if we didn't 296251078Speter * just read the speed from the hardware, then we 296351078Speter * need to set the speed in hardware so that 296451078Speter * switching it later is null. 296551078Speter */ 296651078Speter cfcr = inb(iobase + com_cfcr); 296751078Speter outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 296889986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 296989986Sjhay outb(iobase + com_dlbl, divisor & 0xff); 297089986Sjhay outb(iobase + com_dlbh, divisor >> 8); 297151078Speter outb(iobase + com_cfcr, cfcr); 297251078Speter 297351078Speter siocnopen(&sp, iobase, comdefaultrate); 297451078Speter 297551078Speter splx(s); 297651078Speter if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2977120457Sphk siocnset(cp, unit); 297851078Speter cp->cn_pri = COM_FORCECONSOLE(flags) 297951078Speter || boothowto & RB_SERIAL 298051078Speter ? CN_REMOTE : CN_NORMAL; 298151078Speter siocniobase = iobase; 298251078Speter siocnunit = unit; 298351078Speter } 298451078Speter if (COM_DEBUGGER(flags)) { 298551078Speter printf("sio%d: gdb debugging port\n", unit); 298651078Speter siogdbiobase = iobase; 298751078Speter siogdbunit = unit; 298851078Speter#if DDB > 0 2989120457Sphk siocnset(&gdbconsdev, unit); 2990111194Sphk gdb_arg = &gdbconsdev; 299151078Speter gdb_getc = siocngetc; 299251078Speter gdb_putc = siocnputc; 299351078Speter#endif 299451078Speter } 299551078Speter } 299651078Speter } 299751078Speter#ifdef __i386__ 299851078Speter#if DDB > 0 299951078Speter /* 300051078Speter * XXX Ugly Compatability. 300151078Speter * If no gdb port has been specified, set it to be the console 300251078Speter * as some configuration files don't specify the gdb port. 300351078Speter */ 3004111017Sphk if (gdb_arg == NULL && (boothowto & RB_GDB)) { 300551078Speter printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 300651078Speter siocnunit); 300751078Speter printf("Set flag 0x80 on desired GDB port in your\n"); 300851078Speter printf("configuration file (currently sio only).\n"); 300951078Speter siogdbiobase = siocniobase; 301051078Speter siogdbunit = siocnunit; 3011120457Sphk siocnset(&gdbconsdev, siocnunit); 3012111194Sphk gdb_arg = &gdbconsdev; 301351078Speter gdb_getc = siocngetc; 301451078Speter gdb_putc = siocnputc; 301551078Speter } 301651078Speter#endif 301751078Speter#endif 301851078Speter} 301951078Speter 302066230Sjhbstatic void 302166230Sjhbsiocninit(cp) 302266230Sjhb struct consdev *cp; 302366230Sjhb{ 3024120457Sphk comconsole = cp->cn_unit; 302566230Sjhb} 302666230Sjhb 302785371Sjlemonstatic void 302885371Sjlemonsiocnterm(cp) 302985371Sjlemon struct consdev *cp; 303085371Sjlemon{ 303185371Sjlemon comconsole = -1; 303285371Sjlemon} 303385371Sjlemon 303466230Sjhb#endif 303566230Sjhb 303651078Speter#ifdef __alpha__ 303751078Speter 303855868SgallatinCONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 303951078Speter 304051078Speterint 304151078Spetersiocnattach(port, speed) 304251078Speter int port; 304351078Speter int speed; 304451078Speter{ 304551078Speter int s; 304651078Speter u_char cfcr; 304789986Sjhay u_int divisor; 304851078Speter struct siocnstate sp; 304998691Sn_hibma int unit = 0; /* XXX random value! */ 305051078Speter 305151078Speter siocniobase = port; 305298691Sn_hibma siocnunit = unit; 305351078Speter comdefaultrate = speed; 305451078Speter sio_consdev.cn_pri = CN_NORMAL; 3055120457Sphk siocnset(&sio_consdev, unit); 305651078Speter 305751078Speter s = spltty(); 305851078Speter 305951078Speter /* 306051078Speter * Initialize the divisor latch. We can't rely on 306151078Speter * siocnopen() to do this the first time, since it 306251078Speter * avoids writing to the latch if the latch appears 306351078Speter * to have the correct value. Also, if we didn't 306451078Speter * just read the speed from the hardware, then we 306551078Speter * need to set the speed in hardware so that 306651078Speter * switching it later is null. 306751078Speter */ 306851078Speter cfcr = inb(siocniobase + com_cfcr); 306951078Speter outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 307089986Sjhay divisor = siodivisor(comdefaultrclk, comdefaultrate); 307189986Sjhay outb(siocniobase + com_dlbl, divisor & 0xff); 307289986Sjhay outb(siocniobase + com_dlbh, divisor >> 8); 307351078Speter outb(siocniobase + com_cfcr, cfcr); 307451078Speter 307551078Speter siocnopen(&sp, siocniobase, comdefaultrate); 307651078Speter splx(s); 307751078Speter 307885426Sjlemon cnadd(&sio_consdev); 307958885Simp return (0); 308051078Speter} 308151078Speter 308251078Speterint 308351078Spetersiogdbattach(port, speed) 308451078Speter int port; 308551078Speter int speed; 308651078Speter{ 308751078Speter int s; 308851078Speter u_char cfcr; 308989986Sjhay u_int divisor; 309051078Speter struct siocnstate sp; 309198691Sn_hibma int unit = 1; /* XXX random value! */ 309251078Speter 309351078Speter siogdbiobase = port; 309451078Speter gdbdefaultrate = speed; 309551078Speter 309665714Sjhb printf("sio%d: gdb debugging port\n", unit); 309765714Sjhb siogdbunit = unit; 309865714Sjhb#if DDB > 0 3099120495Sphk siocnset(&gdbconsdev, unit); 3100111194Sphk gdb_arg = &gdbconsdev; 310165714Sjhb gdb_getc = siocngetc; 310265714Sjhb gdb_putc = siocnputc; 310365714Sjhb#endif 310465714Sjhb 310551078Speter s = spltty(); 310651078Speter 310751078Speter /* 310851078Speter * Initialize the divisor latch. We can't rely on 310951078Speter * siocnopen() to do this the first time, since it 311051078Speter * avoids writing to the latch if the latch appears 311151078Speter * to have the correct value. Also, if we didn't 311251078Speter * just read the speed from the hardware, then we 311351078Speter * need to set the speed in hardware so that 311451078Speter * switching it later is null. 311551078Speter */ 311651078Speter cfcr = inb(siogdbiobase + com_cfcr); 311751078Speter outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 311889986Sjhay divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 311989986Sjhay outb(siogdbiobase + com_dlbl, divisor & 0xff); 312089986Sjhay outb(siogdbiobase + com_dlbh, divisor >> 8); 312151078Speter outb(siogdbiobase + com_cfcr, cfcr); 312251078Speter 312351078Speter siocnopen(&sp, siogdbiobase, gdbdefaultrate); 312451078Speter splx(s); 312551078Speter 312658885Simp return (0); 312751078Speter} 312851078Speter 312951078Speter#endif 313051078Speter 313151078Speterstatic int 3132111194Sphksiocncheckc(struct consdev *cd) 313351078Speter{ 313451078Speter int c; 313551078Speter Port_t iobase; 313651078Speter int s; 313751078Speter struct siocnstate sp; 313898401Sn_hibma speed_t speed; 3139111194Sphk 3140120457Sphk if (cd->cn_unit == siocnunit) { 314198401Sn_hibma iobase = siocniobase; 314298401Sn_hibma speed = comdefaultrate; 314398401Sn_hibma } else { 314451078Speter iobase = siogdbiobase; 314598401Sn_hibma speed = gdbdefaultrate; 314698401Sn_hibma } 314751078Speter s = spltty(); 314898401Sn_hibma siocnopen(&sp, iobase, speed); 314951078Speter if (inb(iobase + com_lsr) & LSR_RXRDY) 315051078Speter c = inb(iobase + com_data); 315151078Speter else 315251078Speter c = -1; 315351078Speter siocnclose(&sp, iobase); 315451078Speter splx(s); 315551078Speter return (c); 315651078Speter} 315751078Speter 3158104094Sphkstatic int 3159111194Sphksiocngetc(struct consdev *cd) 316051078Speter{ 316151078Speter int c; 316251078Speter Port_t iobase; 316351078Speter int s; 316451078Speter struct siocnstate sp; 316598401Sn_hibma speed_t speed; 316651078Speter 3167120457Sphk if (cd->cn_unit == siocnunit) { 316898401Sn_hibma iobase = siocniobase; 316998401Sn_hibma speed = comdefaultrate; 317098401Sn_hibma } else { 317151078Speter iobase = siogdbiobase; 317298401Sn_hibma speed = gdbdefaultrate; 317398401Sn_hibma } 317451078Speter s = spltty(); 317598401Sn_hibma siocnopen(&sp, iobase, speed); 317651078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 317751078Speter ; 317851078Speter c = inb(iobase + com_data); 317951078Speter siocnclose(&sp, iobase); 318051078Speter splx(s); 318151078Speter return (c); 318251078Speter} 318351078Speter 3184104094Sphkstatic void 3185111194Sphksiocnputc(struct consdev *cd, int c) 318651078Speter{ 318788582Sbde int need_unlock; 318851078Speter int s; 318951078Speter struct siocnstate sp; 319051078Speter Port_t iobase; 319198401Sn_hibma speed_t speed; 319251078Speter 3193120457Sphk if (cd->cn_unit == siocnunit) { 319498401Sn_hibma iobase = siocniobase; 319598401Sn_hibma speed = comdefaultrate; 319698401Sn_hibma } else { 319751078Speter iobase = siogdbiobase; 319898401Sn_hibma speed = gdbdefaultrate; 319998401Sn_hibma } 320051078Speter s = spltty(); 320188582Sbde need_unlock = 0; 320288582Sbde if (sio_inited == 2 && !mtx_owned(&sio_lock)) { 320384029Sjlemon mtx_lock_spin(&sio_lock); 320488582Sbde need_unlock = 1; 320588582Sbde } 320698401Sn_hibma siocnopen(&sp, iobase, speed); 320751078Speter siocntxwait(iobase); 320851078Speter outb(iobase + com_data, c); 320951078Speter siocnclose(&sp, iobase); 321088582Sbde if (need_unlock) 321184029Sjlemon mtx_unlock_spin(&sio_lock); 321251078Speter splx(s); 321351078Speter} 321451078Speter 321551078Speter#ifdef __alpha__ 321651078Speterint 321751078Spetersiogdbgetc() 321851078Speter{ 321951078Speter int c; 322051078Speter Port_t iobase; 322198401Sn_hibma speed_t speed; 322251078Speter int s; 322351078Speter struct siocnstate sp; 322451078Speter 322598619Sn_hibma if (siogdbunit == siocnunit) { 322698401Sn_hibma iobase = siocniobase; 322798401Sn_hibma speed = comdefaultrate; 322898401Sn_hibma } else { 322998401Sn_hibma iobase = siogdbiobase; 323098401Sn_hibma speed = gdbdefaultrate; 323198401Sn_hibma } 323298401Sn_hibma 323351078Speter s = spltty(); 323498401Sn_hibma siocnopen(&sp, iobase, speed); 323551078Speter while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 323651078Speter ; 323751078Speter c = inb(iobase + com_data); 323851078Speter siocnclose(&sp, iobase); 323951078Speter splx(s); 324051078Speter return (c); 324151078Speter} 324251078Speter 324351078Spetervoid 324451078Spetersiogdbputc(c) 324551078Speter int c; 324651078Speter{ 324798401Sn_hibma Port_t iobase; 324898401Sn_hibma speed_t speed; 324951078Speter int s; 325051078Speter struct siocnstate sp; 325151078Speter 325298619Sn_hibma if (siogdbunit == siocnunit) { 325398401Sn_hibma iobase = siocniobase; 325498401Sn_hibma speed = comdefaultrate; 325598401Sn_hibma } else { 325698401Sn_hibma iobase = siogdbiobase; 325798401Sn_hibma speed = gdbdefaultrate; 325898401Sn_hibma } 325998401Sn_hibma 326051078Speter s = spltty(); 326198401Sn_hibma siocnopen(&sp, iobase, speed); 326251078Speter siocntxwait(siogdbiobase); 326351078Speter outb(siogdbiobase + com_data, c); 326451078Speter siocnclose(&sp, siogdbiobase); 326551078Speter splx(s); 326651078Speter} 326751078Speter#endif 3268