1/******************************************************************************* 2*Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved. 3* 4*Redistribution and use in source and binary forms, with or without modification, are permitted provided 5*that the following conditions are met: 6*1. Redistributions of source code must retain the above copyright notice, this list of conditions and the 7*following disclaimer. 8*2. Redistributions in binary form must reproduce the above copyright notice, 9*this list of conditions and the following disclaimer in the documentation and/or other materials provided 10*with the distribution. 11* 12*THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED 13*WARRANTIES,INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 14*FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 15*FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 16*NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 17*BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18*LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 19*SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE 20* 21* $FreeBSD$ 22* 23********************************************************************************/ 24/*******************************************************************************/ 25/** \file 26 * 27 * 28 * The file defines data structures for SAS/SATA TD layer 29 * 30 */ 31 32#ifndef __TDSATYPES_H 33#define __TDSATYPES_H 34 35#define ESGL_PAGES_SIZE sizeof(agsaEsgl_t) /** the esgl page size */ 36#define NUM_ESGL_PAGES 0 /* old value 512 */ /**< the default number of esgl pages */ 37 38 39/**< target device type */ 40#define TD_DEFAULT_DEVICE 0 41#define TD_SAS_DEVICE 1 42#define TD_SATA_DEVICE 2 43 44#include <dev/pms/RefTisa/tisa/sassata/common/tdioctl.h> 45 46 47/** \brief data structure for SATA Host 48 * 49 * to be developed 50 * 51 */ 52typedef struct itdstHost_s 53{ 54 int i; 55} itdstHost_t; 56 57/** \brief data structure for SATA Device 58 * 59 * to be developed 60 * 61 */ 62typedef struct ttdstDevice_s 63{ 64 int i; 65} ttdstDevice_t; 66 67#ifdef INITIATOR_DRIVER 68typedef struct itdsaIni_s { 69 /**< point to the shared structure bothe SAS and SATA */ 70 struct tdsaContext_s *tdsaAllShared; 71 itdssOperatingOption_t OperatingOption; 72 tdSCSIStatusCount_t ScsiStatusCounts; 73 tdSenseKeyCount_t SenseKeyCounter; 74 bit32 NumIOsActive; 75 /* the list of initiator timer; upon expiration timer CB fn is called 76 eg) itdProcessTimers() 77 */ 78 tdList_t timerlist; 79} itdsaIni_t; 80#endif 81 82struct ttdsaXchgAllocFreeInfoList_s; 83 84#ifdef TARGET_DRIVER 85typedef struct ttdsaTgt_s { 86 /* point to the shared across SAS and SATA */ 87 struct tdsaContext_s *tdsaAllShared; 88 ttdssOperatingOption_t OperatingOption; 89 tiTargetOption_t tiOperatingOption; 90 ttdsaXchgData_t ttdsaXchgData; 91#ifdef PASSTHROUGH 92 /* registered passthrough CB */ 93 ostiProcessPassthroughCmnd_t PasthroughCB; 94#endif 95} ttdsaTgt_t; 96#endif 97 98 99/** \brief data structure for SATA Device 100 * 101 * not in use yet. just a place holderto be develped 102 * 103 */ 104typedef struct tdHardwareInfo_s { 105 bit16 DeviceID; 106 bit16 VendorID; 107 bit8 ChipRev; 108 bit32 PciFunctionNumber; 109 bit32 FlashRomPresent; 110} tdHardwareInfo_t; 111 112 113/** \brief data structure for ESLG page 114 * 115 * This data structure describes the ESGL page maintained in TD layer. 116 * One important field is agEsgl which is pointer to assaEsgl_t data structure, 117 * which describes ESGL used in lower layer. 118 * Memory for this data structure is allocated using tiTdSharedMem_t data 119 * structure. However, Memory for agsaEsgl_t data structure is allocated using 120 * tiLoLevelResource_t. 121 * 122 */ 123typedef struct tdsaEsglPageInfo_s { 124 tdList_t tdlist; /**< pointers to next and previous pages */ 125 bit32 physAddressUpper; /**< upper physical address of the page */ 126 bit32 physAddressLower; /**< lower physical address of the page */ 127 bit32 len; 128 agsaEsgl_t *agEsgl; 129 bit32 id; /**< for debugging only */ 130} tdsaEsglPageInfo_t; 131 132/** \brief data structure for ESLG page pool 133 * 134 * This data structure describes the pool of esgl pages 135 * 136 */ 137typedef struct tdsaEsglPagePool_s { 138 tdsaEsglPageInfo_t EsglPages[1]; /**< variable size array */ 139} tdsaEsglPagePool_t; 140 141 142/** \brief data structure for ESGL pool information 143 * 144 * This data structure maintains information about ESGL pool. For example, this 145 * data structure maintains the number of free and total ESGL pages and uses 146 * tdList_t data structure for listing of ESGL pages. 147 * 148 */ 149typedef struct tdsaEsglAllInfo_s { 150 /* 151 used in tdGetEsglPages() 152 */ 153 tdList_t mainlist; /* not used */ 154 tdList_t freelist; 155 bit32 NumEsglPages; 156 bit32 NumFreeEsglPages; 157 bit32 EsglPageSize; 158 bit32 physAddrUpper; 159 bit32 physAddrLower; 160 void *virtPtr; 161 tdsaEsglPagePool_t *EsglPagePool; 162} tdsaEsglAllInfo_t; 163 164typedef struct smp_pass_through_req 165{ 166 bit8 exp_sas_addr[8]; //Storing the 16 digit expander SAS-address 167 bit32 smp_req_len; //Length of the request frame 168 bit32 smp_resp_len; //Length of the response frame 169 bit8 smp_req_resp[1]; //Pointer to the request-response frame 170}smp_pass_through_req_t; 171 172#ifdef TD_INT_COALESCE 173typedef struct tdsaIntCoalesceContext_s { 174 tdList_t MainLink; /* free */ 175 tdList_t FreeLink; /* in use */ 176 struct tdsaContext_s *tdsaAllShared; 177#ifdef OS_INT_COALESCE 178 tiIntCoalesceContext_t *tiIntCoalesceCxt; 179#endif 180 agsaIntCoalesceContext_t agIntCoalCxt; 181 /* for debug */ 182 bit32 id; 183 184} tdsaIntCoalesceContext_t; 185#endif 186 187typedef struct tdsaHwEventSource_s { 188 bit32 EventValid; 189 agsaEventSource_t Source; 190} tdsaHwEventSource_t; 191 192/** \brief data structure for SAS/SATA context at TD layer 193 * 194 * This data structure is used for both SAS and SATA. 195 * In addition, this is the data structure used mainly to communicate with 196 * lower layer. 197 * 198 */ 199typedef struct tdsaContext_s { 200 bit32 currentOperation; 201 202 /**< agsaRoot_t->osData points to this */ 203 struct tdsaRootOsData_s agRootOsDataForInt; /* for interrupt */ 204 struct tdsaRootOsData_s agRootOsDataForNonInt; /* for non-interrupt */ 205 206 agsaRoot_t agRootInt; /* for interrupt */ 207 agsaRoot_t agRootNonInt; /* for non-interrupt */ 208 209 /* flags values commonly used for both SAS and SATA */ 210 struct tdsaComMemFlags_s flags; 211 212 213 /**< software-related initialization params used in saInitialize() */ 214 agsaSwConfig_t SwConfig; 215 216 /**< Queue-related initialization params used in saInitialize() */ 217 agsaQueueConfig_t QueueConfig; 218 219 /**< hardware-related initialization params used in saInitialize() */ 220 agsaHwConfig_t HwConfig; 221 222 223 /**< Copy of TI low level resoure */ 224 tiLoLevelResource_t loResource; 225 226 /* information of ESGL pages allocated 227 tdsaEsglAllInfo_t EsglAllInfo; 228 */ 229 230 /* hardware information; just place holder 231 tdHardwareInfo_t hwInfo; 232 */ 233 234 bit32 currentInterruptDelay; 235 236 /**< timers used commonly in SAS/SATA */ 237 tdList_t timerlist; 238 /***********************************************************************/ 239 /* used to be in tdssContext_t tdssSASShared;*/ 240 struct itdsaIni_s *itdsaIni; /* Initiator; */ 241 struct ttdsaTgt_s *ttdsaTgt; /* Target */ 242 /**< pointer to PortContext memory; */ 243 tdsaPortContext_t *PortContextMem; 244 /**< pointer to Device memory */ 245 tdsaDeviceData_t *DeviceMem; 246 247 tdList_t FreePortContextList; 248 tdList_t MainPortContextList; 249 tdList_t FreeDeviceList; 250 tdList_t MainDeviceList; 251 252 /**< actual storage for jump table */ 253 tdsaJumpTable_t tdJumpTable; 254 /**< Local SAS port start information such as ID addr */ 255 tdsaPortStartInfo_t Ports[TD_MAX_NUM_PHYS]; 256 /***********************************************************************/ 257 /**< storage for FW download contents */ 258 tdFWControlEx_t tdFWControlEx; 259#ifdef SPC_ENABLE_PROFILE 260 tdFWProfileEx_t tdFWProfileEx; 261#endif 262#ifdef TD_INT_COALESCE 263 tdsaIntCoalesceContext_t *IntCoalesce; 264#endif 265 266 /* first time a card is processed set this true */ 267 bit32 first_process; 268 269 /* expander list */ 270 tdsaExpander_t *ExpanderHead; 271 // tdList_t discoveringExpanderList; 272 tdList_t freeExpanderList; 273 bit32 phyCount; 274 bit32 IBQnumber; 275 bit32 OBQnumber; 276 bit32 InboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 277 bit32 InboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 278 bit32 OutboundQueueSize[AGSA_MAX_OUTBOUND_Q]; 279 bit32 OutboundQueueEleSize[AGSA_MAX_OUTBOUND_Q]; 280 bit32 OutboundQueueInterruptDelay[AGSA_MAX_OUTBOUND_Q]; 281 bit32 OutboundQueueInterruptCount[AGSA_MAX_OUTBOUND_Q]; 282 bit32 OutboundQueueInterruptEnable[AGSA_MAX_OUTBOUND_Q]; 283 bit32 InboundQueuePriority[AGSA_MAX_INBOUND_Q]; 284 bit32 QueueOption; 285 bit32 tdDeviceIdVendId; 286 bit32 tdSubVendorId; 287 /* instance number */ 288 bit8 CardIDString[TD_CARD_ID_LEN]; 289 bit32 CardID; 290#ifdef VPD_TESTING 291 /* temp; for testing VPD indirect */ 292 bit32 addrUpper; 293 bit32 addrLower; 294#endif 295 296 bit32 resetCount; 297 tdsaHwEventSource_t eventSource[TD_MAX_NUM_PHYS]; 298 bit32 portTMO; /* in 100ms */ 299 bit32 phyCalibration; /* enables or disables phy calibration */ 300 bit32 FCA; /* force to clear affiliation by sending SMP HARD RESET */ 301 bit32 SMPQNum; /* first high priority queue number for SMP */ 302 bit32 ResetInDiscovery; /* hard/link reset in discovery */ 303 bit32 FWMaxPorts; 304 bit32 IDRetry; /* SATA ID failurs are retired */ 305 bit32 RateAdjust; /* allow retry open with lower connection rate */ 306#ifdef AGTIAPI_CTL 307 bit16 SASConnectTimeLimit; /* used by tdsaCTLSet() */ 308#endif 309 bit32 MaxNumOSLocks; /* max number of OS layer locks */ 310 bit32 MaxNumLLLocks; /* max num of LL locks */ 311 bit32 MaxNumLocks; /* max num of locks for layers and modules (LL, TDM, SATM, DM) */ 312#ifdef FDS_DM 313 bit32 MaxNumDMLocks; /* max num of DM locks */ 314 dmRoot_t dmRoot; /* discovery root */ 315 dmSwConfig_t dmSwConfig; 316#endif 317#ifdef FDS_SM 318 bit32 MaxNumSMLocks; /* max num of SM locks */ 319 smRoot_t smRoot; /* SATM root */ 320 smSwConfig_t smSwConfig; 321#endif 322 bit32 MCN; /* temp; only for testing and to be set by registry or adj file */ 323 bit32 sflag; /* Sflag bit */ 324#ifdef CCFLAGS_PHYCONTROL_COUNTS 325 agsaPhyAnalogSetupRegisters_t analog[TD_MAX_NUM_PHYS]; 326#endif /* CCFLAGS_PHYCONTROL_COUNTS */ 327 bit32 stp_idle_time; /* stp idle time for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 328 bit32 STP_MCT_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 329 bit32 SSP_MCT_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 330 bit32 MAX_OPEN_TIME; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 331 bit32 SMP_MAX_CONN_TIMER; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 332 bit32 STP_FRM_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 333 bit32 MFD; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 334 bit32 OPNRJT_RTRY_INTVL; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 335 bit32 DOPNRJT_RTRY_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 336 bit32 COPNRJT_RTRY_TMO; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 337 bit32 DOPNRJT_RTRY_THR; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 338 bit32 COPNRJT_RTRY_THR; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 339 bit32 itNexusTimeout; /* set by registry */ 340 bit32 MAX_AIP; /* for agsaSASProtocolTimerConfigurationPage_t; set by registry or adj file */ 341 agsaMPIContext_t MpiOverride; 342#ifdef TI_GETFOR_ONRESET 343 bit8 FatalErrorData[(5 * (1024 * 1024))]; 344#endif /* TI_GETFOR_ONRESET */ 345 bit32 sgpioResponseSet; /*Used to sync between SGPIO Req and Resp */ 346 volatile NvmdResponseSet; 347} tdsaContext_t; 348 349#ifdef FAST_IO_TEST 350#define CMDS_PER_IO_IOPS 1 351#define CMDS_PER_IO_DUP 1 //4 352#endif 353 354/** \brief the root data structure for TD layer 355 * 356 * This data structure is the main data structure used in communicating 357 * with OS layer. For example, tiRoot_t->tdData points to this data structure 358 * From this data structure, SATA host/Device and SAS initiator/target are found. 359 * 360 */ 361typedef struct tdsaRoot_s 362{ 363 /**<< common data structure for SAS/SATA */ 364 tdsaContext_t tdsaAllShared; 365 bit32 autoGoodRSP; 366#ifdef INITIATOR_DRIVER 367 itdsaIni_t *itdsaIni; /**< SAS/SATA initiator */ 368#endif 369#ifdef TARGET_DRIVER 370 ttdsaTgt_t *ttdsaTgt; /**< SAS/SATA target */ 371#endif 372} tdsaRoot_t; 373 374typedef struct tmf_pass_through_req 375{ 376 bit8 pathId; 377 bit8 targetId; 378 bit8 lun; 379}tmf_pass_through_req_t; 380 381/* Context Field accessors */ 382#define TD_GET_TIROOT(sa_root) (((tdsaRootOsData_t *)(sa_root)->osData)->tiRoot) 383#define TD_GET_TDROOT(ti_root) ((tdsaRoot_t *)(ti_root)->tdData) 384#define TD_GET_TICONTEXT(ti_root) ((tdsaContext_t *)&TD_GET_TDROOT(ti_root)->tdsaAllShared) 385#define TD_GET_TIINI_CONTEXT(ti_root) ((itdsaIni_t *)TD_GET_TICONTEXT(ti_root)->itdsaIni) 386#define TD_GET_TITGT_CONTEXT(ti_root) ((ttdsaTgt_t *)TD_GET_TICONTEXT(ti_root)->ttdsaTgt) 387#endif /* __TDSATYPES_H */ 388