1/*-
2 * Copyright (c) 2013 Bjoern A. Zeeb
3 * All rights reserved.
4 *
5 * This software was developed by SRI International and the University of
6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-11-C-0249)
7 * ("MRC2"), as part of the DARPA MRC research programme.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: releng/10.2/sys/dev/altera/atse/if_atse_fdt.c 266152 2014-05-15 16:11:06Z ian $");
33
34#include <sys/param.h>
35#include <sys/bus.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/rman.h>
39#include <sys/socket.h>
40#include <sys/systm.h>
41
42#include <machine/bus.h>
43#include <machine/resource.h>
44
45#include <net/ethernet.h>
46#include <net/if.h>
47#include <net/if_media.h>
48
49#include <dev/mii/mii.h>
50#include <dev/mii/miivar.h>
51
52
53#include <dev/fdt/fdt_common.h>
54#include <dev/ofw/openfirm.h>
55#include <dev/ofw/ofw_bus.h>
56#include <dev/ofw/ofw_bus_subr.h>
57
58#include <dev/altera/atse/if_atsereg.h>
59
60/* "device miibus" required.  See GENERIC if you get errors here. */
61#include "miibus_if.h"
62
63static int
64atse_probe_fdt(device_t dev)
65{
66
67	if (!ofw_bus_status_okay(dev))
68		return (ENXIO);
69
70	if (ofw_bus_is_compatible(dev, "altera,atse")) {
71		device_set_desc(dev, "Altera Triple-Speed Ethernet MegaCore");
72		return (BUS_PROBE_DEFAULT);
73	}
74        return (ENXIO);
75}
76
77static int
78atse_attach_fdt(device_t dev)
79{
80	struct atse_softc *sc;
81	int error;
82
83	sc = device_get_softc(dev);
84	sc->atse_dev = dev;
85	sc->atse_unit = device_get_unit(dev);
86
87	/*
88	 * FDT has the list of our resources.  Given we are using multiple
89	 * memory regions and possibly multiple interrupts, we need to attach
90	 * them in the order specified in .dts:
91	 * MAC, RX and RXC FIFO, TX and TXC FIFO; RX INTR, TX INTR.
92	 */
93
94	/* MAC: Avalon-MM, atse management register region. */
95	sc->atse_mem_rid = 0;
96	sc->atse_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
97	    &sc->atse_mem_rid, RF_ACTIVE);
98	if (sc->atse_mem_res == NULL) {
99		device_printf(dev, "failed to map memory for ctrl region\n");
100		error = ENXIO;
101		goto err;
102	}
103	if (bootverbose)
104		device_printf(sc->atse_dev, "MAC ctrl region at mem %p-%p\n",
105		    (void *)rman_get_start(sc->atse_mem_res),
106		    (void *)(rman_get_start(sc->atse_mem_res) +
107		    rman_get_size(sc->atse_mem_res)));
108
109	/*
110	 * RX and RXC FIFO memory regions.
111	 * 0x00: 2 * 32bit FIFO data,
112	 * 0x20: 8 * 32bit FIFO ctrl, Avalon-ST Sink to Avalon-MM R-Slave.
113	 */
114	sc->atse_rx_mem_rid = 1;
115	sc->atse_rx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
116	    &sc->atse_rx_mem_rid, RF_ACTIVE);
117	if (sc->atse_rx_mem_res == NULL) {
118		device_printf(dev, "failed to map memory for RX FIFO\n");
119		error = ENXIO;
120		goto err;
121	}
122	if (bootverbose)
123		device_printf(sc->atse_dev, "RX FIFO at mem %p-%p\n",
124		    (void *)rman_get_start(sc->atse_rx_mem_res),
125		    (void *)(rman_get_start(sc->atse_rx_mem_res) +
126		    rman_get_size(sc->atse_rx_mem_res)));
127
128	sc->atse_rxc_mem_rid = 2;
129	sc->atse_rxc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
130	    &sc->atse_rxc_mem_rid, RF_ACTIVE);
131	if (sc->atse_rxc_mem_res == NULL) {
132		device_printf(dev, "failed to map memory for RXC FIFO\n");
133		error = ENXIO;
134		goto err;
135	}
136	if (bootverbose)
137		device_printf(sc->atse_dev, "RXC FIFO at mem %p-%p\n",
138		    (void *)rman_get_start(sc->atse_rxc_mem_res),
139		    (void *)(rman_get_start(sc->atse_rxc_mem_res) +
140		    rman_get_size(sc->atse_rxc_mem_res)));
141
142	/*
143	 * TX and TXC FIFO memory regions.
144	 * 0x00: 2 * 32bit FIFO data,
145	 * 0x20: 8 * 32bit FIFO ctrl, Avalon-MM W-Slave to Avalon-ST Source.
146	 */
147	sc->atse_tx_mem_rid = 3;
148	sc->atse_tx_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
149	    &sc->atse_tx_mem_rid, RF_ACTIVE);
150	if (sc->atse_tx_mem_res == NULL) {
151		device_printf(dev, "failed to map memory for TX FIFO\n");
152		error = ENXIO;
153		goto err;
154	}
155	if (bootverbose)
156		device_printf(sc->atse_dev, "TX FIFO at mem %p-%p\n",
157		    (void *)rman_get_start(sc->atse_tx_mem_res),
158		    (void *)(rman_get_start(sc->atse_tx_mem_res) +
159		    rman_get_size(sc->atse_tx_mem_res)));
160
161	sc->atse_txc_mem_rid = 4;
162	sc->atse_txc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
163	    &sc->atse_txc_mem_rid, RF_ACTIVE);
164	if (sc->atse_txc_mem_res == NULL) {
165		device_printf(dev, "failed to map memory for TXC FIFO\n");
166		error = ENXIO;
167		goto err;
168	}
169	if (bootverbose)
170		device_printf(sc->atse_dev, "TXC FIFO at mem %p-%p\n",
171		    (void *)rman_get_start(sc->atse_txc_mem_res),
172		    (void *)(rman_get_start(sc->atse_txc_mem_res) +
173		    rman_get_size(sc->atse_txc_mem_res)));
174
175	/* (Optional) RX and TX IRQ. */
176	sc->atse_rx_irq_rid = 0;
177	sc->atse_rx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
178	    &sc->atse_rx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
179	sc->atse_tx_irq_rid = 1;
180	sc->atse_tx_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
181	    &sc->atse_tx_irq_rid, RF_ACTIVE | RF_SHAREABLE);
182
183	error = atse_attach(dev);
184	if (error)
185		goto err;
186
187	return (0);
188
189err:
190	/* Cleanup. */
191	atse_detach_resources(dev);
192
193	return (error);
194}
195
196static device_method_t atse_methods_fdt[] = {
197	/* Device interface */
198	DEVMETHOD(device_probe,		atse_probe_fdt),
199	DEVMETHOD(device_attach,	atse_attach_fdt),
200	DEVMETHOD(device_detach,	atse_detach_dev),
201
202	/* MII interface */
203	DEVMETHOD(miibus_readreg,	atse_miibus_readreg),
204	DEVMETHOD(miibus_writereg,	atse_miibus_writereg),
205	DEVMETHOD(miibus_statchg,	atse_miibus_statchg),
206
207	DEVMETHOD_END
208};
209
210static driver_t atse_driver_fdt = {
211	"atse",
212	atse_methods_fdt,
213	sizeof(struct atse_softc)
214};
215
216DRIVER_MODULE(atse, simplebus, atse_driver_fdt, atse_devclass, 0, 0);
217DRIVER_MODULE(miibus, atse, miibus_driver, miibus_devclass, 0, 0);
218
219/* end */
220