octeon-feature.h revision 215990
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All rights 3215990Sjmallett * reserved. 4210284Sjmallett * 5210284Sjmallett * 6215990Sjmallett * Redistribution and use in source and binary forms, with or without 7215990Sjmallett * modification, are permitted provided that the following conditions are 8215990Sjmallett * met: 9210284Sjmallett * 10215990Sjmallett * * Redistributions of source code must retain the above copyright 11215990Sjmallett * notice, this list of conditions and the following disclaimer. 12210284Sjmallett * 13215990Sjmallett * * Redistributions in binary form must reproduce the above 14215990Sjmallett * copyright notice, this list of conditions and the following 15215990Sjmallett * disclaimer in the documentation and/or other materials provided 16215990Sjmallett * with the distribution. 17215990Sjmallett 18215990Sjmallett * * Neither the name of Cavium Networks nor the names of 19215990Sjmallett * its contributors may be used to endorse or promote products 20215990Sjmallett * derived from this software without specific prior written 21215990Sjmallett * permission. 22215990Sjmallett 23215990Sjmallett * This Software, including technical data, may be subject to U.S. export control 24215990Sjmallett * laws, including the U.S. Export Administration Act and its associated 25215990Sjmallett * regulations, and may be subject to export or import regulations in other 26215990Sjmallett * countries. 27215990Sjmallett 28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29215990Sjmallett * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR 30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35215990Sjmallett * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36215990Sjmallett * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38210284Sjmallett ***********************license end**************************************/ 39210284Sjmallett 40210284Sjmallett 41210284Sjmallett 42210284Sjmallett 43210284Sjmallett 44215990Sjmallett 45210284Sjmallett/** 46210284Sjmallett * @file 47210284Sjmallett * 48210284Sjmallett * File defining checks for different Octeon features. 49210284Sjmallett * 50210284Sjmallett * <hr>$Revision: 30468 $<hr> 51210284Sjmallett */ 52210284Sjmallett 53210284Sjmallett#ifndef __OCTEON_FEATURE_H__ 54210284Sjmallett#define __OCTEON_FEATURE_H__ 55210284Sjmallett 56210284Sjmallett#ifdef __cplusplus 57210284Sjmallettextern "C" { 58210284Sjmallett#endif 59210284Sjmallett 60210284Sjmalletttypedef enum 61210284Sjmallett{ 62215990Sjmallett OCTEON_FEATURE_SAAD, /**< Octeon models in the CN5XXX family and higher support atomic add instructions to memory (saa/saad) */ 63215990Sjmallett OCTEON_FEATURE_ZIP, /**< Does this Octeon support the ZIP offload engine? */ 64215990Sjmallett OCTEON_FEATURE_CRYPTO, /**< Does this Octeon support crypto acceleration using COP2? */ 65215990Sjmallett OCTEON_FEATURE_DORM_CRYPTO, /**< Can crypto be enabled by calling cvmx_crypto_dormant_enable()? */ 66215990Sjmallett OCTEON_FEATURE_PCIE, /**< Does this Octeon support PCI express? */ 67215990Sjmallett OCTEON_FEATURE_SRIO, /**< Does this Octeon support SRIOs */ 68215990Sjmallett OCTEON_FEATURE_KEY_MEMORY, /**< Some Octeon models support internal memory for storing cryptographic keys */ 69215990Sjmallett OCTEON_FEATURE_LED_CONTROLLER, /**< Octeon has a LED controller for banks of external LEDs */ 70215990Sjmallett OCTEON_FEATURE_TRA, /**< Octeon has a trace buffer */ 71215990Sjmallett OCTEON_FEATURE_MGMT_PORT, /**< Octeon has a management port */ 72215990Sjmallett OCTEON_FEATURE_RAID, /**< Octeon has a raid unit */ 73215990Sjmallett OCTEON_FEATURE_USB, /**< Octeon has a builtin USB */ 74215990Sjmallett OCTEON_FEATURE_NO_WPTR, /**< Octeon IPD can run without using work queue entries */ 75215990Sjmallett OCTEON_FEATURE_DFA, /**< Octeon has DFA state machines */ 76215990Sjmallett OCTEON_FEATURE_MDIO_CLAUSE_45, /**< Octeon MDIO block supports clause 45 transactions for 10 Gig support */ 77215990Sjmallett OCTEON_FEATURE_NPEI, /**< CN52XX and CN56XX used a block named NPEI for PCIe access. Newer chips replaced this with SLI+DPI */ 78210284Sjmallett} octeon_feature_t; 79210284Sjmallett 80210284Sjmallett/** 81210284Sjmallett * Determine if the current Octeon supports a specific feature. These 82210284Sjmallett * checks have been optimized to be fairly quick, but they should still 83210284Sjmallett * be kept out of fast path code. 84210284Sjmallett * 85210284Sjmallett * @param feature Feature to check for. This should always be a constant so the 86210284Sjmallett * compiler can remove the switch statement through optimization. 87210284Sjmallett * 88210284Sjmallett * @return Non zero if the feature exists. Zero if the feature does not 89210284Sjmallett * exist. 90210284Sjmallett */ 91210284Sjmallettstatic inline int octeon_has_feature(octeon_feature_t feature) 92210284Sjmallett{ 93210284Sjmallett switch (feature) 94210284Sjmallett { 95210284Sjmallett case OCTEON_FEATURE_SAAD: 96210284Sjmallett return !OCTEON_IS_MODEL(OCTEON_CN3XXX); 97210284Sjmallett 98210284Sjmallett case OCTEON_FEATURE_ZIP: 99210284Sjmallett if (OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN50XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) 100210284Sjmallett return 0; 101210284Sjmallett else 102215990Sjmallett return !cvmx_fuse_read(121); 103210284Sjmallett 104210284Sjmallett case OCTEON_FEATURE_CRYPTO: 105215990Sjmallett if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 106215990Sjmallett cvmx_mio_fus_dat2_t fus_2; 107215990Sjmallett fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 108215990Sjmallett if (fus_2.s.nocrypto || fus_2.s.nomul) { 109215990Sjmallett return 0; 110215990Sjmallett } else if (!fus_2.s.dorm_crypto) { 111215990Sjmallett return 1; 112215990Sjmallett } else { 113215990Sjmallett cvmx_rnm_ctl_status_t st; 114215990Sjmallett st.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS); 115215990Sjmallett return st.s.eer_val; 116215990Sjmallett } 117215990Sjmallett } else { 118215990Sjmallett return !cvmx_fuse_read(90); 119215990Sjmallett } 120210284Sjmallett 121215990Sjmallett case OCTEON_FEATURE_DORM_CRYPTO: 122215990Sjmallett if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 123215990Sjmallett cvmx_mio_fus_dat2_t fus_2; 124215990Sjmallett fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 125215990Sjmallett return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto; 126215990Sjmallett } else { 127215990Sjmallett return 0; 128215990Sjmallett } 129215990Sjmallett 130210284Sjmallett case OCTEON_FEATURE_PCIE: 131215990Sjmallett return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX)); 132210284Sjmallett 133215990Sjmallett case OCTEON_FEATURE_SRIO: 134215990Sjmallett return (OCTEON_IS_MODEL(OCTEON_CN6XXX)); 135215990Sjmallett 136210284Sjmallett case OCTEON_FEATURE_KEY_MEMORY: 137215990Sjmallett return OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 138215990Sjmallett 139210284Sjmallett case OCTEON_FEATURE_LED_CONTROLLER: 140215990Sjmallett return OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN56XX); 141215990Sjmallett 142210284Sjmallett case OCTEON_FEATURE_TRA: 143210284Sjmallett return !(OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)); 144210284Sjmallett case OCTEON_FEATURE_MGMT_PORT: 145215990Sjmallett return OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 146215990Sjmallett 147210284Sjmallett case OCTEON_FEATURE_RAID: 148215990Sjmallett return OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 149215990Sjmallett 150210284Sjmallett case OCTEON_FEATURE_USB: 151210284Sjmallett return !(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX)); 152215990Sjmallett 153210284Sjmallett case OCTEON_FEATURE_NO_WPTR: 154215990Sjmallett return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX)) && 155215990Sjmallett !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X); 156215990Sjmallett 157210284Sjmallett case OCTEON_FEATURE_DFA: 158210284Sjmallett if (!OCTEON_IS_MODEL(OCTEON_CN38XX) && !OCTEON_IS_MODEL(OCTEON_CN31XX) && !OCTEON_IS_MODEL(OCTEON_CN58XX)) 159210284Sjmallett return 0; 160210284Sjmallett else if (OCTEON_IS_MODEL(OCTEON_CN3020)) 161210284Sjmallett return 0; 162210284Sjmallett else 163215990Sjmallett return !cvmx_fuse_read(120); 164215990Sjmallett 165210284Sjmallett case OCTEON_FEATURE_MDIO_CLAUSE_45: 166215990Sjmallett return !(OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)); 167215990Sjmallett 168215990Sjmallett case OCTEON_FEATURE_NPEI: 169215990Sjmallett return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)); 170210284Sjmallett } 171210284Sjmallett return 0; 172210284Sjmallett} 173210284Sjmallett 174210284Sjmallett#ifdef __cplusplus 175210284Sjmallett} 176210284Sjmallett#endif 177210284Sjmallett 178210284Sjmallett#endif /* __OCTEON_FEATURE_H__ */ 179