octeon-feature.h revision 215990
1/***********************license start*************** 2 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). 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THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 42 43 44 45/** 46 * @file 47 * 48 * File defining checks for different Octeon features. 49 * 50 * <hr>$Revision: 30468 $<hr> 51 */ 52 53#ifndef __OCTEON_FEATURE_H__ 54#define __OCTEON_FEATURE_H__ 55 56#ifdef __cplusplus 57extern "C" { 58#endif 59 60typedef enum 61{ 62 OCTEON_FEATURE_SAAD, /**< Octeon models in the CN5XXX family and higher support atomic add instructions to memory (saa/saad) */ 63 OCTEON_FEATURE_ZIP, /**< Does this Octeon support the ZIP offload engine? */ 64 OCTEON_FEATURE_CRYPTO, /**< Does this Octeon support crypto acceleration using COP2? */ 65 OCTEON_FEATURE_DORM_CRYPTO, /**< Can crypto be enabled by calling cvmx_crypto_dormant_enable()? */ 66 OCTEON_FEATURE_PCIE, /**< Does this Octeon support PCI express? */ 67 OCTEON_FEATURE_SRIO, /**< Does this Octeon support SRIOs */ 68 OCTEON_FEATURE_KEY_MEMORY, /**< Some Octeon models support internal memory for storing cryptographic keys */ 69 OCTEON_FEATURE_LED_CONTROLLER, /**< Octeon has a LED controller for banks of external LEDs */ 70 OCTEON_FEATURE_TRA, /**< Octeon has a trace buffer */ 71 OCTEON_FEATURE_MGMT_PORT, /**< Octeon has a management port */ 72 OCTEON_FEATURE_RAID, /**< Octeon has a raid unit */ 73 OCTEON_FEATURE_USB, /**< Octeon has a builtin USB */ 74 OCTEON_FEATURE_NO_WPTR, /**< Octeon IPD can run without using work queue entries */ 75 OCTEON_FEATURE_DFA, /**< Octeon has DFA state machines */ 76 OCTEON_FEATURE_MDIO_CLAUSE_45, /**< Octeon MDIO block supports clause 45 transactions for 10 Gig support */ 77 OCTEON_FEATURE_NPEI, /**< CN52XX and CN56XX used a block named NPEI for PCIe access. Newer chips replaced this with SLI+DPI */ 78} octeon_feature_t; 79 80/** 81 * Determine if the current Octeon supports a specific feature. These 82 * checks have been optimized to be fairly quick, but they should still 83 * be kept out of fast path code. 84 * 85 * @param feature Feature to check for. This should always be a constant so the 86 * compiler can remove the switch statement through optimization. 87 * 88 * @return Non zero if the feature exists. Zero if the feature does not 89 * exist. 90 */ 91static inline int octeon_has_feature(octeon_feature_t feature) 92{ 93 switch (feature) 94 { 95 case OCTEON_FEATURE_SAAD: 96 return !OCTEON_IS_MODEL(OCTEON_CN3XXX); 97 98 case OCTEON_FEATURE_ZIP: 99 if (OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN50XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)) 100 return 0; 101 else 102 return !cvmx_fuse_read(121); 103 104 case OCTEON_FEATURE_CRYPTO: 105 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 106 cvmx_mio_fus_dat2_t fus_2; 107 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 108 if (fus_2.s.nocrypto || fus_2.s.nomul) { 109 return 0; 110 } else if (!fus_2.s.dorm_crypto) { 111 return 1; 112 } else { 113 cvmx_rnm_ctl_status_t st; 114 st.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS); 115 return st.s.eer_val; 116 } 117 } else { 118 return !cvmx_fuse_read(90); 119 } 120 121 case OCTEON_FEATURE_DORM_CRYPTO: 122 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 123 cvmx_mio_fus_dat2_t fus_2; 124 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); 125 return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto; 126 } else { 127 return 0; 128 } 129 130 case OCTEON_FEATURE_PCIE: 131 return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX)); 132 133 case OCTEON_FEATURE_SRIO: 134 return (OCTEON_IS_MODEL(OCTEON_CN6XXX)); 135 136 case OCTEON_FEATURE_KEY_MEMORY: 137 return OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 138 139 case OCTEON_FEATURE_LED_CONTROLLER: 140 return OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN56XX); 141 142 case OCTEON_FEATURE_TRA: 143 return !(OCTEON_IS_MODEL(OCTEON_CN30XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)); 144 case OCTEON_FEATURE_MGMT_PORT: 145 return OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 146 147 case OCTEON_FEATURE_RAID: 148 return OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX); 149 150 case OCTEON_FEATURE_USB: 151 return !(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX)); 152 153 case OCTEON_FEATURE_NO_WPTR: 154 return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN6XXX)) && 155 !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X); 156 157 case OCTEON_FEATURE_DFA: 158 if (!OCTEON_IS_MODEL(OCTEON_CN38XX) && !OCTEON_IS_MODEL(OCTEON_CN31XX) && !OCTEON_IS_MODEL(OCTEON_CN58XX)) 159 return 0; 160 else if (OCTEON_IS_MODEL(OCTEON_CN3020)) 161 return 0; 162 else 163 return !cvmx_fuse_read(120); 164 165 case OCTEON_FEATURE_MDIO_CLAUSE_45: 166 return !(OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)); 167 168 case OCTEON_FEATURE_NPEI: 169 return (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX)); 170 } 171 return 0; 172} 173 174#ifdef __cplusplus 175} 176#endif 177 178#endif /* __OCTEON_FEATURE_H__ */ 179