1//===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file provides ARM specific target descriptions. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef ARMMCTARGETDESC_H 15#define ARMMCTARGETDESC_H 16 17#include "llvm/Support/DataTypes.h" 18#include <string> 19 20namespace llvm { 21class formatted_raw_ostream; 22class MCAsmBackend; 23class MCCodeEmitter; 24class MCContext; 25class MCInstrInfo; 26class MCInstPrinter; 27class MCObjectWriter; 28class MCRegisterInfo; 29class MCSubtargetInfo; 30class MCStreamer; 31class MCRelocationInfo; 32class StringRef; 33class Target; 34class raw_ostream; 35 36extern Target TheARMTarget, TheThumbTarget; 37 38namespace ARM_MC { 39 std::string ParseARMTriple(StringRef TT, StringRef CPU); 40 41 /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance. 42 /// This is exposed so Asm parser, etc. do not need to go through 43 /// TargetRegistry. 44 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU, 45 StringRef FS); 46} 47 48MCStreamer *createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS, 49 bool isVerboseAsm, bool useLoc, bool useCFI, 50 bool useDwarfDirectory, 51 MCInstPrinter *InstPrint, MCCodeEmitter *CE, 52 MCAsmBackend *TAB, bool ShowInst); 53 54MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII, 55 const MCRegisterInfo &MRI, 56 const MCSubtargetInfo &STI, 57 MCContext &Ctx); 58 59MCAsmBackend *createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, 60 StringRef TT, StringRef CPU); 61 62/// createARMELFObjectWriter - Construct an ELF Mach-O object writer. 63MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS, 64 uint8_t OSABI); 65 66/// createARMMachObjectWriter - Construct an ARM Mach-O object writer. 67MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS, 68 bool Is64Bit, 69 uint32_t CPUType, 70 uint32_t CPUSubtype); 71 72 73/// createARMMachORelocationInfo - Construct ARM Mach-O relocation info. 74MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx); 75} // End llvm namespace 76 77// Defines symbolic names for ARM registers. This defines a mapping from 78// register name to register number. 79// 80#define GET_REGINFO_ENUM 81#include "ARMGenRegisterInfo.inc" 82 83// Defines symbolic names for the ARM instructions. 84// 85#define GET_INSTRINFO_ENUM 86#include "ARMGenInstrInfo.inc" 87 88#define GET_SUBTARGETINFO_ENUM 89#include "ARMGenSubtargetInfo.inc" 90 91#endif 92