cirrus.md revision 132718
1132718Skan;; Cirrus EP9312 "Maverick" ARM floating point co-processor description. 2132718Skan;; Copyright (C) 2003 Free Software Foundation, Inc. 3132718Skan;; Contributed by Red Hat. 4132718Skan;; Written by Aldy Hernandez (aldyh@redhat.com) 5132718Skan 6132718Skan;; This file is part of GCC. 7132718Skan 8132718Skan;; GCC is free software; you can redistribute it and/or modify 9132718Skan;; it under the terms of the GNU General Public License as published by 10132718Skan;; the Free Software Foundation; either version 2, or (at your option) 11132718Skan;; any later version. 12132718Skan 13132718Skan;; GCC is distributed in the hope that it will be useful, 14132718Skan;; but WITHOUT ANY WARRANTY; without even the implied warranty of 15132718Skan;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16132718Skan;; GNU General Public License for more details. 17132718Skan 18132718Skan;; You should have received a copy of the GNU General Public License 19132718Skan;; along with GCC; see the file COPYING. If not, write to 20132718Skan;; the Free Software Foundation, 59 Temple Place - Suite 330, 21132718Skan;; Boston, MA 02111-1307, USA. 22132718Skan 23132718Skan 24132718Skan; Cirrus types for invalid insn combinations 25132718Skan; not Not a cirrus insn 26132718Skan; normal Any Cirrus insn not covered by the special cases below 27132718Skan; double cfldrd, cfldr64, cfstrd, cfstr64 28132718Skan; compare cfcmps, cfcmpd, cfcmp32, cfcmp64 29132718Skan; move cfmvdlr, cfmvdhr, cfmvsr, cfmv64lr, cfmv64hr 30132718Skan(define_attr "cirrus" "not,normal,double,compare,move" (const_string "not")) 31132718Skan 32132718Skan 33132718Skan(define_insn "cirrus_adddi3" 34132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 35132718Skan (plus:DI (match_operand:DI 1 "cirrus_fp_register" "v") 36132718Skan (match_operand:DI 2 "cirrus_fp_register" "v")))] 37132718Skan "TARGET_ARM && TARGET_CIRRUS" 38132718Skan "cfadd64%?\\t%V0, %V1, %V2" 39132718Skan [(set_attr "type" "mav_farith") 40132718Skan (set_attr "cirrus" "normal")] 41132718Skan) 42132718Skan 43132718Skan(define_insn "*cirrus_addsi3" 44132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 45132718Skan (plus:SI (match_operand:SI 1 "cirrus_fp_register" "v") 46132718Skan (match_operand:SI 2 "cirrus_fp_register" "v")))] 47132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 48132718Skan "cfadd32%?\\t%V0, %V1, %V2" 49132718Skan [(set_attr "type" "mav_farith") 50132718Skan (set_attr "cirrus" "normal")] 51132718Skan) 52132718Skan 53132718Skan(define_insn "*cirrus_addsf3" 54132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 55132718Skan (plus:SF (match_operand:SF 1 "cirrus_fp_register" "v") 56132718Skan (match_operand:SF 2 "cirrus_fp_register" "v")))] 57132718Skan "TARGET_ARM && TARGET_CIRRUS" 58132718Skan "cfadds%?\\t%V0, %V1, %V2" 59132718Skan [(set_attr "type" "mav_farith") 60132718Skan (set_attr "cirrus" "normal")] 61132718Skan) 62132718Skan 63132718Skan(define_insn "*cirrus_adddf3" 64132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 65132718Skan (plus:DF (match_operand:DF 1 "cirrus_fp_register" "v") 66132718Skan (match_operand:DF 2 "cirrus_fp_register" "v")))] 67132718Skan "TARGET_ARM && TARGET_CIRRUS" 68132718Skan "cfaddd%?\\t%V0, %V1, %V2" 69132718Skan [(set_attr "type" "mav_farith") 70132718Skan (set_attr "cirrus" "normal")] 71132718Skan) 72132718Skan 73132718Skan(define_insn "cirrus_subdi3" 74132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 75132718Skan (minus:DI (match_operand:DI 1 "cirrus_fp_register" "v") 76132718Skan (match_operand:DI 2 "cirrus_fp_register" "v")))] 77132718Skan "TARGET_ARM && TARGET_CIRRUS" 78132718Skan "cfsub64%?\\t%V0, %V1, %V2" 79132718Skan [(set_attr "type" "mav_farith") 80132718Skan (set_attr "cirrus" "normal")] 81132718Skan) 82132718Skan 83132718Skan(define_insn "*cirrus_subsi3_insn" 84132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 85132718Skan (minus:SI (match_operand:SI 1 "cirrus_fp_register" "v") 86132718Skan (match_operand:SI 2 "cirrus_fp_register" "v")))] 87132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 88132718Skan "cfsub32%?\\t%V0, %V1, %V2" 89132718Skan [(set_attr "type" "mav_farith") 90132718Skan (set_attr "cirrus" "normal")] 91132718Skan) 92132718Skan 93132718Skan(define_insn "*cirrus_subsf3" 94132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 95132718Skan (minus:SF (match_operand:SF 1 "cirrus_fp_register" "v") 96132718Skan (match_operand:SF 2 "cirrus_fp_register" "v")))] 97132718Skan "TARGET_ARM && TARGET_CIRRUS" 98132718Skan "cfsubs%?\\t%V0, %V1, %V2" 99132718Skan [(set_attr "type" "mav_farith") 100132718Skan (set_attr "cirrus" "normal")] 101132718Skan) 102132718Skan 103132718Skan(define_insn "*cirrus_subdf3" 104132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 105132718Skan (minus:DF (match_operand:DF 1 "cirrus_fp_register" "v") 106132718Skan (match_operand:DF 2 "cirrus_fp_register" "v")))] 107132718Skan "TARGET_ARM && TARGET_CIRRUS" 108132718Skan "cfsubd%?\\t%V0, %V1, %V2" 109132718Skan [(set_attr "type" "mav_farith") 110132718Skan (set_attr "cirrus" "normal")] 111132718Skan) 112132718Skan 113132718Skan(define_insn "*cirrus_mulsi3" 114132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 115132718Skan (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v") 116132718Skan (match_operand:SI 1 "cirrus_fp_register" "v")))] 117132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 118132718Skan "cfmul32%?\\t%V0, %V1, %V2" 119132718Skan [(set_attr "type" "mav_farith") 120132718Skan (set_attr "cirrus" "normal")] 121132718Skan) 122132718Skan 123132718Skan(define_insn "muldi3" 124132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 125132718Skan (mult:DI (match_operand:DI 2 "cirrus_fp_register" "v") 126132718Skan (match_operand:DI 1 "cirrus_fp_register" "v")))] 127132718Skan "TARGET_ARM && TARGET_CIRRUS" 128132718Skan "cfmul64%?\\t%V0, %V1, %V2" 129132718Skan [(set_attr "type" "mav_dmult") 130132718Skan (set_attr "cirrus" "normal")] 131132718Skan) 132132718Skan 133132718Skan(define_insn "*cirrus_mulsi3addsi" 134132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 135132718Skan (plus:SI 136132718Skan (mult:SI (match_operand:SI 1 "cirrus_fp_register" "v") 137132718Skan (match_operand:SI 2 "cirrus_fp_register" "v")) 138132718Skan (match_operand:SI 3 "cirrus_fp_register" "0")))] 139132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 140132718Skan "cfmac32%?\\t%V0, %V1, %V2" 141132718Skan [(set_attr "type" "mav_farith") 142132718Skan (set_attr "cirrus" "normal")] 143132718Skan) 144132718Skan 145132718Skan;; Cirrus SI multiply-subtract 146132718Skan(define_insn "*cirrus_mulsi3subsi" 147132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 148132718Skan (minus:SI 149132718Skan (match_operand:SI 1 "cirrus_fp_register" "0") 150132718Skan (mult:SI (match_operand:SI 2 "cirrus_fp_register" "v") 151132718Skan (match_operand:SI 3 "cirrus_fp_register" "v"))))] 152132718Skan "0 && TARGET_ARM && TARGET_CIRRUS" 153132718Skan "cfmsc32%?\\t%V0, %V2, %V3" 154132718Skan [(set_attr "type" "mav_farith") 155132718Skan (set_attr "cirrus" "normal")] 156132718Skan) 157132718Skan 158132718Skan(define_insn "*cirrus_mulsf3" 159132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 160132718Skan (mult:SF (match_operand:SF 1 "cirrus_fp_register" "v") 161132718Skan (match_operand:SF 2 "cirrus_fp_register" "v")))] 162132718Skan "TARGET_ARM && TARGET_CIRRUS" 163132718Skan "cfmuls%?\\t%V0, %V1, %V2" 164132718Skan [(set_attr "type" "mav_farith") 165132718Skan (set_attr "cirrus" "normal")] 166132718Skan) 167132718Skan 168132718Skan(define_insn "*cirrus_muldf3" 169132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 170132718Skan (mult:DF (match_operand:DF 1 "cirrus_fp_register" "v") 171132718Skan (match_operand:DF 2 "cirrus_fp_register" "v")))] 172132718Skan "TARGET_ARM && TARGET_CIRRUS" 173132718Skan "cfmuld%?\\t%V0, %V1, %V2" 174132718Skan [(set_attr "type" "mav_dmult") 175132718Skan (set_attr "cirrus" "normal")] 176132718Skan) 177132718Skan 178132718Skan(define_insn "cirrus_ashl_const" 179132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 180132718Skan (ashift:SI (match_operand:SI 1 "cirrus_fp_register" "v") 181132718Skan (match_operand:SI 2 "cirrus_shift_const" "")))] 182132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 183132718Skan "cfsh32%?\\t%V0, %V1, #%s2" 184132718Skan [(set_attr "cirrus" "normal")] 185132718Skan) 186132718Skan 187132718Skan(define_insn "cirrus_ashiftrt_const" 188132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 189132718Skan (ashiftrt:SI (match_operand:SI 1 "cirrus_fp_register" "v") 190132718Skan (match_operand:SI 2 "cirrus_shift_const" "")))] 191132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 192132718Skan "cfsh32%?\\t%V0, %V1, #-%s2" 193132718Skan [(set_attr "cirrus" "normal")] 194132718Skan) 195132718Skan 196132718Skan(define_insn "cirrus_ashlsi3" 197132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 198132718Skan (ashift:SI (match_operand:SI 1 "cirrus_fp_register" "v") 199132718Skan (match_operand:SI 2 "register_operand" "r")))] 200132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 201132718Skan "cfrshl32%?\\t%V1, %V0, %s2" 202132718Skan [(set_attr "cirrus" "normal")] 203132718Skan) 204132718Skan 205132718Skan(define_insn "ashldi3_cirrus" 206132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 207132718Skan (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v") 208132718Skan (match_operand:SI 2 "register_operand" "r")))] 209132718Skan "TARGET_ARM && TARGET_CIRRUS" 210132718Skan "cfrshl64%?\\t%V1, %V0, %s2" 211132718Skan [(set_attr "cirrus" "normal")] 212132718Skan) 213132718Skan 214132718Skan(define_insn "cirrus_ashldi_const" 215132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 216132718Skan (ashift:DI (match_operand:DI 1 "cirrus_fp_register" "v") 217132718Skan (match_operand:SI 2 "cirrus_shift_const" "")))] 218132718Skan "TARGET_ARM && TARGET_CIRRUS" 219132718Skan "cfsh64%?\\t%V0, %V1, #%s2" 220132718Skan [(set_attr "cirrus" "normal")] 221132718Skan) 222132718Skan 223132718Skan(define_insn "cirrus_ashiftrtdi_const" 224132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 225132718Skan (ashiftrt:DI (match_operand:DI 1 "cirrus_fp_register" "v") 226132718Skan (match_operand:SI 2 "cirrus_shift_const" "")))] 227132718Skan "TARGET_ARM && TARGET_CIRRUS" 228132718Skan "cfsh64%?\\t%V0, %V1, #-%s2" 229132718Skan [(set_attr "cirrus" "normal")] 230132718Skan) 231132718Skan 232132718Skan(define_insn "*cirrus_absdi2" 233132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 234132718Skan (abs:DI (match_operand:DI 1 "cirrus_fp_register" "v")))] 235132718Skan "TARGET_ARM && TARGET_CIRRUS" 236132718Skan "cfabs64%?\\t%V0, %V1" 237132718Skan [(set_attr "cirrus" "normal")] 238132718Skan) 239132718Skan 240132718Skan;; This doesn't really clobber ``cc''. Fixme: aldyh. 241132718Skan(define_insn "*cirrus_negdi2" 242132718Skan [(set (match_operand:DI 0 "cirrus_fp_register" "=v") 243132718Skan (neg:DI (match_operand:DI 1 "cirrus_fp_register" "v"))) 244132718Skan (clobber (reg:CC CC_REGNUM))] 245132718Skan "TARGET_ARM && TARGET_CIRRUS" 246132718Skan "cfneg64%?\\t%V0, %V1" 247132718Skan [(set_attr "cirrus" "normal")] 248132718Skan) 249132718Skan 250132718Skan(define_insn "*cirrus_negsi2" 251132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 252132718Skan (neg:SI (match_operand:SI 1 "cirrus_fp_register" "v")))] 253132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 254132718Skan "cfneg32%?\\t%V0, %V1" 255132718Skan [(set_attr "cirrus" "normal")] 256132718Skan) 257132718Skan 258132718Skan(define_insn "*cirrus_negsf2" 259132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 260132718Skan (neg:SF (match_operand:SF 1 "cirrus_fp_register" "v")))] 261132718Skan "TARGET_ARM && TARGET_CIRRUS" 262132718Skan "cfnegs%?\\t%V0, %V1" 263132718Skan [(set_attr "cirrus" "normal")] 264132718Skan) 265132718Skan 266132718Skan(define_insn "*cirrus_negdf2" 267132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 268132718Skan (neg:DF (match_operand:DF 1 "cirrus_fp_register" "v")))] 269132718Skan "TARGET_ARM && TARGET_CIRRUS" 270132718Skan "cfnegd%?\\t%V0, %V1" 271132718Skan [(set_attr "cirrus" "normal")] 272132718Skan) 273132718Skan 274132718Skan;; This doesn't really clobber the condition codes either. 275132718Skan(define_insn "*cirrus_abssi2" 276132718Skan [(set (match_operand:SI 0 "cirrus_fp_register" "=v") 277132718Skan (abs:SI (match_operand:SI 1 "cirrus_fp_register" "v"))) 278132718Skan (clobber (reg:CC CC_REGNUM))] 279132718Skan "TARGET_ARM && TARGET_CIRRUS && 0" 280132718Skan "cfabs32%?\\t%V0, %V1" 281132718Skan [(set_attr "cirrus" "normal")] 282132718Skan) 283132718Skan 284132718Skan(define_insn "*cirrus_abssf2" 285132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 286132718Skan (abs:SF (match_operand:SF 1 "cirrus_fp_register" "v")))] 287132718Skan "TARGET_ARM && TARGET_CIRRUS" 288132718Skan "cfabss%?\\t%V0, %V1" 289132718Skan [(set_attr "cirrus" "normal")] 290132718Skan) 291132718Skan 292132718Skan(define_insn "*cirrus_absdf2" 293132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 294132718Skan (abs:DF (match_operand:DF 1 "cirrus_fp_register" "v")))] 295132718Skan "TARGET_ARM && TARGET_CIRRUS" 296132718Skan "cfabsd%?\\t%V0, %V1" 297132718Skan [(set_attr "cirrus" "normal")] 298132718Skan) 299132718Skan 300132718Skan;; Convert Cirrus-SI to Cirrus-SF 301132718Skan(define_insn "cirrus_floatsisf2" 302132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 303132718Skan (float:SF (match_operand:SI 1 "s_register_operand" "r"))) 304132718Skan (clobber (match_scratch:DF 2 "=v"))] 305132718Skan "TARGET_ARM && TARGET_CIRRUS" 306132718Skan "cfmv64lr%?\\t%Z2, %1\;cfcvt32s%?\\t%V0, %Y2" 307132718Skan [(set_attr "length" "8") 308132718Skan (set_attr "cirrus" "move")] 309132718Skan) 310132718Skan 311132718Skan(define_insn "cirrus_floatsidf2" 312132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 313132718Skan (float:DF (match_operand:SI 1 "s_register_operand" "r"))) 314132718Skan (clobber (match_scratch:DF 2 "=v"))] 315132718Skan "TARGET_ARM && TARGET_CIRRUS" 316132718Skan "cfmv64lr%?\\t%Z2, %1\;cfcvt32d%?\\t%V0, %Y2" 317132718Skan [(set_attr "length" "8") 318132718Skan (set_attr "cirrus" "move")] 319132718Skan) 320132718Skan 321132718Skan(define_insn "floatdisf2" 322132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 323132718Skan (float:SF (match_operand:DI 1 "cirrus_fp_register" "v")))] 324132718Skan "TARGET_ARM && TARGET_CIRRUS" 325132718Skan "cfcvt64s%?\\t%V0, %V1" 326132718Skan [(set_attr "cirrus" "normal")]) 327132718Skan 328132718Skan(define_insn "floatdidf2" 329132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 330132718Skan (float:DF (match_operand:DI 1 "cirrus_fp_register" "v")))] 331132718Skan "TARGET_ARM && TARGET_CIRRUS" 332132718Skan "cfcvt64d%?\\t%V0, %V1" 333132718Skan [(set_attr "cirrus" "normal")]) 334132718Skan 335132718Skan(define_insn "cirrus_truncsfsi2" 336132718Skan [(set (match_operand:SI 0 "s_register_operand" "=r") 337132718Skan (fix:SI (fix:SF (match_operand:SF 1 "cirrus_fp_register" "v")))) 338132718Skan (clobber (match_scratch:DF 2 "=v"))] 339132718Skan "TARGET_ARM && TARGET_CIRRUS" 340132718Skan "cftruncs32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2" 341132718Skan [(set_attr "length" "8") 342132718Skan (set_attr "cirrus" "normal")] 343132718Skan) 344132718Skan 345132718Skan(define_insn "cirrus_truncdfsi2" 346132718Skan [(set (match_operand:SI 0 "s_register_operand" "=r") 347132718Skan (fix:SI (fix:DF (match_operand:DF 1 "cirrus_fp_register" "v")))) 348132718Skan (clobber (match_scratch:DF 2 "=v"))] 349132718Skan "TARGET_ARM && TARGET_CIRRUS" 350132718Skan "cftruncd32%?\\t%Y2, %V1\;cfmvr64l%?\\t%0, %Z2" 351132718Skan [(set_attr "length" "8")] 352132718Skan) 353132718Skan 354132718Skan(define_insn "*cirrus_truncdfsf2" 355132718Skan [(set (match_operand:SF 0 "cirrus_fp_register" "=v") 356132718Skan (float_truncate:SF 357132718Skan (match_operand:DF 1 "cirrus_fp_register" "v")))] 358132718Skan "TARGET_ARM && TARGET_CIRRUS" 359132718Skan "cfcvtds%?\\t%V0, %V1" 360132718Skan [(set_attr "cirrus" "normal")] 361132718Skan) 362132718Skan 363132718Skan(define_insn "*cirrus_extendsfdf2" 364132718Skan [(set (match_operand:DF 0 "cirrus_fp_register" "=v") 365132718Skan (float_extend:DF (match_operand:SF 1 "cirrus_fp_register" "v")))] 366132718Skan "TARGET_ARM && TARGET_CIRRUS" 367132718Skan "cfcvtsd%?\\t%V0, %V1" 368132718Skan [(set_attr "cirrus" "normal")] 369132718Skan) 370132718Skan 371132718Skan(define_insn "*cirrus_arm_movdi" 372132718Skan [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,o<>,v,r,v,m,v") 373132718Skan (match_operand:DI 1 "di_operand" "rIK,mi,r,r,v,m,v,v"))] 374132718Skan "TARGET_ARM && TARGET_CIRRUS" 375132718Skan "* 376132718Skan { 377132718Skan switch (which_alternative) 378132718Skan { 379132718Skan case 0: 380132718Skan case 1: 381132718Skan case 2: 382132718Skan return (output_move_double (operands)); 383132718Skan 384132718Skan case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\"; 385132718Skan case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\"; 386132718Skan 387132718Skan case 5: return \"cfldr64%?\\t%V0, %1\"; 388132718Skan case 6: return \"cfstr64%?\\t%V1, %0\"; 389132718Skan 390132718Skan /* Shifting by 0 will just copy %1 into %0. */ 391132718Skan case 7: return \"cfsh64%?\\t%V0, %V1, #0\"; 392132718Skan 393132718Skan default: abort (); 394132718Skan } 395132718Skan }" 396132718Skan [(set_attr "length" " 8, 8, 8, 8, 8, 4, 4, 4") 397132718Skan (set_attr "type" " *,load,store2, *, *, load,store2, *") 398132718Skan (set_attr "pool_range" " *,1020, *, *, *, *, *, *") 399132718Skan (set_attr "neg_pool_range" " *,1012, *, *, *, *, *, *") 400132718Skan (set_attr "cirrus" "not, not, not,move,normal,double,double,normal")] 401132718Skan) 402132718Skan 403132718Skan;; Cirrus SI values have been outlawed. Look in arm.h for the comment 404132718Skan;; on HARD_REGNO_MODE_OK. 405132718Skan 406132718Skan(define_insn "*cirrus_arm_movsi_insn" 407132718Skan [(set (match_operand:SI 0 "general_operand" "=r,r,r,m,*v,r,*v,T,*v") 408132718Skan (match_operand:SI 1 "general_operand" "rI,K,mi,r,r,*v,T,*v,*v"))] 409132718Skan "TARGET_ARM && TARGET_CIRRUS && 0 410132718Skan && (register_operand (operands[0], SImode) 411132718Skan || register_operand (operands[1], SImode))" 412132718Skan "@ 413132718Skan mov%?\\t%0, %1 414132718Skan mvn%?\\t%0, #%B1 415132718Skan ldr%?\\t%0, %1 416132718Skan str%?\\t%1, %0 417132718Skan cfmv64lr%?\\t%Z0, %1 418132718Skan cfmvr64l%?\\t%0, %Z1 419132718Skan cfldr32%?\\t%V0, %1 420132718Skan cfstr32%?\\t%V1, %0 421132718Skan cfsh32%?\\t%V0, %V1, #0" 422132718Skan [(set_attr "type" "*, *, load,store1, *, *, load,store1, *") 423132718Skan (set_attr "pool_range" "*, *, 4096, *, *, *, 1024, *, *") 424132718Skan (set_attr "neg_pool_range" "*, *, 4084, *, *, *, 1012, *, *") 425132718Skan (set_attr "cirrus" "not,not, not, not,move,normal,normal,normal,normal")] 426132718Skan) 427132718Skan 428132718Skan(define_insn "*cirrus_movsf_hard_insn" 429132718Skan [(set (match_operand:SF 0 "nonimmediate_operand" "=v,v,v,r,m,r,r,m") 430132718Skan (match_operand:SF 1 "general_operand" "v,m,r,v,v,r,mE,r"))] 431132718Skan "TARGET_ARM && TARGET_CIRRUS 432132718Skan && (GET_CODE (operands[0]) != MEM 433132718Skan || register_operand (operands[1], SFmode))" 434132718Skan "@ 435132718Skan cfcpys%?\\t%V0, %V1 436132718Skan cfldrs%?\\t%V0, %1 437132718Skan cfmvsr%?\\t%V0, %1 438132718Skan cfmvrs%?\\t%0, %V1 439132718Skan cfstrs%?\\t%V1, %0 440132718Skan mov%?\\t%0, %1 441132718Skan ldr%?\\t%0, %1\\t%@ float 442132718Skan str%?\\t%1, %0\\t%@ float" 443132718Skan [(set_attr "length" " *, *, *, *, *, 4, 4, 4") 444132718Skan (set_attr "type" " *, load, *, *,store1, *,load,store1") 445132718Skan (set_attr "pool_range" " *, *, *, *, *, *,4096, *") 446132718Skan (set_attr "neg_pool_range" " *, *, *, *, *, *,4084, *") 447132718Skan (set_attr "cirrus" "normal,normal,move,normal,normal,not, not, not")] 448132718Skan) 449132718Skan 450132718Skan(define_insn "*cirrus_movdf_hard_insn" 451132718Skan [(set (match_operand:DF 0 "nonimmediate_operand" "=r,Q,r,m,r,v,v,v,r,m") 452132718Skan (match_operand:DF 1 "general_operand" "Q,r,r,r,mF,v,m,r,v,v"))] 453132718Skan "TARGET_ARM 454132718Skan && TARGET_CIRRUS 455132718Skan && (GET_CODE (operands[0]) != MEM 456132718Skan || register_operand (operands[1], DFmode))" 457132718Skan "* 458132718Skan { 459132718Skan switch (which_alternative) 460132718Skan { 461132718Skan case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\"; 462132718Skan case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\"; 463132718Skan case 2: case 3: case 4: return output_move_double (operands); 464132718Skan case 5: return \"cfcpyd%?\\t%V0, %V1\"; 465132718Skan case 6: return \"cfldrd%?\\t%V0, %1\"; 466132718Skan case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\"; 467132718Skan case 8: return \"cfmvrdl%?\\t%Q0, %V1\;cfmvrdh%?\\t%R0, %V1\"; 468132718Skan case 9: return \"cfstrd%?\\t%V1, %0\"; 469132718Skan default: abort (); 470132718Skan } 471132718Skan }" 472132718Skan [(set_attr "type" "load,store2, *,store2,load, *, load, *, *,store2") 473132718Skan (set_attr "length" " 4, 4, 8, 8, 8, 4, 4, 8, 8, 4") 474132718Skan (set_attr "pool_range" " *, *, *, *, 252, *, *, *, *, *") 475132718Skan (set_attr "neg_pool_range" " *, *, *, *, 244, *, *, *, *, *") 476132718Skan (set_attr "cirrus" " not, not,not, not, not,normal,double,move,normal,double")] 477132718Skan) 478132718Skan 479