12006-12-30 H.J. Lu <hongjiu.lu@intel.com> 2 3 * config/tc-i386.h (ShiftCount): Fix a comment typo. 4 52006-12-30 H.J. Lu <hongjiu.lu@intel.com> 6 7 * config/tc-i386.c (md_show_usage): Mention --32/--64. 8 92006-12-29 H.J. Lu <hongjiu.lu@intel.com> 10 11 * config/tc-i386.c (build_modrm_byte): Handle shift count 12 register with 3 operands. 13 142006-12-28 H.J. Lu <hongjiu.lu@intel.com> 15 16 * config/tc-i386.c (process_operands): Check i.reg_operands 17 and increment i.operands when adding a register operand. 18 (build_modrm_byte): Fix 4 operand instruction handling. 19 202006-12-27 H.J. Lu <hongjiu.lu@intel.com> 21 22 * config/tc-i386.c (disp_expressions): Use MAX_MEMORY_OPERANDS 23 for array size instead of 2. 24 (im_expressions): Use MAX_IMMEDIATE_OPERANDS for for array size 25 instead of 2. 26 (i386_immediate): Update immediate operand overflow error 27 message. 28 (i386_displacement): Check displacement operand overflow. 29 302006-12-27 H.J. Lu <hongjiu.lu@intel.com> 31 32 * config/tc-i386.c: Document tc-i386.c, not i386.c. 33 342006-12-27 Kazu Hirata <kazu@codesourcery.com> 35 36 * config/m68k-parse.h (m68k_register): Add CAC and MBB. 37 * config/tc-m68k.c (fido_ctrl): New. 38 (m68k_archs): Use fido_ctrl for -mfidoa. 39 (m68k_cpus): Use fido_ctrl on fido-*-*. 40 (m68k_ip): Add support for CAC and MBB. 41 (init_table): Add CAC and MBB. 42 432006-12-26 H.J. Lu <hongjiu.lu@intel.com> 44 45 * config/tc-i386.c (i386_immediate): Remove prototype. 46 472006-12-25 Kazu Hirata <kazu@codesourcery.com> 48 49 * config/tc-m68k.c (cpu_of_arch): Add fido. 50 (m68k_archs, m68k_cpu): Add entries for fido. 51 (m68k_elf_final_processing): Handle EF_M68K_CPU32_FIDO_A. 52 532006-12-25 Mei Ligang <ligang@sunnorth.com.cn> 54 55 * config/tc-score.c (build_lw_pic): Rename as build_lwst_pic. 56 Delete the code handling large constant for PIC. 57 Modify some comments. 58 (score_relax_frag): Decrease insn_addr in certain situation. 59 (s_score_cprestore): Change .cprestore syntax from ".cprestore offset" 60 to ".cprestore reg, offset". 61 622006-12-23 Kazu Hirata <kazu@codesourcery.com> 63 64 * configure.tgt: Recognize fido. 65 662006-12-15 H.J. Lu <hongjiu.lu@intel.com> 67 68 * config/tc-i386.c: Add a blank line bewteen function bodies. 69 702006-12-15 H.J. Lu <hongjiu.lu@intel.com> 71 72 * config/tc-i386.c (build_modrm_byte): Reformat to 72 columns. 73 742006-12-14 Daniel Jacobowitz <dan@codesourcery.com> 75 76 * Makefile.am (YFLAGS): Define. 77 * Makefile.in: Regenerated. 78 792006-12-14 H.J. Lu <hongjiu.lu@intel.com> 80 81 * config/tc-i386.c (match_template): Simplify 3 and 4 operand 82 match. 83 842006-12-13 H.J. Lu <hongjiu.lu@intel.com> 85 86 * config/tc-i386.c (build_modrm_byte): Set the Operand_PCrel 87 bit only. 88 892006-12-13 H.J. Lu <hongjiu.lu@intel.com> 90 91 * config/tc-i386.c (match_template): Use a for loop to set 92 operand_types array. 93 942006-12-13 H.J. Lu <hongjiu.lu@intel.com> 95 96 PR gas/3712 97 * config/tc-i386.c (match_template): Use MAX_OPERANDS for the 98 number of operands. Issue an error if MAX_OPERANDS != 4. Add 99 the 4th operand check. 100 1012006-12-13 Paul Brook <paul@codesourcery.com> 102 103 * config/tc-arm.c (arm_arch_option_table): Add v7-{a,r,m}. 104 * doc/c-arm.texi: Fix spelling of ARMv7 profile variants. 105 1062006-12-12 H.J. Lu <hongjiu.lu@intel.com> 107 108 * config/tc-i386.h (WordMem): Document it for 64 bit memory 109 reference. 110 1112006-12-12 Daniel Jacobowitz <dan@codesourcery.com> 112 113 * doc/Makefile.am (as_TEXINFOS): Set. 114 (as.info as.dvi as.html): Delete rule. 115 * doc/Makefile.in: Regenerated. 116 1172006-12-11 Daniel Jacobowitz <dan@codesourcery.com> 118 119 * configure.in: Define GENINSRC_NEVER. 120 * doc/Makefile.am (as.info): Remove srcdir prefix. 121 (MAINTAINERCLEANFILES): Add info file. 122 (DISTCLEANFILES): Pretend to add info file. 123 * po/Make-in (.po.gmo): Put gmo files in objdir. 124 * configure, Makefile.in, doc/Makefile.in: Regenerated. 125 1262006-12-09 H.J. Lu <hongjiu.lu@intel.com> 127 128 * config/tc-i386.h (template): Use MAX_OPERANDS instead of 4 129 for operand_types array. 130 1312006-12-08 Christian Groessler <chris@groessler.org> 132 133 * config/tc-z8k.c (whatreg): Add comment describing function. 134 Return NULL if symbol name characters follow the register number. 135 (parse_reg): Use NULL instead of 0 for pointer values. Stop 136 processing if whatreg returned NULL. 137 1382006-12-07 Kazu Hirata <kazu@codesourcery.com> 139 140 * config/tc-m68k.c: Update uses of EF_M68K_*. 141 1422006-12-06 H.J. Lu <hjl@gnu.org> 143 144 * config/tc-i386.h: Change the prefix order to SEG_PREFIX, 145 ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX. 146 1472006-12-02 Jakub Jelinek <jakub@redhat.com> 148 149 PR gas/3607 150 * subsegs.c (subseg_set_rest): Clear frch_cfi_data field. 151 1522006-12-01 Paul Brook <paul@codesourcery.com> 153 154 * config/tc-arm.c (arm_force_relocation): Return 1 for relocs against 155 function symbols. 156 1572006-11-29 Paul Brook <paul@codesourcery.com> 158 159 * config/tc-arm.c (arm_is_eabi): New function. 160 * config/tc-arm.h (arm_is_eabi): New prototype. 161 (THUMB_IS_FUNC): Use ELF function type for EABI objects. 162 * doc/c-arm.texi (.thumb_func): Update documentation. 163 1642006-11-29 Paul Brook <paul@codesourcery.com> 165 166 * config/tc-arm.c (do_vfp_sp_const, do_vfp_dp_const): Fix operans 167 encoding. 168 1692006-11-27 Sterling Augustine <sterling@tensilica.com> 170 171 * config/tc-xtensa.c (xtensa_sanity_check): Check for RELAX_IMMED 172 as the first slot_subtype, not the frag subtype. 173 1742006-11-27 Bob Wilson <bob.wilson@acm.org> 175 176 * config/tc-xtensa.c (XSHAL_ABI): Add default definition. 177 (directive_state): Disable scheduling by default. 178 (xtensa_add_config_info): New. 179 (xtensa_end): Call xtensa_add_config_info. 180 1812006-11-27 Eric Botcazou <ebotcazou@adacore.com> 182 183 * config/tc-sparc.c (tc_gen_reloc): Turn aligned relocs into 184 their unaligned counterparts in debugging sections. 185 1862006-11-24 Alan Modra <amodra@bigpond.net.au> 187 188 * config/tc-spu.c (md_pseudo_table): Add eqv and .eqv. 189 1902006-11-22 Daniel Jacobowitz <dan@codesourcery.com> 191 192 * config/tc-arm.h (md_cons_align): Define. 193 (mapping_state): New prototype. 194 * config/tc-arm.c (mapping_state): Make global. 195 1962006-11-22 Alan Modra <amodra@bigpond.net.au> 197 198 * config/obj-elf.c (obj_elf_version): Use memcpy rather than strcpy. 199 2002006-11-16 Mei ligang <ligang@sunnorth.com.cn> 201 202 * config/tc-score.c (score_relax_frag): If next frag contains 32 bit 203 branch instruction, handle it specially. 204 (score_insns): Modify 32 bit branch instruction. 205 2062006-11-16 Alan Modra <amodra@bigpond.net.au> 207 208 * symbols.c (resolve_symbol_value): Formatting. 209 2102006-11-15 Jan Beulich <jbeulich@novell.com> 211 212 PR/3469 213 * symbols.c (symbol_clone): Mark symbol ending up not on symbol 214 chain by linking it to itself. 215 (resolve_symbol_value): Also check symbol_shadow_p(). 216 (symbol_shadow_p): New. 217 * symbols.h (symbol_shadow_p): Declare. 218 2192006-11-12 Mark Shinwell <shinwell@codesourcery.com> 220 221 * config/tc-arm.c (do_t_czb): Rename to do_t_cbz. 222 (insns): Adjust accordingly. 223 (md_apply_fix): Alter comments to use CBZ instead of CZB. 224 2252006-11-10 Pedro Alves <pedro_alves@portugalmail.pt> 226 227 * config/tc-arm.c (arm_fix_adjustable) [OBJ_COFF]: Delete. 228 (arm_fix_adjustable) [OBJ_ELF]: Use it on coff targets too. 229 2302006-11-10 Nick Clifton <nickc@redhat.com> 231 232 PR gas/3456: 233 * config/obj-elf.c (obj_elf_version): Do not include the name 234 field's padding in the namesz value. 235 2362006-11-09 Thiemo Seufer <ths@mips.com> 237 238 * config/tc-mips.c: Fix outdated comment. 239 2402006-11-08 H.J. Lu <hongjiu.lu@intel.com> 241 242 * config/tc-i386.h (CpuPNI): Removed. 243 (CpuUnknownFlags): Replace CpuPNI with CpuSSE3. 244 * config/tc-i386.c (md_assemble): Likewise. 245 2462006-11-08 Alan Modra <amodra@bigpond.net.au> 247 248 * symbols.c (symbol_create, symbol_clone): Don't set udata.p. 249 2502006-11-06 David Daney <ddaney@avtrex.com> 251 252 * config/tc-mips.c (pic_need_relax): Return true for section symbols. 253 2542006-11-06 Thiemo Seufer <ths@mips.com> 255 256 * doc/c-mips.texi (-march): Document sb1a. 257 2582006-11-06 Thiemo Seufer <ths@mips.com> 259 260 * config/tc-mips.c (mips_cpu_info_table): Remove 24k/24ke aliases. 261 34k always has DSP ASE. 262 2632006-11-03 Thiemo Seufer <ths@mips.com> 264 265 * config/tc-mips.c (md_pcrel_from_section): Disallow PC relative 266 MIPS16 instructions referencing other sections, unless they are 267 external branches. 268 2692006-11-03 Thiemo Seufer <ths@mips.com> 270 271 * config/tc-mips.c (mips_cpu_info_table): The 25Kf is a MIPS64 272 release 1 CPU. 273 2742006-11-03 Jakub Jelinek <jakub@redhat.com> 275 276 * dw2gencfi.c (struct fde_entry): Add per_encoding, lsda_encoding, 277 personality and lsda. 278 (struct cie_entry): Add per_encoding, lsda_encoding and personality. 279 (alloc_fde_entry): Initialize per_encoding and lsda_encoding. 280 (cfi_pseudo_table): Handle .cfi_personality and .cfi_lsda. 281 (dot_cfi_personality, dot_cfi_lsda, encoding_size): New functions. 282 (output_cie): Output personality including its encoding and LSDA encoding. 283 (output_fde): Output LSDA. 284 (select_cie_for_fde): Don't share CIE if personality, its encoding or 285 LSDA encoding are different. Copy the 3 fields from fde_entry to 286 cie_entry. 287 * doc/as.texinfo (.cfi_personality, .cfi_lsda): Document. 288 289 * subsegs.h (struct frchain): Add frch_cfi_data field. 290 * dw2gencfi.c: Include subsegs.h. 291 (cur_fde_data, last_address, cur_cfa_offset, cfa_save_stack): Removed. 292 (struct frch_cfi_data): New type. 293 (unused_cfi_data): New variable. 294 (alloc_fde_entry): Move cur_fde_data, last_address, cur_cfa_offset 295 and cfa_save_stack static vars into a structure pointed from 296 each frchain. 297 (alloc_cfi_insn_data, cfi_new_fde, cfi_end_fde, cfi_set_return_column, 298 cfi_add_advance_loc, cfi_add_CFA_def_cfa, cfi_add_CFA_def_cfa_offset, 299 cfi_add_CFA_remember_state, cfi_add_CFA_restore_state, dot_cfi, 300 dot_cfi_escape, dot_cfi_startproc, dot_cfi_endproc, cfi_finish): 301 Likewise. 302 3032006-11-02 Daniel Jacobowitz <dan@codesourcery.com> 304 305 * config/tc-h8300.c (build_bytes): Fix const warning. 306 3072006-11-01 Mei Ligang <ligang@sunnorth.com.cn> 308 309 * tc-score.c (do16_rdrs): Handle not! instruction especially. 310 3112006-10-31 Paul Brook <paul@codesourcery.com> 312 313 * config/tc-arm.c (arm_adjust_symtab): Don't use STT_ARM_16BIT 314 for EABIv4. 315 3162006-10-31 Paul Brook <paul@codesourcery.com> 317 318 gas/ 319 * config/tc-arm.c (object_arch): New variable. 320 (s_arm_object_arch): New function. 321 (md_pseudo_table): Add object_arch. 322 (aeabi_set_public_attributes): Obey object_arch. 323 * doc/c-arm.texi: Document .object_arch. 324 3252006-10-31 Mei Ligang <ligang@sunnorth.com.cn> 326 327 * tc-score.c (data_op2): Check invalid operands. 328 (my_get_expression): Const operand of some instructions can not be 329 symbol in assembly. 330 (get_insn_class_from_type): Handle instruction type Insn_internal. 331 (do_macro_ldst_label): Modify inst.type. 332 (Insn_PIC): Delete. 333 (data_op2): The immediate value in lw is 15 bit signed. 334 3352006-10-29 Randolph Chung <tausq@debian.org> 336 337 * config/tc-hppa.c (hppa_cfi_frame_initial_instructions) 338 (hppa_regname_to_dw2regnum): New funcions. 339 * config/tc-hppa.h [OBJ_ELF] (TARGET_USE_CFIPOP): Define. 340 (tc_cfi_frame_initial_instructions) 341 (tc_regname_to_dw2regnum): Define. 342 (hppa_cfi_frame_initial_instructions) 343 (hppa_regname_to_dw2regnum): Declare. 344 (DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN) 345 (DWARF2_CIE_DATA_ALIGNMENT): Define. 346 3472006-10-29 Nick Clifton <nickc@redhat.com> 348 349 * config/tc-spu.c (md_assemble): Cast printf string size parameter 350 to int in order to avoid a compiler warning. 351 3522006-10-27 Andrew Stubbs <andrew.stubbs@st.com> 353 354 * config/tc-sh.c (md_assemble): Define size of branches. 355 3562006-10-26 Ben Elliston <bje@au.ibm.com> 357 358 * dw2gencfi.c (cfi_add_CFA_offset): 359 Assert DWARF2_CIE_DATA_ALIGNMENT is non-zero. 360 361 * write.c (chain_frchains_together_1): Assert that this function 362 never returns a pointer to the auto variable `dummy'. 363 3642006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com> 365 Yukishige Shibata <shibata@rd.scei.sony.co.jp> 366 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp> 367 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp> 368 Alan Modra <amodra@bigpond.net.au> 369 370 * config/tc-spu.c: New file. 371 * config/tc-spu.h: New file. 372 * configure.tgt: Add SPU support. 373 * Makefile.am: Likewise. Run "make dep-am". 374 * Makefile.in: Regenerate. 375 * po/POTFILES.in: Regenerate. 376 3772006-10-25 Ben Elliston <bje@au.ibm.com> 378 379 * expr.c (expr): Replace O_add case in switch (op_left) explaining 380 why it can never occur. 381 3822006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com> 383 384 * doc/c-ppc.texi (-mcell): Document. 385 * config/tc-ppc.c (parse_cpu): Parse -mcell. 386 (md_show_usage): Document -mcell. 387 3882006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> 389 390 * doc/c-i386.texi : Document amdfam10,.sse4a and .abm in cpu_type. 391 3922006-10-23 Alan Modra <amodra@bigpond.net.au> 393 394 * config/tc-m68hc11.c (md_assemble): Quiet warning. 395 3962006-10-19 Mike Frysinger <vapier@gentoo.org> 397 398 * config/tc-i386.c (md_parse_option): Use CONST_STRNEQ. 399 (x86_64_section_letter): Likewise. 400 4012006-10-19 Mei Ligang <ligang@sunnorth.com.cn> 402 403 * config/tc-score.c (build_relax_frag): Compute correct 404 tc_frag_data.fixp. 405 4062006-10-18 Roy Marples <uberlord@gentoo.org> 407 408 * config/tc-sparc.c (md_parse_option): Treat any target starting with 409 elf32-sparc as a viable target for the -32 switch and any target 410 starting with elf64-sparc as a viable target for the -64 switch. 411 (sparc_target_format): For 64-bit ELF flavoured output use 412 ELF_TARGET_FORMAT64 while for 32-bit ELF flavoured output use 413 ELF_TARGET_FORMAT. 414 * config/tc-sparc.h (ELF_TARGET_FORMAT, ELF_TARGET_FORMAT64): Define. 415 4162006-10-17 H.J. Lu <hongjiu.lu@intel.com> 417 418 * configure: Regenerated. 419 4202006-10-16 Bernd Schmidt <bernd.schmidt@analog.com> 421 422 * input-scrub.c (input_scrub_next_buffer): Use TC_EOL_IN_INSN 423 in addition to testing for '\n'. 424 (TC_EOL_IN_INSN): Provide a default definition if necessary. 425 4262006-10-13 Sterling Augstine <sterling@tensilica.com> 427 428 * dwarf2dbg.c (out_debug_info): Use TC_DWARF2_EMIT_OFFSET to emit 429 a disjoint DW_AT range. 430 4312006-10-13 Mei Ligang <ligang@sunnorth.com.cn> 432 433 * config/tc-score.c (md_show_usage): Print -KPIC option usage. 434 4352006-10-08 Paul Brook <paul@codesourcery.com> 436 437 * config/tc-arm.c (parse_big_immediate): 64-bit host fix. 438 (parse_operands): Use parse_big_immediate for OP_NILO. 439 (neon_cmode_for_logic_imm): Try smaller element sizes. 440 (neon_cmode_for_move_imm): Ditto. 441 (do_neon_logic): Handle .i64 pseudo-op. 442 4432006-09-29 Alan Modra <amodra@bigpond.net.au> 444 445 * po/POTFILES.in: Regenerate. 446 4472006-09-28 H.J. Lu <hongjiu.lu@intel.com> 448 449 * config/tc-i386.h (CpuMNI): Renamed to ... 450 (CpuSSSE3): This. 451 (CpuUnknownFlags): Updated. 452 (processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE 453 and PROCESSOR_MEROM with PROCESSOR_CORE2. 454 * config/tc-i386.c: Updated. 455 * doc/c-i386.texi: Likewise. 456 457 * config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2". 458 4592006-09-28 Bridge Wu <mingqiao.wu@gmail.com> 460 461 * config/tc-arm.c (md_apply_fix): Do not clear write_back bit. 462 4632006-09-27 Nick Clifton <nickc@redhat.com> 464 465 * output-file.c (output_file_close): Prevent an infinite loop 466 reporting that stdoutput could not be closed. 467 4682006-09-26 Mark Shinwell <shinwell@codesourcery.com> 469 Joseph Myers <joseph@codesourcery.com> 470 Ian Lance Taylor <ian@wasabisystems.com> 471 Ben Elliston <bje@wasabisystems.com> 472 473 * config/tc-arm.c (arm_cext_iwmmxt2): New. 474 (enum operand_parse_code): New code OP_RIWR_I32z. 475 (parse_operands): Handle OP_RIWR_I32z. 476 (do_iwmmxt_wmerge): New function. 477 (do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is 478 a register. 479 (do_iwmmxt_wrwrwr_or_imm5): New function. 480 (insns): Mark instructions as RIWR_I32z as appropriate. 481 Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>, 482 waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n}, 483 wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r}, 484 wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx. 485 (md_begin): Handle IWMMXT2. 486 (arm_cpus): Add iwmmxt2. 487 (arm_extensions): Likewise. 488 (arm_archs): Likewise. 489 4902006-09-25 Bob Wilson <bob.wilson@acm.org> 491 492 * doc/as.texinfo (Overview): Revise description of --keep-locals. 493 Add xref to "Symbol Names". 494 (L): Refer to "local symbols" instead of "local labels". Move 495 definition to "Symbol Names" section; add xref to that section. 496 (Symbol Names): Use "Local Symbol Names" section to define local 497 symbols. Add "Local Labels" heading for description of temporary 498 forward/backward labels, and refer to those as "local labels". 499 5002006-09-23 H.J. Lu <hongjiu.lu@intel.com> 501 502 PR binutils/3235 503 * config/tc-i386.c (match_template): Check address size prefix 504 to turn Disp64/Disp32/Disp16 operand into Disp32/Disp16/Disp32 505 operand. 506 5072006-09-22 Alan Modra <amodra@bigpond.net.au> 508 509 * config/tc-ppc.c (ppc_symbol_chars): Remove '+' and '-'. 510 5112006-09-22 Alan Modra <amodra@bigpond.net.au> 512 513 * as.h (as_perror): Delete declaration. 514 * gdbinit.in (as_perror): Delete breakpoint. 515 * messages.c (as_perror): Delete function. 516 * doc/internals.texi: Remove as_perror description. 517 * listing.c (listing_print: Don't use as_perror. 518 * output-file.c (output_file_create, output_file_close): Likewise. 519 * symbols.c (symbol_create, symbol_clone): Likewise. 520 * write.c (write_contents): Likewise. 521 * config/obj-som.c (obj_som_version, obj_som_copyright): Likewise. 522 * config/tc-tic54x.c (tic54x_mlib): Likewise. 523 5242006-09-22 Alan Modra <amodra@bigpond.net.au> 525 526 * config/tc-ppc.c (md_section_align): Don't round up address for ELF. 527 (ppc_handle_align): New function. 528 * config/tc-ppc.h (HANDLE_ALIGN): Use ppc_handle_align. 529 (SUB_SEGMENT_ALIGN): Define as zero. 530 5312006-09-20 Bob Wilson <bob.wilson@acm.org> 532 533 * doc/as.texinfo: Fix cross reference usage, typos and grammar. 534 (Overview): Skip cross reference in man page. 535 5362006-09-20 Kai Tietz <Kai.Tietz@onevision.com> 537 538 * configure.in: Add new target x86_64-pc-mingw64. 539 * configure: Regenerate. 540 * configure.tgt: Add new target x86_64-pc-mingw64. 541 * config/obj-coff.h: Add handling for TE_PEP target specific code 542 and definitions. 543 * config/tc-i386.c: Add new targets. 544 (md_parse_option): Add targets to OPTION_64. 545 (x86_64_target_format): Add new method for setup proper default 546 target cpu mode. 547 * config/te-pep.h: Add new target definition header. 548 (TE_PEP): New macro: Identifies new target architecture. 549 (COFF_WITH_pex64): Set proper includes in bfd. 550 * NEWS: Mention new target. 551 5522006-09-18 Bernd Schmidt <bernd.schmidt@analog.com> 553 554 * config/bfin-parse.y (binary): Change sub of const to add of negated 555 const. 556 5572006-09-17 Mei Ligang <ligang@sunnorth.com.cn> 558 559 * config/tc-score.c: New file. 560 * config/tc-score.h: Newf file. 561 * configure.tgt: Add Score target. 562 * Makefile.am: Add Score files. 563 * Makefile.in: Regenerate. 564 * NEWS: Mention new target support. 565 5662006-09-16 Paul Brook <paul@codesourcery.com> 567 568 * config/tc-arm.c (s_arm_unwind_movsp): Add offset argument. 569 * doc/c-arm.texi (movsp): Document offset argument. 570 5712006-09-16 Paul Brook <paul@codesourcery.com> 572 573 * config/tc-arm.c (thumb32_negate_data_op): Consistently use 574 unsigned int to avoid 64-bit host problems. 575 5762006-09-15 Bernd Schmidt <bernd.schmidt@analog.com> 577 578 * config/bfin-parse.y (binary): Do some more constant folding for 579 additions. 580 5812006-09-13 Jan Beulich <jbeulich@novell.com> 582 583 * input-file.c (input_file_give_next_buffer): Demote as_bad to 584 as_warn. 585 5862006-09-13 Alan Modra <amodra@bigpond.net.au> 587 588 PR gas/3165 589 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number 590 in parens. 591 5922006-09-13 Alan Modra <amodra@bigpond.net.au> 593 594 * input-file.c (input_file_open): Replace as_perror with as_bad 595 so that gas exits with error on file errors. Correct error 596 message. 597 (input_file_get, input_file_give_next_buffer): Likewise. 598 * input-file.h: Update comment. 599 6002006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk> 601 602 PR gas/3172 603 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class 604 registers as a sub-class of wC registers. 605 6062006-09-11 Alan Modra <amodra@bigpond.net.au> 607 608 PR gas/3165 609 * config/tc-mips.h (enum dwarf2_format): Forward declare. 610 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens. 611 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise. 612 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise. 613 6142006-09-08 Nick Clifton <nickc@redhat.com> 615 616 PR gas/3129 617 * doc/as.texinfo (Macro): Improve documentation about separating 618 macro arguments from following text. 619 6202006-09-08 Paul Brook <paul@codesourcery.com> 621 622 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores. 623 6242006-09-07 Paul Brook <paul@codesourcery.com> 625 626 * config/tc-arm.c (parse_operands): Mark operand as present. 627 6282006-09-04 Paul Brook <paul@codesourcery.com> 629 630 * config/tc-arm.c (do_neon_dyadic_if_i): Remove. 631 (do_neon_dyadic_if_i_d): Avoid setting U bit. 632 (do_neon_mac_maybe_scalar): Ditto. 633 (do_neon_dyadic_narrow): Force operand type to NT_integer. 634 (insns): Remove out of date comments. 635 6362006-08-29 Nick Clifton <nickc@redhat.com> 637 638 * read.c (s_align): Initialize the 'stopc' variable to prevent 639 compiler complaints about it being used without being 640 initialized. 641 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space, 642 s_float_space, s_struct, cons_worker, equals): Likewise. 643 6442006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com> 645 646 * ecoff.c (ecoff_directive_val): Fix message typo. 647 * config/tc-ns32k.c (convert_iif): Likewise. 648 * config/tc-sh64.c (shmedia_check_limits): Likewise. 649 6502006-08-25 Sterling Augustine <sterling@tensilica.com> 651 Bob Wilson <bob.wilson@acm.org> 652 653 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check 654 the state of the absolute_literals directive. Remove align frag at 655 the start of the literal pool position. 656 6572006-08-25 Bob Wilson <bob.wilson@acm.org> 658 659 * doc/c-xtensa.texi: Add @group commands in examples. 660 6612006-08-24 Bob Wilson <bob.wilson@acm.org> 662 663 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete. 664 (INIT_LITERAL_SECTION_NAME): Delete. 665 (lit_state struct): Remove segment names, init_lit_seg, and 666 fini_lit_seg. Add lit_prefix and current_text_seg. 667 (init_literal_head_h, init_literal_head): Delete. 668 (fini_literal_head_h, fini_literal_head): Delete. 669 (xtensa_begin_directive): Move argument parsing to 670 xtensa_literal_prefix function. 671 (xtensa_end_directive): Deallocate lit_prefix field of lit_state. 672 (xtensa_literal_prefix): Parse the directive argument here and 673 record it in the lit_prefix field. Remove code to derive literal 674 section names. 675 (linkonce_len): New. 676 (get_is_linkonce_section): Use linkonce_len. Check for any 677 ".gnu.linkonce.*" section, not just text sections. 678 (md_begin): Remove initialization of deleted lit_state fields. 679 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references 680 to init_literal_head and fini_literal_head. 681 (xtensa_move_literals): Likewise. Skip literals for .init and .fini 682 when traversing literal_head list. 683 (match_section_group): New. 684 (cache_literal_section): Rewrite to determine the literal section 685 name on the fly, create the section and return it. 686 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section. 687 (xtensa_switch_to_non_abs_literal_fragment): Likewise. 688 (xtensa_create_property_segments, xtensa_create_xproperty_segments): 689 Use xtensa_get_property_section from bfd. 690 (retrieve_xtensa_section): Delete. 691 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals 692 description to refer to plural literal sections and add xref to 693 the Literal Directive section. 694 (Literal Directive): Describe new rules for deriving literal section 695 names. Add footnote for special case of .init/.fini with 696 --text-section-literals. 697 (Literal Prefix Directive): Replace old naming rules with xref to the 698 Literal Directive section. 699 7002006-08-21 Joseph Myers <joseph@codesourcery.com> 701 702 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for 703 merging with previous long opcode. 704 7052006-08-22 Pedro Alves <pedro_alves@portugalmail.pt> 706 707 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h. 708 * Makefile.in: Regenerate. 709 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were 710 renamed. Adjust. 711 7122006-08-16 Julian Brown <julian@codesourcery.com> 713 714 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting 715 to use ARM instructions on non-ARM-supporting cores. 716 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb 717 mode automatically based on cpu variant. 718 (md_begin): Call above function. 719 7202006-08-16 Julian Brown <julian@codesourcery.com> 721 722 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be 723 recognized in non-unified syntax mode. 724 7252006-08-15 Thiemo Seufer <ths@mips.com> 726 Nigel Stephens <nigel@mips.com> 727 David Ung <davidu@mips.com> 728 729 * configure.tgt: Handle mips*-sde-elf*. 730 7312006-08-12 Thiemo Seufer <ths@networkno.de> 732 733 * config/tc-mips.c (mips16_ip): Fix argument register handling 734 for restore instruction. 735 7362006-08-08 Bob Wilson <bob.wilson@acm.org> 737 738 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New. 739 (out_sleb128): New. 740 (out_fixed_inc_line_addr): New. 741 (process_entries): Use out_fixed_inc_line_addr when 742 DWARF2_USE_FIXED_ADVANCE_PC is set. 743 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define. 744 7452006-08-08 DJ Delorie <dj@redhat.com> 746 747 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local 748 vs full symbols so that we never have more than one pointer value 749 for any given symbol in our symbol table. 750 7512006-08-08 Sterling Augustine <sterling@tensilica.com> 752 753 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg 754 and emit DW_AT_ranges when code in compilation unit is not 755 contiguous. 756 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in 757 is not contiguous. 758 (dwarf2_finish): Create and pass ranges_seg to out_debug_info. 759 (out_debug_ranges): New function to emit .debug_ranges section 760 when code is not contiguous. 761 7622006-08-08 Nick Clifton <nickc@redhat.com> 763 764 * config/tc-arm.c (WARN_DEPRECATED): Enable. 765 7662006-08-05 Pedro Alves <pedro_alves@portugalmail.pt> 767 768 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF 769 only block. 770 (pe_directive_secrel) [TE_PE]: New function. 771 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file, 772 loc, loc_mark_labels. 773 [TE_PE]: Handle secrel32. 774 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn 775 call. 776 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call. 777 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call. 778 (md_section_align): Only round section sizes here for AOUT 779 targets. 780 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block. 781 (tc_pe_dwarf2_emit_offset): New function. 782 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL. 783 (cons_fix_new_arm): Handle O_secrel. 784 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH, 785 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out 786 of OBJ_ELF only block. 787 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare 788 tc_pe_dwarf2_emit_offset. 789 7902006-08-04 Richard Sandiford <richard@codesourcery.com> 791 792 * config/tc-sh.c (apply_full_field_fix): New function. 793 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill 794 in fx_addnumber for BFD_RELOC_32_PLT_PCREL. 795 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case. 796 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS. 797 7982006-08-03 Nick Clifton <nickc@redhat.com> 799 800 PR gas/2991 801 * config.in: Regenerate. 802 8032006-08-03 Joseph Myers <joseph@codesourcery.com> 804 805 * config/tc-arm.c (parse_operands): Handle invalid register name 806 for OP_RIWR_RIWC. 807 8082006-08-03 Joseph Myers <joseph@codesourcery.com> 809 810 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG. 811 (parse_operands): Handle it. 812 (insns): Use it for tmcr and tmrc. 813 8142006-08-02 Petr Salinger <Petr.Salinger@seznam.cz> 815 816 PR binutils/2983 817 * config/tc-i386.c (md_parse_option): Treat any target starting 818 with elf64_x86_64 as a viable target for the -64 switch. 819 (i386_target_format): For 64-bit ELF flavoured output use 820 ELF_TARGET_FORMAT64. 821 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define. 822 8232006-08-02 Nick Clifton <nickc@redhat.com> 824 825 PR gas/2991 826 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from 827 bfd/aclocal.m4. 828 * configure.in: Run BFD_BINARY_FOPEN. 829 * configure: Regenerate. 830 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header 831 file to include. 832 8332006-08-01 H.J. Lu <hongjiu.lu@intel.com> 834 835 * config/tc-i386.c (md_assemble): Don't update 836 cpu_arch_isa_flags. 837 8382006-08-01 Thiemo Seufer <ths@mips.com> 839 840 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime. 841 8422006-08-01 Thiemo Seufer <ths@mips.com> 843 844 * config/tc-mips.c (macro_build_lui): Fix comment formatting. 845 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA, 846 BFD_RELOC_32 and BFD_RELOC_16. 847 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab, 848 md_convert_frag, md_obj_end): Fix comment formatting. 849 8502006-07-31 Thiemo Seufer <ths@mips.com> 851 852 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special 853 handling for BFD_RELOC_MIPS16_JMP. 854 8552006-07-24 Andreas Schwab <schwab@suse.de> 856 857 PR/2756 858 * read.c (read_a_source_file): Ignore unknown text after line 859 comment character. Fix misleading comment. 860 8612006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de> 862 863 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi, 864 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi, 865 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi, 866 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi, 867 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi, 868 doc/c-z80.texi, doc/internals.texi: Fix some typos. 869 8702006-07-21 Nick Clifton <nickc@redhat.com> 871 872 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the 873 linker testsuite. 874 8752006-07-20 Thiemo Seufer <ths@mips.com> 876 Nigel Stephens <nigel@mips.com> 877 878 * config/tc-mips.c (md_parse_option): Don't infer optimisation 879 options from debug options. 880 8812006-07-20 Thiemo Seufer <ths@mips.com> 882 883 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP. 884 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets. 885 8862006-07-19 Paul Brook <paul@codesourcery.com> 887 888 * config/tc-arm.c (insns): Fix rbit Arm opcode. 889 8902006-07-18 Paul Brook <paul@codesourcery.com> 891 892 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC. 893 (md_convert_frag): Use correct reloc for add_pc. Use 894 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum. 895 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM. 896 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM. 897 8982006-07-17 Mat Hostetter <mat@lcs.mit.edu> 899 900 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where 901 when file and line unknown. 902 9032006-07-17 Thiemo Seufer <ths@mips.com> 904 905 * read.c (s_struct): Use IS_ELF. 906 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip, 907 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable, 908 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame, 909 s_mips_mask): Likewise. 910 9112006-07-16 Thiemo Seufer <ths@mips.com> 912 David Ung <davidu@mips.com> 913 914 * read.c (s_struct): Handle ELF section changing. 915 * config/tc-mips.c (s_align): Leave enabling auto-align to the 916 generic code. 917 (s_change_sec): Try section changing only if we output ELF. 918 9192006-07-15 H.J. Lu <hongjiu.lu@intel.com> 920 921 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and 922 CpuAmdFam10. 923 (smallest_imm_type): Remove Cpu086. 924 (i386_target_format): Likewise. 925 926 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10. 927 Update CpuXXX. 928 9292006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> 930 Michael Meissner <michael.meissner@amd.com> 931 932 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type. 933 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives. 934 * config/tc-i386.c (cpu_arch): Add support for AmdFam10 935 architecture. 936 (i386_align_code): Ditto. 937 (md_assemble_code): Add support for insertq/extrq instructions, 938 swapping as needed for intel syntax. 939 (swap_imm_operands): New function to swap immediate operands. 940 (swap_operands): Deal with 4 operand instructions. 941 (build_modrm_byte): Add support for insertq instruction. 942 9432006-07-13 H.J. Lu <hongjiu.lu@intel.com> 944 945 * config/tc-i386.h (Size64): Fix a typo in comment. 946 9472006-07-12 Nick Clifton <nickc@redhat.com> 948 949 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in 950 fixup_segment() to repeat a range check on a value that has 951 already been checked here. 952 9532006-07-07 James E Wilson <wilson@specifix.com> 954 955 * config/tc-mips.c (mips_cpu_info_table): Add sb1a. 956 9572006-07-06 Mohammed Adn��ne Trojette <adn@diwi.org> 958 Nick Clifton <nickc@redhat.com> 959 960 PR binutils/2877 961 * doc/as.texi: Fix spelling typo: branchs => branches. 962 * doc/c-m68hc11.texi: Likewise. 963 * config/tc-m68hc11.c: Likewise. 964 Support old spelling of command line switch for backwards 965 compatibility. 966 9672006-07-04 Thiemo Seufer <ths@mips.com> 968 David Ung <davidu@mips.com> 969 970 * config/tc-mips.c (s_is_linkonce): New function. 971 (mips16_mark_labels): Don't adjust mips16 symbol addresses for 972 weak, external, and linkonce symbols. 973 (pic_need_relax): Use s_is_linkonce. 974 9752006-06-24 H.J. Lu <hongjiu.lu@intel.com> 976 977 * doc/as.texinfo (Org): Remove space. 978 (P2align): Add "@var{abs-expr},". 979 9802006-06-23 H.J. Lu <hongjiu.lu@intel.com> 981 982 * config/tc-i386.c (cpu_arch_tune_set): New. 983 (cpu_arch_isa): Likewise. 984 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize 985 nops with short or long nop sequences based on -march=/.arch 986 and -mtune=. 987 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0, 988 set cpu_arch_tune and cpu_arch_tune_flags. 989 (md_parse_option): For -march=, set cpu_arch_isa and set 990 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is 991 0. Set cpu_arch_tune_set to 1 for -mtune=. 992 (i386_target_format): Don't set cpu_arch_tune. 993 9942006-06-23 Nigel Stephens <nigel@mips.com> 995 996 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections 997 generated .sbss.* and .gnu.linkonce.sb.*. 998 9992006-06-23 Thiemo Seufer <ths@mips.com> 1000 David Ung <davidu@mips.com> 1001 1002 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment 1003 label_list. 1004 * config/tc-mips.c (label_list): Define per-segment label_list. 1005 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels, 1006 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword, 1007 mips_from_file_after_relocs, mips_define_label): Use per-segment 1008 label_list. 1009 10102006-06-22 Thiemo Seufer <ths@mips.com> 1011 1012 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro. 1013 (append_insn): Use it. 1014 (md_apply_fix): Whitespace formatting. 1015 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align, 1016 mips16_extended_frag): Remove register specifier. 1017 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric 1018 constants. 1019 10202006-06-21 Mark Shinwell <shinwell@codesourcery.com> 1021 1022 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse 1023 a directive saving VFP registers for ARMv6 or later. 1024 (s_arm_unwind_save): Add parameter arch_v6 and call 1025 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as 1026 appropriate. 1027 (md_pseudo_table): Add entry for new "vsave" directive. 1028 * doc/c-arm.texi: Correct error in example for "save" 1029 directive (fstmdf -> fstmdx). Also document "vsave" directive. 1030 10312006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de> 1032 Anatoly Sokolov <aesok@post.ru> 1033 1034 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p 1035 and atmega644p devices. Rename atmega164/atmega324 devices to 1036 atmega164p/atmega324p. 1037 * doc/c-avr.texi: Document new mcu and arch options. 1038 10392006-06-17 Nick Clifton <nickc@redhat.com> 1040 1041 * config/tc-arm.c (enum parse_operand_result): Move outside of 1042 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build. 1043 10442006-06-16 H.J. Lu <hongjiu.lu@intel.com> 1045 1046 * config/tc-i386.h (processor_type): New. 1047 (arch_entry): Add type. 1048 1049 * config/tc-i386.c (cpu_arch_tune): New. 1050 (cpu_arch_tune_flags): Likewise. 1051 (cpu_arch_isa_flags): Likewise. 1052 (cpu_arch): Updated. 1053 (set_cpu_arch): Also update cpu_arch_isa_flags. 1054 (md_assemble): Update cpu_arch_isa_flags. 1055 (OPTION_MARCH): New. 1056 (OPTION_MTUNE): Likewise. 1057 (md_longopts): Add -march= and -mtune=. 1058 (md_parse_option): Support -march= and -mtune=. 1059 (md_show_usage): Add -march=CPU/-mtune=CPU. 1060 (i386_target_format): Also update cpu_arch_isa_flags, 1061 cpu_arch_tune and cpu_arch_tune_flags. 1062 1063 * doc/as.texinfo: Add -march=CPU/-mtune=CPU. 1064 1065 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU. 1066 10672006-06-15 Mark Shinwell <shinwell@codesourcery.com> 1068 1069 * config/tc-arm.c (enum parse_operand_result): New. 1070 (struct group_reloc_table_entry): New. 1071 (enum group_reloc_type): New. 1072 (group_reloc_table): New array. 1073 (find_group_reloc_table_entry): New function. 1074 (parse_shifter_operand_group_reloc): New function. 1075 (parse_address_main): New function, incorporating code 1076 from the old parse_address function. To be used via... 1077 (parse_address): wrapper for parse_address_main; and 1078 (parse_address_group_reloc): new function, likewise. 1079 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR, 1080 OP_ADDRGLDRS, OP_ADDRGLDC. 1081 (parse_operands): Support for these new operand codes. 1082 New macro po_misc_or_fail_no_backtrack. 1083 (encode_arm_cp_address): Preserve group relocations. 1084 (insns): Modify to use the above operand codes where group 1085 relocations are permitted. 1086 (md_apply_fix): Handle the group relocations 1087 ALU_PC_G0_NC through LDC_SB_G2. 1088 (tc_gen_reloc): Likewise. 1089 (arm_force_relocation): Leave group relocations for the linker. 1090 (arm_fix_adjustable): Likewise. 1091 10922006-06-15 Julian Brown <julian@codesourcery.com> 1093 1094 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into... 1095 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle 1096 relocs properly. 1097 10982006-06-12 H.J. Lu <hongjiu.lu@intel.com> 1099 1100 * config/tc-i386.c (process_suffix): Don't add rex64 for 1101 "xchg %rax,%rax". 1102 11032006-06-09 Thiemo Seufer <ths@mips.com> 1104 1105 * config/tc-mips.c (mips_ip): Maintain argument count. 1106 11072006-06-09 Alan Modra <amodra@bigpond.net.au> 1108 1109 * config/tc-iq2000.c: Include sb.h. 1110 11112006-06-08 Nigel Stephens <nigel@mips.com> 1112 1113 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat" 1114 aliases for better compatibility with SGI tools. 1115 11162006-06-08 Alan Modra <amodra@bigpond.net.au> 1117 1118 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete. 1119 * Makefile.am (GASLIBS): Expand @BFDLIB@. 1120 (BFDVER_H): Delete. 1121 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants. 1122 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout) 1123 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly. 1124 Run "make dep-am". 1125 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h. 1126 * Makefile.in: Regenerate. 1127 * doc/Makefile.in: Regenerate. 1128 * configure: Regenerate. 1129 11302006-06-07 Joseph S. Myers <joseph@codesourcery.com> 1131 1132 * po/Make-in (pdf, ps): New dummy targets. 1133 11342006-06-07 Julian Brown <julian@codesourcery.com> 1135 1136 * config/tc-arm.c (stdarg.h): include. 1137 (arm_it): Add uncond_value field. Add isvec and issingle to operand 1138 array. 1139 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and 1140 REG_TYPE_NSDQ (single, double or quad vector reg). 1141 (reg_expected_msgs): Update. 1142 (BAD_FPU): Add macro for unsupported FPU instruction error. 1143 (parse_neon_type): Support 'd' as an alias for .f64. 1144 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ 1145 sets of registers. 1146 (parse_vfp_reg_list): Don't update first arg on error. 1147 (parse_neon_mov): Support extra syntax for VFP moves. 1148 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO, 1149 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ. 1150 (parse_operands): Support isvec, issingle operands fields, new parse 1151 codes above. 1152 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs, 1153 msr variants. 1154 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above. 1155 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez. 1156 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros. 1157 (NEON_SHAPE_DEF): New macro. Define table of possible instruction 1158 shapes. 1159 (neon_shape): Redefine in terms of above. 1160 (neon_shape_class): New enumeration, table of shape classes. 1161 (neon_shape_el): New enumeration. One element of a shape. 1162 (neon_shape_el_size): Register widths of above, where appropriate. 1163 (neon_shape_info): New struct. Info for shape table. 1164 (neon_shape_tab): New array. 1165 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL. 1166 (neon_check_shape): Rewrite as... 1167 (neon_select_shape): New function to classify instruction shapes, 1168 driven by new table neon_shape_tab array. 1169 (neon_quad): New function. Return 1 if shape should set Q flag in 1170 instructions (or equivalent), 0 otherwise. 1171 (type_chk_of_el_type): Support F64. 1172 (el_type_of_type_chk): Likewise. 1173 (neon_check_type): Add support for VFP type checking (VFP data 1174 elements fill their containing registers). 1175 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE 1176 in thumb mode for VFP instructions. 1177 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument, 1178 and encode the current instruction as if it were that opcode. 1179 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS 1180 arguments, call function in PFN. 1181 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul) 1182 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str) 1183 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul) 1184 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push) 1185 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions. 1186 Redirect Neon-syntax VFP instructions to VFP instruction handlers. 1187 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm) 1188 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield) 1189 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh) 1190 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri) 1191 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext) 1192 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn) 1193 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long) 1194 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt) 1195 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use 1196 neon_quad. 1197 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared 1198 between VFP and Neon turns out to belong to Neon. Perform 1199 architecture check and fill in condition field if appropriate. 1200 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg) 1201 (do_neon_cvt): Add support for VFP variants of instructions. 1202 (neon_cvt_flavour): Extend to cover VFP conversions. 1203 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP 1204 vmov variants. 1205 (do_neon_ldr_str): Handle single-precision VFP load/store. 1206 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use 1207 NS_NULL not NS_IGNORE. 1208 (opcode_tag): Add OT_csuffixF for operands which either take a 1209 conditional suffix, or have 0xF in the condition field. 1210 (md_assemble): Add support for OT_csuffixF. 1211 (NCE): Replace macro with... 1212 (NCE_tag, NCE, NCEF): New macros. 1213 (nCE): Replace macro with... 1214 (nCE_tag, nCE, nCEF): New macros. 1215 (insns): Add support for VFP insns or VFP versions of insns msr, 1216 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, 1217 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, 1218 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared 1219 VFP/Neon insns together. 1220 12212006-06-07 Alan Modra <amodra@bigpond.net.au> 1222 Ladislav Michl <ladis@linux-mips.org> 1223 1224 * app.c: Don't include headers already included by as.h. 1225 * as.c: Likewise. 1226 * atof-generic.c: Likewise. 1227 * cgen.c: Likewise. 1228 * dwarf2dbg.c: Likewise. 1229 * expr.c: Likewise. 1230 * input-file.c: Likewise. 1231 * input-scrub.c: Likewise. 1232 * macro.c: Likewise. 1233 * output-file.c: Likewise. 1234 * read.c: Likewise. 1235 * sb.c: Likewise. 1236 * config/bfin-lex.l: Likewise. 1237 * config/obj-coff.h: Likewise. 1238 * config/obj-elf.h: Likewise. 1239 * config/obj-som.h: Likewise. 1240 * config/tc-arc.c: Likewise. 1241 * config/tc-arm.c: Likewise. 1242 * config/tc-avr.c: Likewise. 1243 * config/tc-bfin.c: Likewise. 1244 * config/tc-cris.c: Likewise. 1245 * config/tc-d10v.c: Likewise. 1246 * config/tc-d30v.c: Likewise. 1247 * config/tc-dlx.h: Likewise. 1248 * config/tc-fr30.c: Likewise. 1249 * config/tc-frv.c: Likewise. 1250 * config/tc-h8300.c: Likewise. 1251 * config/tc-hppa.c: Likewise. 1252 * config/tc-i370.c: Likewise. 1253 * config/tc-i860.c: Likewise. 1254 * config/tc-i960.c: Likewise. 1255 * config/tc-ip2k.c: Likewise. 1256 * config/tc-iq2000.c: Likewise. 1257 * config/tc-m32c.c: Likewise. 1258 * config/tc-m32r.c: Likewise. 1259 * config/tc-maxq.c: Likewise. 1260 * config/tc-mcore.c: Likewise. 1261 * config/tc-mips.c: Likewise. 1262 * config/tc-mmix.c: Likewise. 1263 * config/tc-mn10200.c: Likewise. 1264 * config/tc-mn10300.c: Likewise. 1265 * config/tc-msp430.c: Likewise. 1266 * config/tc-mt.c: Likewise. 1267 * config/tc-ns32k.c: Likewise. 1268 * config/tc-openrisc.c: Likewise. 1269 * config/tc-ppc.c: Likewise. 1270 * config/tc-s390.c: Likewise. 1271 * config/tc-sh.c: Likewise. 1272 * config/tc-sh64.c: Likewise. 1273 * config/tc-sparc.c: Likewise. 1274 * config/tc-tic30.c: Likewise. 1275 * config/tc-tic4x.c: Likewise. 1276 * config/tc-tic54x.c: Likewise. 1277 * config/tc-v850.c: Likewise. 1278 * config/tc-vax.c: Likewise. 1279 * config/tc-xc16x.c: Likewise. 1280 * config/tc-xstormy16.c: Likewise. 1281 * config/tc-xtensa.c: Likewise. 1282 * config/tc-z80.c: Likewise. 1283 * config/tc-z8k.c: Likewise. 1284 * macro.h: Don't include sb.h or ansidecl.h. 1285 * sb.h: Don't include stdio.h or ansidecl.h. 1286 * cond.c: Include sb.h. 1287 * itbl-lex.l: Include as.h instead of other system headers. 1288 * itbl-parse.y: Likewise. 1289 * itbl-ops.c: Similarly. 1290 * itbl-ops.h: Don't include as.h or ansidecl.h. 1291 * config/bfin-defs.h: Don't include bfd.h or as.h. 1292 * config/bfin-parse.y: Include as.h instead of other system headers. 1293 12942006-06-06 Ben Elliston <bje@au.ibm.com> 1295 Anton Blanchard <anton@samba.org> 1296 1297 * config/tc-ppc.c (parse_cpu): Handle "-mpower6". 1298 (md_show_usage): Document it. 1299 (ppc_setup_opcodes): Test power6 opcode flag bits. 1300 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6". 1301 13022006-06-06 Thiemo Seufer <ths@mips.com> 1303 Chao-ying Fu <fu@mips.com> 1304 1305 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro. 1306 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete. 1307 (macro_build): Update comment. 1308 (mips_ip): Allow DSP64 instructions for MIPS64R2. 1309 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and 1310 CPU_HAS_MDMX. 1311 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and 1312 MIPS_CPU_ASE_MDMX flags for sb1. 1313 13142006-06-05 Thiemo Seufer <ths@mips.com> 1315 1316 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew 1317 appropriate. 1318 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate. 1319 (mips_ip): Make overflowed/underflowed constant arguments in DSP 1320 and MT instructions a fatal error. Use INSERT_OPERAND where 1321 appropriate. Improve warnings for break and wait code overflows. 1322 Use symbolic constant of OP_MASK_COPZ. 1323 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate. 1324 13252006-06-05 Daniel Jacobowitz <dan@codesourcery.com> 1326 1327 * po/Make-in (top_builddir): Define. 1328 13292006-06-02 Joseph S. Myers <joseph@codesourcery.com> 1330 1331 * doc/Makefile.am (TEXI2DVI): Define. 1332 * doc/Makefile.in: Regenerate. 1333 * doc/c-arc.texi: Fix typo. 1334 13352006-06-01 Alan Modra <amodra@bigpond.net.au> 1336 1337 * config/obj-ieee.c: Delete. 1338 * config/obj-ieee.h: Delete. 1339 * Makefile.am (OBJ_FORMATS): Remove ieee. 1340 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly. 1341 (obj-ieee.o): Remove rule. 1342 * Makefile.in: Regenerate. 1343 * configure.in (atof): Remove tahoe. 1344 (OBJ_MAYBE_IEEE): Don't define. 1345 * configure: Regenerate. 1346 * config.in: Regenerate. 1347 * doc/Makefile.in: Regenerate. 1348 * po/POTFILES.in: Regenerate. 1349 13502006-05-31 Daniel Jacobowitz <dan@codesourcery.com> 1351 1352 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL 1353 and LIBINTL_DEP everywhere. 1354 (INTLLIBS): Remove. 1355 (INCLUDES, DEP_INCLUDES): Use @INCINTL@. 1356 * acinclude.m4: Include new gettext macros. 1357 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS. 1358 Remove local code for po/Makefile. 1359 * Makefile.in, configure, doc/Makefile.in: Regenerated. 1360 13612006-05-30 Nick Clifton <nickc@redhat.com> 1362 1363 * po/es.po: Updated Spanish translation. 1364 13652006-05-06 Denis Chertykov <denisc@overta.ru> 1366 1367 * doc/c-avr.texi: New file. 1368 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi 1369 * doc/all.texi: Set AVR 1370 * doc/as.texinfo: Include c-avr.texi 1371 13722006-05-28 Jie Zhang <jie.zhang@analog.com> 1373 1374 * config/bfin-parse.y (check_macfunc): Loose the condition of 1375 calling check_multiply_halfregs (). 1376 13772006-05-25 Jie Zhang <jie.zhang@analog.com> 1378 1379 * config/bfin-parse.y (asm_1): Better check and deal with 1380 vector and scalar Multiply 16-Bit Operands instructions. 1381 13822006-05-24 Nick Clifton <nickc@redhat.com> 1383 1384 * config/tc-hppa.c: Convert to ISO C90 format. 1385 * config/tc-hppa.h: Likewise. 1386 13872006-05-24 Carlos O'Donell <carlos@systemhalted.org> 1388 Randolph Chung <randolph@tausq.org> 1389 1390 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff, 1391 is_tls_ieoff, is_tls_leoff): Define. 1392 (fix_new_hppa): Handle TLS. 1393 (cons_fix_new_hppa): Likewise. 1394 (pa_ip): Likewise. 1395 (md_apply_fix): Handle TLS relocs. 1396 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS. 1397 13982006-05-24 Bjoern Haase <bjoern.m.haase@web.de> 1399 1400 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561. 1401 14022006-05-23 Thiemo Seufer <ths@mips.com> 1403 David Ung <davidu@mips.com> 1404 Nigel Stephens <nigel@mips.com> 1405 1406 [ gas/ChangeLog ] 1407 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. 1408 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, 1409 ISA_HAS_MXHC1): New macros. 1410 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of 1411 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. 1412 (mips_cpu_info): Change to use combined ASE/IS_ISA flag. 1413 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, 1414 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. 1415 (mips_after_parse_args): Change default handling of float register 1416 size to account for 32bit code with 64bit FP. Better sanity checking 1417 of ISA/ASE/ABI option combinations. 1418 (s_mipsset): Support switching of GPR and FPR sizes via 1419 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE 1420 options. 1421 (mips_elf_final_processing): We should record the use of 64bit FP 1422 registers in 32bit code but we don't, because ELF header flags are 1423 a scarce ressource. 1424 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE 1425 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, 1426 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. 1427 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. 1428 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document 1429 missing -march options. Document .set arch=CPU. Move .set smartmips 1430 to ASE page. Use @code for .set FOO examples. 1431 14322006-05-23 Jie Zhang <jie.zhang@analog.com> 1433 1434 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters 1435 if needed. 1436 14372006-05-23 Jie Zhang <jie.zhang@analog.com> 1438 1439 * config/bfin-defs.h (bfin_equals): Remove declaration. 1440 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr". 1441 * config/tc-bfin.c (bfin_name_is_register): Remove. 1442 (bfin_equals): Remove. 1443 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1. 1444 (bfin_name_is_register): Remove declaration. 1445 14462006-05-19 Thiemo Seufer <ths@mips.com> 1447 Nigel Stephens <nigel@mips.com> 1448 1449 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define. 1450 (mips_oddfpreg_ok): New function. 1451 (mips_ip): Use it. 1452 14532006-05-19 Thiemo Seufer <ths@mips.com> 1454 David Ung <davidu@mips.com> 1455 1456 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare. 1457 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS, 1458 ISA_HAS_DROR, ISA_HAS_ROR): Reformat. 1459 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC, 1460 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK, 1461 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES, 1462 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES, 1463 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES, 1464 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES, 1465 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names, 1466 reg_names_o32, reg_names_n32n64): Define register classes. 1467 (reg_lookup): New function, use register classes. 1468 (md_begin): Reserve register names in the symbol table. Simplify 1469 OBJ_ELF defines. 1470 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers. 1471 Use reg_lookup. 1472 (mips16_ip): Use reg_lookup. 1473 (tc_get_register): Likewise. 1474 (tc_mips_regname_to_dw2regnum): New function. 1475 14762006-05-19 Thiemo Seufer <ths@mips.com> 1477 1478 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum): 1479 Un-constify string argument. 1480 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum): 1481 Likewise. 1482 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum): 1483 Likewise. 1484 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum): 1485 Likewise. 1486 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum): 1487 Likewise. 1488 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum): 1489 Likewise. 1490 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum): 1491 Likewise. 1492 14932006-05-19 Nathan Sidwell <nathan@codesourcery.com> 1494 1495 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of 1496 cfloat/m68881 to correct architecture before using it. 1497 14982006-05-16 Bjoern Haase <bjoern.m.haase@web.de> 1499 1500 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate 1501 constant values. 1502 15032006-05-15 Paul Brook <paul@codesourcery.com> 1504 1505 * config/tc-arm.c (arm_adjust_symtab): Use 1506 bfd_is_arm_special_symbol_name. 1507 15082006-05-15 Bob Wilson <bob.wilson@acm.org> 1509 1510 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next, 1511 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches, 1512 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed): 1513 Handle errors from calls to xtensa_opcode_is_* functions. 1514 15152006-05-14 Thiemo Seufer <ths@mips.com> 1516 1517 * config/tc-mips.c (macro_build): Test for currently active 1518 mips16 option. 1519 (mips16_ip): Reject invalid opcodes. 1520 15212006-05-11 Carlos O'Donell <carlos@codesourcery.com> 1522 1523 * doc/as.texinfo: Rename "Index" to "AS Index", 1524 and "ABORT" to "ABORT (COFF)". 1525 15262006-05-11 Paul Brook <paul@codesourcery.com> 1527 1528 * config/tc-arm.c (parse_half): New function. 1529 (operand_parse_code): Remove OP_Iffff. Add OP_HALF. 1530 (parse_operands): Ditto. 1531 (do_mov16): Reject invalid relocations. 1532 (do_t_mov16): Ditto. Use Thumb reloc numbers. 1533 (insns): Replace Iffff with HALF. 1534 (md_apply_fix): Add MOVW and MOVT relocs. 1535 (tc_gen_reloc): Ditto. 1536 * doc/c-arm.texi: Document relocation operators 1537 15382006-05-11 Paul Brook <paul@codesourcery.com> 1539 1540 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols. 1541 15422006-05-11 Thiemo Seufer <ths@mips.com> 1543 1544 * config/tc-mips.c (append_insn): Don't check the range of j or 1545 jal addresses. 1546 15472006-05-11 Pedro Alves <pedro_alves@portugalmail.pt> 1548 1549 * config/tc-arm.c (md_pcrel_from_section): Force a bias for 1550 relocs against external symbols for WinCE targets. 1551 (md_apply_fix): Likewise. 1552 15532006-05-09 David Ung <davidu@mips.com> 1554 1555 * config/tc-mips.c (append_insn): Only warn about an out-of-range 1556 j or jal address. 1557 15582006-05-09 Nick Clifton <nickc@redhat.com> 1559 1560 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups 1561 against symbols which are not going to be placed into the symbol 1562 table. 1563 15642006-05-09 Ben Elliston <bje@au.ibm.com> 1565 1566 * expr.c (operand): Remove `if (0 && ..)' statement and 1567 subsequently unused target_op label. Collapse `if (1 || ..)' 1568 statement. 1569 * app.c (do_scrub_chars): Remove unused case 0, as it is handled 1570 separately above the switch. 1571 15722006-05-08 Nick Clifton <nickc@redhat.com> 1573 1574 PR gas/2623 1575 * config/tc-msp430.c (line_separator_character): Define as |. 1576 15772006-05-08 Thiemo Seufer <ths@mips.com> 1578 Nigel Stephens <nigel@mips.com> 1579 David Ung <davidu@mips.com> 1580 1581 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag. 1582 (mips_opts): Likewise. 1583 (file_ase_smartmips): New variable. 1584 (ISA_HAS_ROR): SmartMIPS implements rotate instructions. 1585 (macro_build): Handle SmartMIPS instructions. 1586 (mips_ip): Likewise. 1587 (md_longopts): Add argument handling for smartmips. 1588 (md_parse_options, mips_after_parse_args): Likewise. 1589 (s_mipsset): Add .set smartmips support. 1590 (md_show_usage): Document -msmartmips/-mno-smartmips. 1591 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and 1592 .set smartmips. 1593 * doc/c-mips.texi: Likewise. 1594 15952006-05-08 Alan Modra <amodra@bigpond.net.au> 1596 1597 * write.c (relax_segment): Add pass count arg. Don't error on 1598 negative org/space on first two passes. 1599 (relax_seg_info): New struct. 1600 (relax_seg, write_object_file): Adjust. 1601 * write.h (relax_segment): Update prototype. 1602 16032006-05-05 Julian Brown <julian@codesourcery.com> 1604 1605 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds 1606 checking. 1607 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable 1608 architecture version checks. 1609 (insns): Allow overlapping instructions to be used in VFP mode. 1610 16112006-05-05 H.J. Lu <hongjiu.lu@intel.com> 1612 1613 PR gas/2598 1614 * config/obj-elf.c (obj_elf_change_section): Allow user 1615 specified SHF_ALPHA_GPREL. 1616 16172006-05-05 Bjoern Haase <bjoern.m.haase@web.de> 1618 1619 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups 1620 for PMEM related expressions. 1621 16222006-05-05 Nick Clifton <nickc@redhat.com> 1623 1624 PR gas/2582 1625 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the 1626 insertion of a directory separator character into a string at a 1627 given offset. Uses heuristics to decide when to use a backslash 1628 character rather than a forward-slash character. 1629 (dwarf2_directive_loc): Use the macro. 1630 (out_debug_info): Likewise. 1631 16322006-05-05 Thiemo Seufer <ths@mips.com> 1633 David Ung <davidu@mips.com> 1634 1635 * config/tc-mips.c (macro_build): Add case 'k' to handle cache 1636 instruction. 1637 (macro): Add new case M_CACHE_AB. 1638 16392006-05-04 Kazu Hirata <kazu@codesourcery.com> 1640 1641 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated. 1642 (opcode_lookup): Issue a warning for opcode with 1643 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated 1644 identical to OT_cinfix3. 1645 (TxC3w, TC3w, tC3w): New. 1646 (insns): Use tC3w and TC3w for comparison instructions with 1647 's' suffix. 1648 16492006-05-04 Alan Modra <amodra@bigpond.net.au> 1650 1651 * subsegs.h (struct frchain): Delete frch_seg. 1652 (frchain_root): Delete. 1653 (seg_info): Define as macro. 1654 * subsegs.c (frchain_root): Delete. 1655 (abs_seg_info, und_seg_info, absolute_frchain): Delete. 1656 (subsegs_begin, subseg_change): Adjust for above. 1657 (subseg_set_rest): Likewise. Add new frchain structs to seginfo 1658 rather than to one big list. 1659 (subseg_get): Don't special case abs, und sections. 1660 (subseg_new, subseg_force_new): Don't set frchainP here. 1661 (seg_info): Delete. 1662 (subsegs_print_statistics): Adjust frag chain control list traversal. 1663 * debug.c (dmp_frags): Likewise. 1664 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag 1665 at frchain_root. Make use of known frchain ordering. 1666 (last_frag_for_seg): Likewise. 1667 (get_frag_fix): Likewise. Add seg param. 1668 (process_entries, out_debug_aranges): Adjust get_frag_fix calls. 1669 * write.c (chain_frchains_together_1): Adjust for struct frchain. 1670 (SUB_SEGMENT_ALIGN): Likewise. 1671 (subsegs_finish): Adjust frchain list traversal. 1672 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise. 1673 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise. 1674 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise. 1675 (xtensa_fix_b_j_loop_end_frags): Likewise. 1676 (xtensa_fix_close_loop_end_frags): Likewise. 1677 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise. 1678 (retrieve_segment_info): Delete frch_seg initialisation. 1679 16802006-05-03 Alan Modra <amodra@bigpond.net.au> 1681 1682 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data. 1683 * config/obj-elf.h (obj_sec_set_private_data): Delete. 1684 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol. 1685 * config/tc-mn10300.c (tc_gen_reloc): Likewise. 1686 16872006-05-02 Joseph Myers <joseph@codesourcery.com> 1688 1689 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4 1690 here. 1691 (md_apply_fix3): Multiply offset by 4 here for 1692 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2. 1693 16942006-05-02 H.J. Lu <hongjiu.lu@intel.com> 1695 Jan Beulich <jbeulich@novell.com> 1696 1697 * config/tc-i386.c (output_invalid_buf): Change size for 1698 unsigned char. 1699 * config/tc-tic30.c (output_invalid_buf): Likewise. 1700 1701 * config/tc-i386.c (output_invalid): Cast none-ascii char to 1702 unsigned char. 1703 * config/tc-tic30.c (output_invalid): Likewise. 1704 17052006-05-02 Daniel Jacobowitz <dan@codesourcery.com> 1706 1707 * doc/Makefile.am (AM_MAKEINFOFLAGS): New. 1708 (TEXI2POD): Use AM_MAKEINFOFLAGS. 1709 (asconfig.texi): Don't set top_srcdir. 1710 * doc/as.texinfo: Don't use top_srcdir. 1711 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated. 1712 17132006-05-02 H.J. Lu <hongjiu.lu@intel.com> 1714 1715 * config/tc-i386.c (output_invalid_buf): Change size to 16. 1716 * config/tc-tic30.c (output_invalid_buf): Likewise. 1717 1718 * config/tc-i386.c (output_invalid): Use snprintf instead of 1719 sprintf. 1720 * config/tc-ia64.c (declare_register_set): Likewise. 1721 (emit_one_bundle): Likewise. 1722 (check_dependencies): Likewise. 1723 * config/tc-tic30.c (output_invalid): Likewise. 1724 17252006-05-02 Paul Brook <paul@codesourcery.com> 1726 1727 * config/tc-arm.c (arm_optimize_expr): New function. 1728 * config/tc-arm.h (md_optimize_expr): Define 1729 (arm_optimize_expr): Add prototype. 1730 (TC_FORCE_RELOCATION_SUB_SAME): Define. 1731 17322006-05-02 Ben Elliston <bje@au.ibm.com> 1733 1734 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit 1735 field unsigned. 1736 1737 * sb.h (sb_list_vector): Move to sb.c. 1738 * sb.c (free_list): Use type of sb_list_vector directly. 1739 (sb_build): Fix off-by-one error in assertion about `size'. 1740 17412006-05-01 Ben Elliston <bje@au.ibm.com> 1742 1743 * listing.c (listing_listing): Remove useless loop. 1744 * macro.c (macro_expand): Remove is_positional local variable. 1745 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1 1746 and simplify surrounding expressions, where possible. 1747 (assign_symbol): Likewise. 1748 (s_weakref): Likewise. 1749 * symbols.c (colon): Likewise. 1750 17512006-05-01 James Lemke <jwlemke@wasabisystems.com> 1752 1753 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL. 1754 17552006-04-30 Thiemo Seufer <ths@mips.com> 1756 David Ung <davidu@mips.com> 1757 1758 * config/tc-mips.c (validate_mips_insn): Handling of udi cases. 1759 (mips_immed): New table that records various handling of udi 1760 instruction patterns. 1761 (mips_ip): Adds udi handling. 1762 17632006-04-28 Alan Modra <amodra@bigpond.net.au> 1764 1765 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end 1766 of list rather than beginning. 1767 17682006-04-26 Julian Brown <julian@codesourcery.com> 1769 1770 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to... 1771 (is_quarter_float): Rename from above. Simplify slightly. 1772 (parse_qfloat_immediate): Parse a "quarter precision" floating-point 1773 number. 1774 (parse_neon_mov): Parse floating-point constants. 1775 (neon_qfloat_bits): Fix encoding. 1776 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in 1777 preference to integer encoding when using the F32 type. 1778 17792006-04-26 Julian Brown <julian@codesourcery.com> 1780 1781 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so 1782 zero-initialising structures containing it will lead to invalid types). 1783 (arm_it): Add vectype to each operand. 1784 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias 1785 defined field. 1786 (neon_typed_alias): New structure. Extra information for typed 1787 register aliases. 1788 (reg_entry): Add neon type info field. 1789 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments). 1790 Break out alternative syntax for coprocessor registers, etc. into... 1791 (arm_reg_alt_syntax): New function. Alternate syntax handling broken 1792 out from arm_reg_parse. 1793 (parse_neon_type): Move. Return SUCCESS/FAIL. 1794 (first_error): New function. Call to ensure first error which occurs is 1795 reported. 1796 (parse_neon_operand_type): Parse exactly one type. 1797 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move. 1798 (parse_typed_reg_or_scalar): New function. Handle core of both 1799 arm_typed_reg_parse and parse_scalar. 1800 (arm_typed_reg_parse): Parse a register with an optional type. 1801 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar 1802 result. 1803 (parse_scalar): Parse a Neon scalar with optional type. 1804 (parse_reg_list): Use first_error. 1805 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse. 1806 (neon_alias_types_same): New function. Return true if two (alias) types 1807 are the same. 1808 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type 1809 of elements. 1810 (insert_reg_alias): Return new reg_entry not void. 1811 (insert_neon_reg_alias): New function. Insert type/index information as 1812 well as register for alias. 1813 (create_neon_reg_alias): New function. Parse .dn/.qn directives and 1814 make typed register aliases accordingly. 1815 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start 1816 of line. 1817 (s_unreq): Delete type information if present. 1818 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls. 1819 (s_arm_unwind_save_mmxwcg): Likewise. 1820 (s_arm_unwind_movsp): Likewise. 1821 (s_arm_unwind_setfp): Likewise. 1822 (parse_shift): Likewise. 1823 (parse_shifter_operand): Likewise. 1824 (parse_address): Likewise. 1825 (parse_tb): Likewise. 1826 (tc_arm_regname_to_dw2regnum): Likewise. 1827 (md_pseudo_table): Add dn, qn. 1828 (parse_neon_mov): Handle typed operands. 1829 (parse_operands): Likewise. 1830 (neon_type_mask): Add N_SIZ. 1831 (N_ALLMODS): New macro. 1832 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error. 1833 (el_type_of_type_chk): Add some safeguards. 1834 (modify_types_allowed): Fix logic bug. 1835 (neon_check_type): Handle operands with types. 1836 (neon_three_same): Remove redundant optional arg handling. 1837 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm) 1838 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute) 1839 (do_neon_step): Adjust accordingly. 1840 (neon_cmode_for_logic_imm): Use first_error. 1841 (do_neon_bitfield): Call neon_check_type. 1842 (neon_dyadic): Rename to... 1843 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield 1844 to allow modification of type of the destination. 1845 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d) 1846 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly. 1847 (do_neon_compare): Make destination be an untyped bitfield. 1848 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX. 1849 (neon_mul_mac): Return early in case of errors. 1850 (neon_move_immediate): Use first_error. 1851 (neon_mac_reg_scalar_long): Fix type to include scalar. 1852 (do_neon_dup): Likewise. 1853 (do_neon_mov): Likewise (in several places). 1854 (do_neon_tbl_tbx): Fix type. 1855 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane) 1856 (do_neon_ld_dup): Exit early in case of errors and/or use 1857 first_error. 1858 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL. 1859 Handle .dn/.qn directives. 1860 (REGDEF): Add zero for reg_entry neon field. 1861 18622006-04-26 Julian Brown <julian@codesourcery.com> 1863 1864 * config/tc-arm.c (limits.h): Include. 1865 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1) 1866 (fpu_vfp_v3_or_neon_ext): Declare constants. 1867 (neon_el_type): New enumeration of types for Neon vector elements. 1868 (neon_type_el): New struct. Define type and size of a vector element. 1869 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per 1870 instruction. 1871 (neon_type): Define struct. The type of an instruction. 1872 (arm_it): Add 'vectype' for the current instruction. 1873 (isscalar, immisalign, regisimm, isquad): New predicates for operands. 1874 (vfp_sp_reg_pos): Rename to... 1875 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn 1876 tags. 1877 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ 1878 (Neon D or Q register). 1879 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D 1880 register. 1881 (GE_OPT_PREFIX_BIG): Define constant, for use in... 1882 (my_get_expression): Allow above constant as argument to accept 1883 64-bit constants with optional prefix. 1884 (arm_reg_parse): Add extra argument to return the specific type of 1885 register in when either a D or Q register (REG_TYPE_NDQ) is 1886 requested. Can be NULL. 1887 (parse_scalar): New function. Parse Neon scalar (vector reg and index). 1888 (parse_reg_list): Update for new arm_reg_parse args. 1889 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists. 1890 (parse_neon_el_struct_list): New function. Parse element/structure 1891 register lists for VLD<n>/VST<n> instructions. 1892 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args. 1893 (s_arm_unwind_save_mmxwr): Likewise. 1894 (s_arm_unwind_save_mmxwcg): Likewise. 1895 (s_arm_unwind_movsp): Likewise. 1896 (s_arm_unwind_setfp): Likewise. 1897 (parse_big_immediate): New function. Parse an immediate, which may be 1898 64 bits wide. Put results in inst.operands[i]. 1899 (parse_shift): Update for new arm_reg_parse args. 1900 (parse_address): Likewise. Add parsing of alignment specifiers. 1901 (parse_neon_mov): Parse the operands of a VMOV instruction. 1902 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST, 1903 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC, 1904 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64, 1905 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ. 1906 (parse_operands): Handle new codes above. 1907 (encode_arm_vfp_sp_reg): Rename to... 1908 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if 1909 selected VFP version only supports D0-D15. 1910 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z) 1911 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2) 1912 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst) 1913 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new 1914 encode_arm_vfp_reg name, and allow 32 D regs. 1915 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm) 1916 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D 1917 regs. 1918 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16) 1919 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle 1920 constant-load and conversion insns introduced with VFPv3. 1921 (neon_tab_entry): New struct. 1922 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and 1923 those which are the targets of pseudo-instructions. 1924 (neon_opc): Enumerate opcodes, use as indices into... 1925 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB. 1926 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT) 1927 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE) 1928 (NEON_ENC_DUP): Define meaningful helper macros to look up values in 1929 neon_enc_tab. 1930 (neon_shape): Enumerate shapes (permitted register widths, etc.) for 1931 Neon instructions. 1932 (neon_type_mask): New. Compact type representation for type checking. 1933 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common 1934 permitted type combinations. 1935 (N_IGNORE_TYPE): New macro. 1936 (neon_check_shape): New function. Check an instruction shape for 1937 multiple alternatives. Return the specific shape for the current 1938 instruction. 1939 (neon_modify_type_size): New function. Modify a vector type and size, 1940 depending on the bit mask in argument 1. 1941 (neon_type_promote): New function. Convert a given "key" type (of an 1942 operand) into the correct type for a different operand, based on a bit 1943 mask. 1944 (type_chk_of_el_type): New function. Convert a type and size into the 1945 compact representation used for type checking. 1946 (el_type_of_type_ckh): New function. Reverse of above (only when a 1947 single bit is set in the bit mask). 1948 (modify_types_allowed): New function. Alter a mask of allowed types 1949 based on a bit mask of modifications. 1950 (neon_check_type): New function. Check the type of the current 1951 instruction against the variable argument list. The "key" type of the 1952 instruction is returned. 1953 (neon_dp_fixup): New function. Fill in and modify instruction bits for 1954 a Neon data-processing instruction depending on whether we're in ARM 1955 mode or Thumb-2 mode. 1956 (neon_logbits): New function. 1957 (neon_three_same, neon_two_same, do_neon_dyadic_i_su) 1958 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm) 1959 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes) 1960 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits) 1961 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size) 1962 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su) 1963 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d) 1964 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare) 1965 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul) 1966 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul) 1967 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv) 1968 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri) 1969 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun) 1970 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn) 1971 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt) 1972 (neon_move_immediate, do_neon_mvn, neon_mixed_length) 1973 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long) 1974 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull) 1975 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov) 1976 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp) 1977 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est) 1978 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx) 1979 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave) 1980 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup) 1981 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding 1982 helpers. 1983 (parse_neon_type): New function. Parse Neon type specifier. 1984 (opcode_lookup): Allow parsing of Neon type specifiers. 1985 (REGNUM2, REGSETH, REGSET2): New macros. 1986 (reg_names): Add new VFPv3 and Neon registers. 1987 (NUF, nUF, NCE, nCE): New macros for opcode table. 1988 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh, 1989 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd, 1990 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd. 1991 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl, 1992 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif, 1993 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla, 1994 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt, 1995 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli, 1996 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, 1997 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, 1998 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, 1999 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, 2000 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, 2001 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], 2002 fto[us][lh][sd]. 2003 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args. 2004 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8. 2005 (arm_option_cpu_value): Add vfp3 and neon. 2006 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix 2007 VFPv1 attribute. 2008 20092006-04-25 Bob Wilson <bob.wilson@acm.org> 2010 2011 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>" 2012 syntax instead of hardcoded opcodes with ".w18" suffixes. 2013 (wide_branch_opcode): New. 2014 (build_transition): Use it to check for wide branch opcodes with 2015 either ".w18" or ".w15" suffixes. 2016 20172006-04-25 Bob Wilson <bob.wilson@acm.org> 2018 2019 * config/tc-xtensa.c (xtensa_create_literal_symbol, 2020 xg_assemble_literal, xg_assemble_literal_space): Do not set the 2021 frag's is_literal flag. 2022 20232006-04-25 Bob Wilson <bob.wilson@acm.org> 2024 2025 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default. 2026 20272006-04-23 Kazu Hirata <kazu@codesourcery.com> 2028 2029 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c, 2030 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c, 2031 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h, 2032 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c, 2033 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos. 2034 20352005-04-20 Paul Brook <paul@codesourcery.com> 2036 2037 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for 2038 all targets. 2039 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets. 2040 20412006-04-19 Alan Modra <amodra@bigpond.net.au> 2042 2043 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort. 2044 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid. 2045 Make some cpus unsupported on ELF. Run "make dep-am". 2046 * Makefile.in: Regenerate. 2047 20482006-04-19 Alan Modra <amodra@bigpond.net.au> 2049 2050 * configure.in (--enable-targets): Indent help message. 2051 * configure: Regenerate. 2052 20532006-04-18 H.J. Lu <hongjiu.lu@intel.com> 2054 2055 PR gas/2533 2056 * config/tc-i386.c (i386_immediate): Check illegal immediate 2057 register operand. 2058 20592006-04-18 Alan Modra <amodra@bigpond.net.au> 2060 2061 * config/tc-i386.c: Formatting. 2062 (output_disp, output_imm): ISO C90 params. 2063 2064 * frags.c (frag_offset_fixed_p): Constify args. 2065 * frags.h (frag_offset_fixed_p): Ditto. 2066 2067 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete. 2068 (COFF_MAGIC): Delete. 2069 2070 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete. 2071 20722006-04-16 Daniel Jacobowitz <dan@codesourcery.com> 2073 2074 * po/POTFILES.in: Regenerated. 2075 20762006-04-16 Mark Mitchell <mark@codesourcery.com> 2077 2078 * doc/as.texinfo: Mention that some .type syntaxes are not 2079 supported on all architectures. 2080 20812006-04-14 Sterling Augustine <sterling@tensilica.com> 2082 2083 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI 2084 instructions when such transformations have been disabled. 2085 20862006-04-10 Sterling Augustine <sterling@tensilica.com> 2087 2088 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target 2089 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags. 2090 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of 2091 decoding the loop instructions. Remove current_offset variable. 2092 (xtensa_fix_short_loop_frags): Likewise. 2093 (min_bytes_to_other_loop_end): Remove current_offset argument. 2094 20952006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl> 2096 2097 * config/tc-z80.c (z80_optimize_expr): Removed. 2098 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed. 2099 21002006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de> 2101 2102 * gas/config/tc-avr.c (mcu_types): Add support for attiny261, 2103 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24, 2104 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324, 2105 atmega644, atmega329, atmega3290, atmega649, atmega6490, 2106 atmega406, atmega640, atmega1280, atmega1281, at90can32, 2107 at90can64, at90usb646, at90usb647, at90usb1286 and 2108 at90usb1287. 2109 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx. 2110 21112006-04-07 Paul Brook <paul@codesourcery.com> 2112 2113 * config/tc-arm.c (parse_operands): Set default error message. 2114 21152006-04-07 Paul Brook <paul@codesourcery.com> 2116 2117 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL. 2118 21192006-04-07 Paul Brook <paul@codesourcery.com> 2120 2121 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction. 2122 21232006-04-07 Paul Brook <paul@codesourcery.com> 2124 2125 * config/tc-arm.c (THUMB2_LOAD_BIT): Define. 2126 (move_or_literal_pool): Handle Thumb-2 instructions. 2127 (do_t_ldst): Call move_or_literal_pool for =N addressing modes. 2128 21292006-04-07 Alan Modra <amodra@bigpond.net.au> 2130 2131 PR 2512. 2132 * config/tc-i386.c (match_template): Move 64-bit operand tests 2133 inside loop. 2134 21352006-04-06 Carlos O'Donell <carlos@codesourcery.com> 2136 2137 * po/Make-in: Add install-html target. 2138 * Makefile.am: Add install-html and install-html-recursive targets. 2139 * Makefile.in: Regenerate. 2140 * configure.in: AC_SUBST datarootdir, docdir, htmldir. 2141 * configure: Regenerate. 2142 * doc/Makefile.am: Add install-html and install-html-am targets. 2143 * doc/Makefile.in: Regenerate. 2144 21452006-04-06 Alan Modra <amodra@bigpond.net.au> 2146 2147 * frags.c (frag_offset_fixed_p): Reinitialise offset before 2148 second scan. 2149 21502006-04-05 Richard Sandiford <richard@codesourcery.com> 2151 Daniel Jacobowitz <dan@codesourcery.com> 2152 2153 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS. 2154 (GOTT_BASE, GOTT_INDEX): New. 2155 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and 2156 GOTT_INDEX when generating VxWorks PIC. 2157 * configure.tgt (sparc*-*-vxworks*): Remove this special case; 2158 use the generic *-*-vxworks* stanza instead. 2159 21602006-04-04 Alan Modra <amodra@bigpond.net.au> 2161 2162 PR 997 2163 * frags.c (frag_offset_fixed_p): New function. 2164 * frags.h (frag_offset_fixed_p): Declare. 2165 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction. 2166 (resolve_expression): Likewise. 2167 21682006-04-03 Sterling Augustine <sterling@tensilica.com> 2169 2170 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats 2171 of the same length but different numbers of slots. 2172 21732006-03-30 Andreas Schwab <schwab@suse.de> 2174 2175 * configure.in: Fix help string for --enable-targets option. 2176 * configure: Regenerate. 2177 21782006-03-28 Nathan Sidwell <nathan@codesourcery.com> 2179 2180 * gas/config/tc-m68k.c (find_cf_chip): Merge into ... 2181 (m68k_ip): ... here. Use for all chips. Protect against buffer 2182 overrun and avoid excessive copying. 2183 2184 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs, 2185 m68020_control_regs, m68040_control_regs, m68060_control_regs, 2186 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs, 2187 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs, 2188 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ... 2189 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl, 2190 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl, 2191 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl, 2192 mcf5282_ctrl, mcfv4e_ctrl): ... these. 2193 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New. 2194 (struct m68k_cpu): Change chip field to control_regs. 2195 (current_chip): Remove. 2196 (control_regs): New. 2197 (m68k_archs, m68k_extensions): Adjust. 2198 (m68k_cpus): Reorder to be in cpu number order. Adjust. 2199 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove. 2200 (find_cf_chip): Reimplement for new organization of cpu table. 2201 (select_control_regs): Remove. 2202 (mri_chip): Adjust. 2203 (struct save_opts): Save control regs, not chip. 2204 (s_save, s_restore): Adjust. 2205 (m68k_lookup_cpu): Give deprecated warning when necessary. 2206 (m68k_init_arch): Adjust. 2207 (md_show_usage): Adjust for new cpu table organization. 2208 22092006-03-25 Bernd Schmidt <bernd.schmidt@analog.com> 2210 2211 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc. 2212 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4. 2213 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and 2214 "elf/bfin.h". 2215 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>. 2216 (any_gotrel): New rule. 2217 (got): Use it, and create Expr_Node_GOT_Reloc nodes. 2218 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and 2219 "elf/bfin.h". 2220 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New. 2221 (bfin_pic_ptr): New function. 2222 (md_pseudo_table): Add it for ".picptr". 2223 (OPTION_FDPIC): New macro. 2224 (md_longopts): Add -mfdpic. 2225 (md_parse_option): Handle it. 2226 (md_begin): Set BFD flags. 2227 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs. 2228 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives 2229 us for GOT relocs. 2230 * Makefile.am (bfin-parse.o): Update dependencies. 2231 (DEPTC_bfin_elf): Likewise. 2232 * Makefile.in: Regenerate. 2233 22342006-03-25 Richard Sandiford <richard@codesourcery.com> 2235 2236 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use 2237 mcfemac instead of mcfmac. 2238 22392006-03-23 Michael Matz <matz@suse.de> 2240 2241 * config/tc-i386.c (type_names): Correct placement of 'static'. 2242 (reloc): Map some more relocs to their 64 bit counterpart when 2243 size is 8. 2244 (output_insn): Work around breakage if DEBUG386 is defined. 2245 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also 2246 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or 2247 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing 2248 different from i386. 2249 (output_imm): Ditto. 2250 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also 2251 Imm64. 2252 (md_convert_frag): Jumps can now be larger than 2GB away, error 2253 out in that case. 2254 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64 2255 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64. 2256 22572006-03-22 Richard Sandiford <richard@codesourcery.com> 2258 Daniel Jacobowitz <dan@codesourcery.com> 2259 Phil Edwards <phil@codesourcery.com> 2260 Zack Weinberg <zack@codesourcery.com> 2261 Mark Mitchell <mark@codesourcery.com> 2262 Nathan Sidwell <nathan@codesourcery.com> 2263 2264 * config/tc-mips.c (mips_target_format): Handle vxworks targets. 2265 (md_begin): Complain about -G being used for PIC. Don't change 2266 the text, data and bss alignments on VxWorks. 2267 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when 2268 generating VxWorks PIC. 2269 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC. 2270 (macro): Likewise, but do not treat la $25 specially for 2271 VxWorks PIC, and do not handle jal. 2272 (OPTION_MVXWORKS_PIC): New macro. 2273 (md_longopts): Add -mvxworks-pic. 2274 (md_parse_option): Don't complain about using PIC and -G together here. 2275 Handle OPTION_MVXWORKS_PIC. 2276 (md_estimate_size_before_relax): Always use the first relaxation 2277 sequence on VxWorks. 2278 * config/tc-mips.h (VXWORKS_PIC): New. 2279 22802006-03-21 Paul Brook <paul@codesourcery.com> 2281 2282 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask. 2283 22842006-03-21 Sterling Augustine <sterling@tensilica.com> 2285 2286 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag. 2287 (xtensa_setup_hw_workarounds): Set this new flag for older hardware. 2288 (get_loop_align_size): New. 2289 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning. 2290 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag. 2291 (get_text_align_power): Rewrite to handle inputs in the range 2-8. 2292 (get_noop_aligned_address): Use get_loop_align_size. 2293 (get_aligned_diff): Likewise. 2294 22952006-03-21 Paul Brook <paul@codesourcery.com> 2296 2297 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt. 2298 22992006-03-20 Paul Brook <paul@codesourcery.com> 2300 2301 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define. 2302 (do_t_branch): Encode branches inside IT blocks as unconditional. 2303 (do_t_cps): New function. 2304 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi, 2305 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints. 2306 (opcode_lookup): Allow conditional suffixes on all instructions in 2307 Thumb mode. 2308 (md_assemble): Advance condexec state before checking for errors. 2309 (insns): Use do_t_cps. 2310 23112006-03-20 Paul Brook <paul@codesourcery.com> 2312 2313 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before 2314 outputting the insn. 2315 23162006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de> 2317 2318 * config/tc-vax.c: Update copyright year. 2319 * config/tc-vax.h: Likewise. 2320 23212006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de> 2322 2323 * config/tc-vax.c (md_chars_to_number): Used only locally, so 2324 make it static. 2325 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration. 2326 23272006-03-17 Paul Brook <paul@codesourcery.com> 2328 2329 * config/tc-arm.c (insns): Add ldm and stm. 2330 23312006-03-17 Ben Elliston <bje@au.ibm.com> 2332 2333 PR gas/2446 2334 * doc/as.texinfo (Ident): Document this directive more thoroughly. 2335 23362006-03-16 Paul Brook <paul@codesourcery.com> 2337 2338 * config/tc-arm.c (insns): Add "svc". 2339 23402006-03-13 Bob Wilson <bob.wilson@acm.org> 2341 2342 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar 2343 flag and avoid double underscore prefixes. 2344 23452006-03-10 Paul Brook <paul@codesourcery.com> 2346 2347 * config/tc-arm.c (md_begin): Handle EABIv5. 2348 (arm_eabis): Add EF_ARM_EABI_VER5. 2349 * doc/c-arm.texi: Document -meabi=5. 2350 23512006-03-10 Ben Elliston <bje@au.ibm.com> 2352 2353 * app.c (do_scrub_chars): Simplify string handling. 2354 23552006-03-07 Richard Sandiford <richard@codesourcery.com> 2356 Daniel Jacobowitz <dan@codesourcery.com> 2357 Zack Weinberg <zack@codesourcery.com> 2358 Nathan Sidwell <nathan@codesourcery.com> 2359 Paul Brook <paul@codesourcery.com> 2360 Ricardo Anguiano <anguiano@codesourcery.com> 2361 Phil Edwards <phil@codesourcery.com> 2362 2363 * config/tc-arm.c (md_apply_fix): Install a value of zero into a 2364 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA 2365 R_ARM_ABS12 reloc. 2366 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative 2367 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12 2368 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets. 2369 23702006-03-06 Bob Wilson <bob.wilson@acm.org> 2371 2372 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables 2373 even when using the text-section-literals option. 2374 23752006-03-06 Nathan Sidwell <nathan@codesourcery.com> 2376 2377 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k 2378 and cf. 2379 (m68k_ip): <case 'J'> Check we have some control regs. 2380 (md_parse_option): Allow raw arch switch. 2381 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect 2382 whether 68881 or cfloat was meant by -mfloat. 2383 (md_show_usage): Adjust extension display. 2384 (m68k_elf_final_processing): Adjust. 2385 23862006-03-03 Bjoern Haase <bjoern.m.haase@web.de> 2387 2388 * config/tc-avr.c (avr_mod_hash_value): New function. 2389 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and 2390 BFD_RELOC_MS8_LDI for hlo8() and hhi8() 2391 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value 2392 instead of int avr_ldi_expression: use avr_mod_hash_value instead 2393 of (int). 2394 (tc_gen_reloc): Handle substractions of symbols, if possible do 2395 fixups, abort otherwise. 2396 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX, 2397 tc_fix_adjustable): Define. 2398 23992006-03-02 James E Wilson <wilson@specifix.com> 2400 2401 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we 2402 change the template, then clear md.slot[curr].end_of_insn_group. 2403 24042006-02-28 Jan Beulich <jbeulich@novell.com> 2405 2406 * macro.c (get_any_string): Don't insert quotes for <>-quoted input. 2407 24082006-02-28 Jan Beulich <jbeulich@novell.com> 2409 2410 PR/1070 2411 * macro.c (getstring): Don't treat parentheses special anymore. 2412 (get_any_string): Don't consider '(' and ')' as quoting anymore. 2413 Special-case '(', ')', '[', and ']' when dealing with non-quoting 2414 characters. 2415 24162006-02-28 Mat <mat@csail.mit.edu> 2417 2418 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use. 2419 24202006-02-27 Jakub Jelinek <jakub@redhat.com> 2421 2422 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame 2423 field. 2424 (CFI_signal_frame): Define. 2425 (cfi_pseudo_table): Add .cfi_signal_frame. 2426 (dot_cfi): Handle CFI_signal_frame. 2427 (output_cie): Handle cie->signal_frame. 2428 (select_cie_for_fde): Don't share CIE if signal_frame flag is 2429 different. Copy signal_frame from FDE to newly created CIE. 2430 * doc/as.texinfo: Document .cfi_signal_frame. 2431 24322006-02-27 Carlos O'Donell <carlos@codesourcery.com> 2433 2434 * doc/Makefile.am: Add html target. 2435 * doc/Makefile.in: Regenerate. 2436 * po/Make-in: Add html target. 2437 24382006-02-27 H.J. Lu <hongjiu.lu@intel.com> 2439 2440 * config/tc-i386.c (output_insn): Support Intel Merom New 2441 Instructions. 2442 2443 * config/tc-i386.h (CpuMNI): New. 2444 (CpuUnknownFlags): Add CpuMNI. 2445 24462006-02-24 David S. Miller <davem@sunset.davemloft.net> 2447 2448 * config/tc-sparc.c (priv_reg_table): Add entry for "gl". 2449 (hpriv_reg_table): New table for hyperprivileged registers. 2450 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged 2451 register encoding. 2452 24532006-02-24 DJ Delorie <dj@redhat.com> 2454 2455 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix. 2456 (tc_gen_reloc): Don't define. 2457 * config/tc-m32c.c (rl_for, relaxable): New convenience macros. 2458 (OPTION_LINKRELAX): New. 2459 (md_longopts): Add it. 2460 (m32c_relax): New. 2461 (md_parse_options): Set it. 2462 (md_assemble): Emit relaxation relocs as needed. 2463 (md_convert_frag): Emit relaxation relocs as needed. 2464 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16. 2465 (m32c_apply_fix): New. 2466 (tc_gen_reloc): New. 2467 (m32c_force_relocation): Force out jump relocs when relaxing. 2468 (m32c_fix_adjustable): Return false if relaxing. 2469 24702006-02-24 Paul Brook <paul@codesourcery.com> 2471 2472 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7, 2473 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables. 2474 (struct asm_barrier_opt): Define. 2475 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables. 2476 (parse_psr): Accept V7M psr names. 2477 (parse_barrier): New function. 2478 (enum operand_parse_code): Add OP_oBARRIER. 2479 (parse_operands): Implement OP_oBARRIER. 2480 (do_barrier): New function. 2481 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions. 2482 (do_t_cpsi): Add V7M restrictions. 2483 (do_t_mrs, do_t_msr): Validate V7M variants. 2484 (md_assemble): Check for NULL variants. 2485 (v7m_psrs, barrier_opt_names): New tables. 2486 (insns): Add V7 instructions. Mark V6 instructions absent from V7M. 2487 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh. 2488 (arm_cpu_option_table): Add Cortex-M3, R4 and A8. 2489 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m. 2490 (struct cpu_arch_ver_table): Define. 2491 (cpu_arch_ver): New. 2492 (aeabi_set_public_attributes): Use cpu_arch_ver. Set 2493 Tag_CPU_arch_profile. 2494 * doc/c-arm.texi: Document new cpu and arch options. 2495 24962006-02-23 H.J. Lu <hongjiu.lu@intel.com> 2497 2498 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b. 2499 25002006-02-23 H.J. Lu <hongjiu.lu@intel.com> 2501 2502 * config/tc-ia64.c: Update copyright years. 2503 25042006-02-22 H.J. Lu <hongjiu.lu@intel.com> 2505 2506 * config/tc-ia64.c (specify_resource): Add the rule 17 from 2507 SDM 2.2. 2508 25092005-02-22 Paul Brook <paul@codesourcery.com> 2510 2511 * config/tc-arm.c (do_pld): Remove incorrect write to 2512 inst.instruction. 2513 (encode_thumb32_addr_mode): Use correct operand. 2514 25152006-02-21 Paul Brook <paul@codesourcery.com> 2516 2517 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors. 2518 25192006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 2520 Anil Paranjape <anilp1@kpitcummins.com> 2521 Shilin Shakti <shilins@kpitcummins.com> 2522 2523 * Makefile.am: Add xc16x related entry. 2524 * Makefile.in: Regenerate. 2525 * configure.in: Added xc16x related entry. 2526 * configure: Regenerate. 2527 * config/tc-xc16x.h: New file 2528 * config/tc-xc16x.c: New file 2529 * doc/c-xc16x.texi: New file for xc16x 2530 * doc/all.texi: Entry for xc16x 2531 * doc/Makefile.texi: Added c-xc16x.texi 2532 * NEWS: Announce the support for the new target. 2533 25342006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com> 2535 2536 * configure.tgt: set emulation for mips-*-netbsd* 2537 25382006-02-14 Jakub Jelinek <jakub@redhat.com> 2539 2540 * config.in: Rebuilt. 2541 25422006-02-13 Bob Wilson <bob.wilson@acm.org> 2543 2544 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting 2545 from 1, not 0, in error messages. 2546 (md_assemble): Simplify special-case check for ENTRY instructions. 2547 (tinsn_has_invalid_symbolic_operands): Do not include opcode and 2548 operand in error message. 2549 25502006-02-13 Joseph S. Myers <joseph@codesourcery.com> 2551 2552 * configure.tgt (arm-*-linux-gnueabi*): Change to 2553 arm-*-linux-*eabi*. 2554 25552006-02-10 Nick Clifton <nickc@redhat.com> 2556 2557 * config/tc-crx.c (check_range): Ensure that the sign bit of a 2558 32-bit value is propagated into the upper bits of a 64-bit long. 2559 2560 * config/tc-arc.c (init_opcode_tables): Fix cast. 2561 (arc_extoper, md_operand): Likewise. 2562 25632006-02-09 David Heine <dlheine@tensilica.com> 2564 2565 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for 2566 each relaxation step. 2567 25682006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr> 2569 2570 * configure.in (CHECK_DECLS): Add vsnprintf. 2571 * configure: Regenerate. 2572 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not 2573 include/declare here, but... 2574 * as.h: Move code detecting VARARGS idiom to the top. 2575 (errno.h, stdarg.h, varargs.h, va_list): ...here. 2576 (vsnprintf): Declare if not already declared. 2577 25782006-02-08 H.J. Lu <hongjiu.lu@intel.com> 2579 2580 * as.c (close_output_file): New. 2581 (main): Register close_output_file with xatexit before 2582 dump_statistics. Don't call output_file_close. 2583 25842006-02-07 Nathan Sidwell <nathan@codesourcery.com> 2585 2586 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs, 2587 mcf5329_control_regs): New. 2588 (not_current_architecture, selected_arch, selected_cpu): New. 2589 (m68k_archs, m68k_extensions): New. 2590 (archs): Renamed to ... 2591 (m68k_cpus): ... here. Adjust. 2592 (n_arches): Remove. 2593 (md_pseudo_table): Add arch and cpu directives. 2594 (find_cf_chip, m68k_ip): Adjust table scanning. 2595 (no_68851, no_68881): Remove. 2596 (md_assemble): Lazily initialize. 2597 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329. 2598 (md_init_after_args): Move functionality to m68k_init_arch. 2599 (mri_chip): Adjust table scanning. 2600 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu 2601 options with saner parsing. 2602 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension, 2603 m68k_init_arch): New. 2604 (s_m68k_cpu, s_m68k_arch): New. 2605 (md_show_usage): Adjust. 2606 (m68k_elf_final_processing): Set CF EF flags. 2607 * config/tc-m68k.h (m68k_init_after_args): Remove. 2608 (tc_init_after_args): Remove. 2609 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options. 2610 (M68k-Directives): Document .arch and .cpu directives. 2611 26122006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl> 2613 2614 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as 2615 synonyms for equ and defl. 2616 (z80_cons_fix_new): New function. 2617 (emit_byte): Disallow relative jumps to absolute locations. 2618 (emit_data): Only handle defb, prototype changed, because defb is 2619 now handled as pseudo-op rather than an instruction. 2620 (instab): Entries for defb,defw,db,dw moved from here... 2621 (md_pseudo_table): ... to here, use generic cons() for defw,dw. 2622 Add entries for def24,def32,d24,d32. 2623 (md_assemble): Improved error handling. 2624 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one. 2625 * config/tc-z80.h (TC_CONS_FIX_NEW): Define. 2626 (z80_cons_fix_new): Declare. 2627 * doc/c-z80.texi (defb, db): Mention warning on overflow. 2628 (def24,d24,def32,d32): New pseudo-ops. 2629 26302006-02-02 Paul Brook <paul@codesourcery.com> 2631 2632 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint. 2633 26342005-02-02 Paul Brook <paul@codesourcery.com> 2635 2636 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND, 2637 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR, 2638 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB, 2639 T2_OPCODE_RSB): Define. 2640 (thumb32_negate_data_op): New function. 2641 (md_apply_fix): Use it. 2642 26432006-01-31 Bob Wilson <bob.wilson@acm.org> 2644 2645 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol 2646 fields. 2647 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field. 2648 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of 2649 subtracted symbols. 2650 (relaxation_requirements): Add pfinish_frag argument and use it to 2651 replace setting tinsn->record_fix fields. 2652 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements 2653 and vinsn_to_insnbuf. Remove references to record_fix and 2654 slot_sub_symbols fields. 2655 (xtensa_mark_narrow_branches): Delete unused code. 2656 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just 2657 a symbol. 2658 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set 2659 record_fix fields. 2660 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols. 2661 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use 2662 of the record_fix field. Simplify error messages for unexpected 2663 symbolic operands. 2664 (set_expr_symbol_offset_diff): Delete. 2665 26662006-01-31 Paul Brook <paul@codesourcery.com> 2667 2668 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL. 2669 26702006-01-31 Paul Brook <paul@codesourcery.com> 2671 Richard Earnshaw <rearnsha@arm.com> 2672 2673 * config/tc-arm.c: Use arm_feature_set. 2674 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none, 2675 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1, 2676 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2): 2677 New variables. 2678 (insns): Use them. 2679 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble, 2680 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch, 2681 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes, 2682 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU 2683 feature flags. 2684 (arm_legacy_option_table, arm_option_cpu_value_table): New types. 2685 (arm_opts): Move old cpu/arch options from here... 2686 (arm_legacy_opts): ... to here. 2687 (md_parse_option): Search arm_legacy_opts. 2688 (arm_cpus, arm_archs, arm_extensions, arm_fpus) 2689 (arm_float_abis, arm_eabis): Make const. 2690 26912006-01-25 Bob Wilson <bob.wilson@acm.org> 2692 2693 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs. 2694 26952006-01-21 Jie Zhang <jie.zhang@analog.com> 2696 2697 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate 2698 in load immediate intruction. 2699 27002006-01-21 Jie Zhang <jie.zhang@analog.com> 2701 2702 * config/bfin-parse.y (value_match): Use correct conversion 2703 specifications in template string for __FILE__ and __LINE__. 2704 (binary): Ditto. 2705 (unary): Ditto. 2706 27072006-01-18 Alexandre Oliva <aoliva@redhat.com> 2708 2709 Introduce TLS descriptors for i386 and x86_64. 2710 * config/tc-i386.c (tc_i386_fix_adjustable): Handle 2711 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL, 2712 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL. 2713 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and 2714 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the 2715 displacement bits. 2716 (build_modrm_byte): Set up zero modrm for TLS desc calls. 2717 (lex_got): Handle @tlsdesc and @tlscall. 2718 (md_apply_fix, tc_gen_reloc): Handle the new relocations. 2719 27202006-01-11 Nick Clifton <nickc@redhat.com> 2721 2722 Fixes for building on 64-bit hosts: 2723 * config/tc-avr.c (mod_index): New union to allow conversion 2724 between pointers and integers. 2725 (md_begin, avr_ldi_expression): Use it. 2726 * config/tc-i370.c (md_assemble): Add cast for argument to print 2727 statement. 2728 * config/tc-tic54x.c (subsym_substitute): Likewise. 2729 * config/tc-mn10200.c (md_assemble): Use a union to convert the 2730 opindex field of fr_cgen structure into a pointer so that it can 2731 be stored in a frag. 2732 * config/tc-mn10300.c (md_assemble): Likewise. 2733 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer 2734 types. 2735 * config/tc-v850.c: Replace uses of (int) casts with correct 2736 types. 2737 27382006-01-09 H.J. Lu <hongjiu.lu@intel.com> 2739 2740 PR gas/2117 2741 * symbols.c (snapshot_symbol): Don't change a defined symbol. 2742 27432006-01-03 Hans-Peter Nilsson <hp@bitrange.com> 2744 2745 PR gas/2101 2746 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as 2747 a local-label reference. 2748 2749For older changes see ChangeLog-2005 2750 2751Local Variables: 2752mode: change-log 2753left-margin: 8 2754fill-column: 74 2755version-control: never 2756End: 2757