1/******************************************************************************
2 * xen.h
3 *
4 * Guest OS interface to Xen.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Copyright (c) 2004, K A Fraser
25 */
26
27#ifndef __XEN_PUBLIC_XEN_H__
28#define __XEN_PUBLIC_XEN_H__
29
30#include "xen-compat.h"
31
32#if defined(__i386__) || defined(__x86_64__)
33#include "arch-x86/xen.h"
34#elif defined(__ia64__)
35#include "arch-ia64.h"
36#elif defined(__arm__)
37#include "arch-arm.h"
38#else
39#error "Unsupported architecture"
40#endif
41
42#ifndef __ASSEMBLY__
43/* Guest handles for primitive C types. */
44DEFINE_XEN_GUEST_HANDLE(char);
45__DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char);
46DEFINE_XEN_GUEST_HANDLE(int);
47__DEFINE_XEN_GUEST_HANDLE(uint,  unsigned int);
48DEFINE_XEN_GUEST_HANDLE(long);
49__DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
50DEFINE_XEN_GUEST_HANDLE(void);
51
52DEFINE_XEN_GUEST_HANDLE(uint64_t);
53DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
54#endif
55
56/*
57 * HYPERCALLS
58 */
59
60/* `incontents 100 hcalls List of hypercalls
61 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*()
62 */
63
64#define __HYPERVISOR_set_trap_table        0
65#define __HYPERVISOR_mmu_update            1
66#define __HYPERVISOR_set_gdt               2
67#define __HYPERVISOR_stack_switch          3
68#define __HYPERVISOR_set_callbacks         4
69#define __HYPERVISOR_fpu_taskswitch        5
70#define __HYPERVISOR_sched_op_compat       6 /* compat since 0x00030101 */
71#define __HYPERVISOR_platform_op           7
72#define __HYPERVISOR_set_debugreg          8
73#define __HYPERVISOR_get_debugreg          9
74#define __HYPERVISOR_update_descriptor    10
75#define __HYPERVISOR_memory_op            12
76#define __HYPERVISOR_multicall            13
77#define __HYPERVISOR_update_va_mapping    14
78#define __HYPERVISOR_set_timer_op         15
79#define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */
80#define __HYPERVISOR_xen_version          17
81#define __HYPERVISOR_console_io           18
82#define __HYPERVISOR_physdev_op_compat    19 /* compat since 0x00030202 */
83#define __HYPERVISOR_grant_table_op       20
84#define __HYPERVISOR_vm_assist            21
85#define __HYPERVISOR_update_va_mapping_otherdomain 22
86#define __HYPERVISOR_iret                 23 /* x86 only */
87#define __HYPERVISOR_vcpu_op              24
88#define __HYPERVISOR_set_segment_base     25 /* x86/64 only */
89#define __HYPERVISOR_mmuext_op            26
90#define __HYPERVISOR_xsm_op               27
91#define __HYPERVISOR_nmi_op               28
92#define __HYPERVISOR_sched_op             29
93#define __HYPERVISOR_callback_op          30
94#define __HYPERVISOR_xenoprof_op          31
95#define __HYPERVISOR_event_channel_op     32
96#define __HYPERVISOR_physdev_op           33
97#define __HYPERVISOR_hvm_op               34
98#define __HYPERVISOR_sysctl               35
99#define __HYPERVISOR_domctl               36
100#define __HYPERVISOR_kexec_op             37
101#define __HYPERVISOR_tmem_op              38
102#define __HYPERVISOR_xc_reserved_op       39 /* reserved for XenClient */
103
104/* Architecture-specific hypercall definitions. */
105#define __HYPERVISOR_arch_0               48
106#define __HYPERVISOR_arch_1               49
107#define __HYPERVISOR_arch_2               50
108#define __HYPERVISOR_arch_3               51
109#define __HYPERVISOR_arch_4               52
110#define __HYPERVISOR_arch_5               53
111#define __HYPERVISOR_arch_6               54
112#define __HYPERVISOR_arch_7               55
113
114/* ` } */
115
116/*
117 * HYPERCALL COMPATIBILITY.
118 */
119
120/* New sched_op hypercall introduced in 0x00030101. */
121#if __XEN_INTERFACE_VERSION__ < 0x00030101
122#undef __HYPERVISOR_sched_op
123#define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
124#endif
125
126/* New event-channel and physdev hypercalls introduced in 0x00030202. */
127#if __XEN_INTERFACE_VERSION__ < 0x00030202
128#undef __HYPERVISOR_event_channel_op
129#define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
130#undef __HYPERVISOR_physdev_op
131#define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
132#endif
133
134/* New platform_op hypercall introduced in 0x00030204. */
135#if __XEN_INTERFACE_VERSION__ < 0x00030204
136#define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
137#endif
138
139/*
140 * VIRTUAL INTERRUPTS
141 *
142 * Virtual interrupts that a guest OS may receive from Xen.
143 *
144 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
145 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
146 * The latter can be allocated only once per guest: they must initially be
147 * allocated to VCPU0 but can subsequently be re-bound.
148 */
149/* ` enum virq { */
150#define VIRQ_TIMER      0  /* V. Timebase update, and/or requested timeout.  */
151#define VIRQ_DEBUG      1  /* V. Request guest to dump debug info.           */
152#define VIRQ_CONSOLE    2  /* G. (DOM0) Bytes received on emergency console. */
153#define VIRQ_DOM_EXC    3  /* G. (DOM0) Exceptional event for some domain.   */
154#define VIRQ_TBUF       4  /* G. (DOM0) Trace buffer has records available.  */
155#define VIRQ_DEBUGGER   6  /* G. (DOM0) A domain has paused for debugging.   */
156#define VIRQ_XENOPROF   7  /* V. XenOprofile interrupt: new sample available */
157#define VIRQ_CON_RING   8  /* G. (DOM0) Bytes received on console            */
158#define VIRQ_PCPU_STATE 9  /* G. (DOM0) PCPU state changed                   */
159#define VIRQ_MEM_EVENT  10 /* G. (DOM0) A memory event has occured           */
160#define VIRQ_XC_RESERVED 11 /* G. Reserved for XenClient                     */
161#define VIRQ_ENOMEM     12 /* G. (DOM0) Low on heap memory       */
162
163/* Architecture-specific VIRQ definitions. */
164#define VIRQ_ARCH_0    16
165#define VIRQ_ARCH_1    17
166#define VIRQ_ARCH_2    18
167#define VIRQ_ARCH_3    19
168#define VIRQ_ARCH_4    20
169#define VIRQ_ARCH_5    21
170#define VIRQ_ARCH_6    22
171#define VIRQ_ARCH_7    23
172/* ` } */
173
174#define NR_VIRQS       24
175
176/*
177 * ` enum neg_errnoval
178 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[],
179 * `                       unsigned count, unsigned *done_out,
180 * `                       unsigned foreigndom)
181 * `
182 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs).
183 * @count is the length of the above array.
184 * @pdone is an output parameter indicating number of completed operations
185 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this
186 *                    hypercall invocation. Can be DOMID_SELF.
187 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced
188 *                     in this hypercall invocation. The value of this field
189 *                     (x) encodes the PFD as follows:
190 *                     x == 0 => PFD == DOMID_SELF
191 *                     x != 0 => PFD == x - 1
192 *
193 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command.
194 * -------------
195 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
196 * Updates an entry in a page table belonging to PFD. If updating an L1 table,
197 * and the new table entry is valid/present, the mapped frame must belong to
198 * FD. If attempting to map an I/O page then the caller assumes the privilege
199 * of the FD.
200 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
201 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
202 * ptr[:2]  -- Machine address of the page-table entry to modify.
203 * val      -- Value to write.
204 *
205 * There also certain implicit requirements when using this hypercall. The
206 * pages that make up a pagetable must be mapped read-only in the guest.
207 * This prevents uncontrolled guest updates to the pagetable. Xen strictly
208 * enforces this, and will disallow any pagetable update which will end up
209 * mapping pagetable page RW, and will disallow using any writable page as a
210 * pagetable. In practice it means that when constructing a page table for a
211 * process, thread, etc, we MUST be very dilligient in following these rules:
212 *  1). Start with top-level page (PGD or in Xen language: L4). Fill out
213 *      the entries.
214 *  2). Keep on going, filling out the upper (PUD or L3), and middle (PMD
215 *      or L2).
216 *  3). Start filling out the PTE table (L1) with the PTE entries. Once
217 *  	done, make sure to set each of those entries to RO (so writeable bit
218 *  	is unset). Once that has been completed, set the PMD (L2) for this
219 *  	PTE table as RO.
220 *  4). When completed with all of the PMD (L2) entries, and all of them have
221 *  	been set to RO, make sure to set RO the PUD (L3). Do the same
222 *  	operation on PGD (L4) pagetable entries that have a PUD (L3) entry.
223 *  5). Now before you can use those pages (so setting the cr3), you MUST also
224 *      pin them so that the hypervisor can verify the entries. This is done
225 *      via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame
226 *      number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op(
227 *      MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be
228 *      issued.
229 * For 32-bit guests, the L4 is not used (as there is less pagetables), so
230 * instead use L3.
231 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE
232 * hypercall. Also if so desired the OS can also try to write to the PTE
233 * and be trapped by the hypervisor (as the PTE entry is RO).
234 *
235 * To deallocate the pages, the operations are the reverse of the steps
236 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the
237 * pagetable MUST not be in use (meaning that the cr3 is not set to it).
238 *
239 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
240 * Updates an entry in the machine->pseudo-physical mapping table.
241 * ptr[:2]  -- Machine address within the frame whose mapping to modify.
242 *             The frame must belong to the FD, if one is specified.
243 * val      -- Value to write into the mapping entry.
244 *
245 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD:
246 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed
247 * with those in @val.
248 *
249 * @val is usually the machine frame number along with some attributes.
250 * The attributes by default follow the architecture defined bits. Meaning that
251 * if this is a X86_64 machine and four page table layout is used, the layout
252 * of val is:
253 *  - 63 if set means No execute (NX)
254 *  - 46-13 the machine frame number
255 *  - 12 available for guest
256 *  - 11 available for guest
257 *  - 10 available for guest
258 *  - 9 available for guest
259 *  - 8 global
260 *  - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages)
261 *  - 6 dirty
262 *  - 5 accessed
263 *  - 4 page cached disabled
264 *  - 3 page write through
265 *  - 2 userspace accessible
266 *  - 1 writeable
267 *  - 0 present
268 *
269 *  The one bits that does not fit with the default layout is the PAGE_PSE
270 *  also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the
271 *  HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB
272 *  (or 2MB) instead of using the PAGE_PSE bit.
273 *
274 *  The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen
275 *  using it as the Page Attribute Table (PAT) bit - for details on it please
276 *  refer to Intel SDM 10.12. The PAT allows to set the caching attributes of
277 *  pages instead of using MTRRs.
278 *
279 *  The PAT MSR is as follow (it is a 64-bit value, each entry is 8 bits):
280 *             PAT4                 PAT0
281 *   +---+----+----+----+-----+----+----+
282 *    WC | WC | WB | UC | UC- | WC | WB |  <= Linux
283 *   +---+----+----+----+-----+----+----+
284 *    WC | WT | WB | UC | UC- | WT | WB |  <= BIOS (default when machine boots)
285 *   +---+----+----+----+-----+----+----+
286 *    WC | WP | WC | UC | UC- | WT | WB |  <= Xen
287 *   +---+----+----+----+-----+----+----+
288 *
289 *  The lookup of this index table translates to looking up
290 *  Bit 7, Bit 4, and Bit 3 of val entry:
291 *
292 *  PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3).
293 *
294 *  If all bits are off, then we are using PAT0. If bit 3 turned on,
295 *  then we are using PAT1, if bit 3 and bit 4, then PAT2..
296 *
297 *  As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means
298 *  that if a guest that follows Linux's PAT setup and would like to set Write
299 *  Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is
300 *  set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the
301 *  caching as:
302 *
303 *   WB = none (so PAT0)
304 *   WC = PWT (bit 3 on)
305 *   UC = PWT | PCD (bit 3 and 4 are on).
306 *
307 * To make it work with Xen, it needs to translate the WC bit as so:
308 *
309 *  PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3
310 *
311 * And to translate back it would:
312 *
313 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7.
314 */
315#define MMU_NORMAL_PT_UPDATE      0 /* checked '*ptr = val'. ptr is MA.      */
316#define MMU_MACHPHYS_UPDATE       1 /* ptr = MA of frame to modify entry for */
317#define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */
318
319/*
320 * MMU EXTENDED OPERATIONS
321 *
322 * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
323 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
324 * Where the FD has some effect, it is described below.
325 *
326 * cmd: MMUEXT_(UN)PIN_*_TABLE
327 * mfn: Machine frame number to be (un)pinned as a p.t. page.
328 *      The frame must belong to the FD, if one is specified.
329 *
330 * cmd: MMUEXT_NEW_BASEPTR
331 * mfn: Machine frame number of new page-table base to install in MMU.
332 *
333 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
334 * mfn: Machine frame number of new page-table base to install in MMU
335 *      when in user space.
336 *
337 * cmd: MMUEXT_TLB_FLUSH_LOCAL
338 * No additional arguments. Flushes local TLB.
339 *
340 * cmd: MMUEXT_INVLPG_LOCAL
341 * linear_addr: Linear address to be flushed from the local TLB.
342 *
343 * cmd: MMUEXT_TLB_FLUSH_MULTI
344 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
345 *
346 * cmd: MMUEXT_INVLPG_MULTI
347 * linear_addr: Linear address to be flushed.
348 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
349 *
350 * cmd: MMUEXT_TLB_FLUSH_ALL
351 * No additional arguments. Flushes all VCPUs' TLBs.
352 *
353 * cmd: MMUEXT_INVLPG_ALL
354 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
355 *
356 * cmd: MMUEXT_FLUSH_CACHE
357 * No additional arguments. Writes back and flushes cache contents.
358 *
359 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL
360 * No additional arguments. Writes back and flushes cache contents
361 * on all CPUs in the system.
362 *
363 * cmd: MMUEXT_SET_LDT
364 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
365 * nr_ents: Number of entries in LDT.
366 *
367 * cmd: MMUEXT_CLEAR_PAGE
368 * mfn: Machine frame number to be cleared.
369 *
370 * cmd: MMUEXT_COPY_PAGE
371 * mfn: Machine frame number of the destination page.
372 * src_mfn: Machine frame number of the source page.
373 *
374 * cmd: MMUEXT_[UN]MARK_SUPER
375 * mfn: Machine frame number of head of superpage to be [un]marked.
376 */
377#define MMUEXT_PIN_L1_TABLE      0
378#define MMUEXT_PIN_L2_TABLE      1
379#define MMUEXT_PIN_L3_TABLE      2
380#define MMUEXT_PIN_L4_TABLE      3
381#define MMUEXT_UNPIN_TABLE       4
382#define MMUEXT_NEW_BASEPTR       5
383#define MMUEXT_TLB_FLUSH_LOCAL   6
384#define MMUEXT_INVLPG_LOCAL      7
385#define MMUEXT_TLB_FLUSH_MULTI   8
386#define MMUEXT_INVLPG_MULTI      9
387#define MMUEXT_TLB_FLUSH_ALL    10
388#define MMUEXT_INVLPG_ALL       11
389#define MMUEXT_FLUSH_CACHE      12
390#define MMUEXT_SET_LDT          13
391#define MMUEXT_NEW_USER_BASEPTR 15
392#define MMUEXT_CLEAR_PAGE       16
393#define MMUEXT_COPY_PAGE        17
394#define MMUEXT_FLUSH_CACHE_GLOBAL 18
395#define MMUEXT_MARK_SUPER       19
396#define MMUEXT_UNMARK_SUPER     20
397
398#ifndef __ASSEMBLY__
399struct mmuext_op {
400    unsigned int cmd;
401    union {
402        /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR
403         * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */
404        xen_pfn_t     mfn;
405        /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
406        unsigned long linear_addr;
407    } arg1;
408    union {
409        /* SET_LDT */
410        unsigned int nr_ents;
411        /* TLB_FLUSH_MULTI, INVLPG_MULTI */
412#if __XEN_INTERFACE_VERSION__ >= 0x00030205
413        XEN_GUEST_HANDLE(const_void) vcpumask;
414#else
415        const void *vcpumask;
416#endif
417        /* COPY_PAGE */
418        xen_pfn_t src_mfn;
419    } arg2;
420};
421typedef struct mmuext_op mmuext_op_t;
422DEFINE_XEN_GUEST_HANDLE(mmuext_op_t);
423#endif
424
425/* These are passed as 'flags' to update_va_mapping. They can be ORed. */
426/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap.   */
427/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer.         */
428#define UVMF_NONE               (0UL<<0) /* No flushing at all.   */
429#define UVMF_TLB_FLUSH          (1UL<<0) /* Flush entire TLB(s).  */
430#define UVMF_INVLPG             (2UL<<0) /* Flush only one entry. */
431#define UVMF_FLUSHTYPE_MASK     (3UL<<0)
432#define UVMF_MULTI              (0UL<<2) /* Flush subset of TLBs. */
433#define UVMF_LOCAL              (0UL<<2) /* Flush local TLB.      */
434#define UVMF_ALL                (1UL<<2) /* Flush all TLBs.       */
435
436/*
437 * Commands to HYPERVISOR_console_io().
438 */
439#define CONSOLEIO_write         0
440#define CONSOLEIO_read          1
441
442/*
443 * Commands to HYPERVISOR_vm_assist().
444 */
445#define VMASST_CMD_enable                0
446#define VMASST_CMD_disable               1
447
448/* x86/32 guests: simulate full 4GB segment limits. */
449#define VMASST_TYPE_4gb_segments         0
450
451/* x86/32 guests: trap (vector 15) whenever above vmassist is used. */
452#define VMASST_TYPE_4gb_segments_notify  1
453
454/*
455 * x86 guests: support writes to bottom-level PTEs.
456 * NB1. Page-directory entries cannot be written.
457 * NB2. Guest must continue to remove all writable mappings of PTEs.
458 */
459#define VMASST_TYPE_writable_pagetables  2
460
461/* x86/PAE guests: support PDPTs above 4GB. */
462#define VMASST_TYPE_pae_extended_cr3     3
463
464#define MAX_VMASST_TYPE                  3
465
466#ifndef __ASSEMBLY__
467
468typedef uint16_t domid_t;
469
470/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
471#define DOMID_FIRST_RESERVED (0x7FF0U)
472
473/* DOMID_SELF is used in certain contexts to refer to oneself. */
474#define DOMID_SELF (0x7FF0U)
475
476/*
477 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
478 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
479 * is useful to ensure that no mappings to the OS's own heap are accidentally
480 * installed. (e.g., in Linux this could cause havoc as reference counts
481 * aren't adjusted on the I/O-mapping code path).
482 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
483 * be specified by any calling domain.
484 */
485#define DOMID_IO   (0x7FF1U)
486
487/*
488 * DOMID_XEN is used to allow privileged domains to map restricted parts of
489 * Xen's heap space (e.g., the machine_to_phys table).
490 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
491 * the caller is privileged.
492 */
493#define DOMID_XEN  (0x7FF2U)
494
495/*
496 * DOMID_COW is used as the owner of sharable pages */
497#define DOMID_COW  (0x7FF3U)
498
499/* DOMID_INVALID is used to identify pages with unknown owner. */
500#define DOMID_INVALID (0x7FF4U)
501
502/* Idle domain. */
503#define DOMID_IDLE (0x7FFFU)
504
505/*
506 * Send an array of these to HYPERVISOR_mmu_update().
507 * NB. The fields are natural pointer/address size for this architecture.
508 */
509struct mmu_update {
510    uint64_t ptr;       /* Machine address of PTE. */
511    uint64_t val;       /* New contents of PTE.    */
512};
513typedef struct mmu_update mmu_update_t;
514DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
515
516/*
517 * Send an array of these to HYPERVISOR_multicall().
518 * NB. The fields are natural register size for this architecture.
519 */
520struct multicall_entry {
521    unsigned long op, result;
522    unsigned long args[6];
523};
524typedef struct multicall_entry multicall_entry_t;
525DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);
526
527/*
528 * Event channel endpoints per domain:
529 *  1024 if a long is 32 bits; 4096 if a long is 64 bits.
530 */
531#define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
532
533struct vcpu_time_info {
534    /*
535     * Updates to the following values are preceded and followed by an
536     * increment of 'version'. The guest can therefore detect updates by
537     * looking for changes to 'version'. If the least-significant bit of
538     * the version number is set then an update is in progress and the guest
539     * must wait to read a consistent set of values.
540     * The correct way to interact with the version number is similar to
541     * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry.
542     */
543    uint32_t version;
544    uint32_t pad0;
545    uint64_t tsc_timestamp;   /* TSC at last update of time vals.  */
546    uint64_t system_time;     /* Time, in nanosecs, since boot.    */
547    /*
548     * Current system time:
549     *   system_time +
550     *   ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32)
551     * CPU frequency (Hz):
552     *   ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
553     */
554    uint32_t tsc_to_system_mul;
555    int8_t   tsc_shift;
556    int8_t   pad1[3];
557}; /* 32 bytes */
558typedef struct vcpu_time_info vcpu_time_info_t;
559
560struct vcpu_info {
561    /*
562     * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
563     * a pending notification for a particular VCPU. It is then cleared
564     * by the guest OS /before/ checking for pending work, thus avoiding
565     * a set-and-check race. Note that the mask is only accessed by Xen
566     * on the CPU that is currently hosting the VCPU. This means that the
567     * pending and mask flags can be updated by the guest without special
568     * synchronisation (i.e., no need for the x86 LOCK prefix).
569     * This may seem suboptimal because if the pending flag is set by
570     * a different CPU then an IPI may be scheduled even when the mask
571     * is set. However, note:
572     *  1. The task of 'interrupt holdoff' is covered by the per-event-
573     *     channel mask bits. A 'noisy' event that is continually being
574     *     triggered can be masked at source at this very precise
575     *     granularity.
576     *  2. The main purpose of the per-VCPU mask is therefore to restrict
577     *     reentrant execution: whether for concurrency control, or to
578     *     prevent unbounded stack usage. Whatever the purpose, we expect
579     *     that the mask will be asserted only for short periods at a time,
580     *     and so the likelihood of a 'spurious' IPI is suitably small.
581     * The mask is read before making an event upcall to the guest: a
582     * non-zero mask therefore guarantees that the VCPU will not receive
583     * an upcall activation. The mask is cleared when the VCPU requests
584     * to block: this avoids wakeup-waiting races.
585     */
586    uint8_t evtchn_upcall_pending;
587    uint8_t evtchn_upcall_mask;
588    unsigned long evtchn_pending_sel;
589    struct arch_vcpu_info arch;
590    struct vcpu_time_info time;
591}; /* 64 bytes (x86) */
592#ifndef __XEN__
593typedef struct vcpu_info vcpu_info_t;
594#endif
595
596/*
597 * Xen/kernel shared data -- pointer provided in start_info.
598 *
599 * This structure is defined to be both smaller than a page, and the
600 * only data on the shared page, but may vary in actual size even within
601 * compatible Xen versions; guests should not rely on the size
602 * of this structure remaining constant.
603 */
604struct shared_info {
605    struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS];
606
607    /*
608     * A domain can create "event channels" on which it can send and receive
609     * asynchronous event notifications. There are three classes of event that
610     * are delivered by this mechanism:
611     *  1. Bi-directional inter- and intra-domain connections. Domains must
612     *     arrange out-of-band to set up a connection (usually by allocating
613     *     an unbound 'listener' port and avertising that via a storage service
614     *     such as xenstore).
615     *  2. Physical interrupts. A domain with suitable hardware-access
616     *     privileges can bind an event-channel port to a physical interrupt
617     *     source.
618     *  3. Virtual interrupts ('events'). A domain can bind an event-channel
619     *     port to a virtual interrupt source, such as the virtual-timer
620     *     device or the emergency console.
621     *
622     * Event channels are addressed by a "port index". Each channel is
623     * associated with two bits of information:
624     *  1. PENDING -- notifies the domain that there is a pending notification
625     *     to be processed. This bit is cleared by the guest.
626     *  2. MASK -- if this bit is clear then a 0->1 transition of PENDING
627     *     will cause an asynchronous upcall to be scheduled. This bit is only
628     *     updated by the guest. It is read-only within Xen. If a channel
629     *     becomes pending while the channel is masked then the 'edge' is lost
630     *     (i.e., when the channel is unmasked, the guest must manually handle
631     *     pending notifications as no upcall will be scheduled by Xen).
632     *
633     * To expedite scanning of pending notifications, any 0->1 pending
634     * transition on an unmasked channel causes a corresponding bit in a
635     * per-vcpu selector word to be set. Each bit in the selector covers a
636     * 'C long' in the PENDING bitfield array.
637     */
638    unsigned long evtchn_pending[sizeof(unsigned long) * 8];
639    unsigned long evtchn_mask[sizeof(unsigned long) * 8];
640
641    /*
642     * Wallclock time: updated only by control software. Guests should base
643     * their gettimeofday() syscall on this wallclock-base value.
644     */
645    uint32_t wc_version;      /* Version counter: see vcpu_time_info_t. */
646    uint32_t wc_sec;          /* Secs  00:00:00 UTC, Jan 1, 1970.  */
647    uint32_t wc_nsec;         /* Nsecs 00:00:00 UTC, Jan 1, 1970.  */
648
649    struct arch_shared_info arch;
650
651};
652#ifndef __XEN__
653typedef struct shared_info shared_info_t;
654#endif
655
656/*
657 * Start-of-day memory layout:
658 *  1. The domain is started within contiguous virtual-memory region.
659 *  2. The contiguous region ends on an aligned 4MB boundary.
660 *  3. This the order of bootstrap elements in the initial virtual region:
661 *      a. relocated kernel image
662 *      b. initial ram disk              [mod_start, mod_len]
663 *      c. list of allocated page frames [mfn_list, nr_pages]
664 *         (unless relocated due to XEN_ELFNOTE_INIT_P2M)
665 *      d. start_info_t structure        [register ESI (x86)]
666 *      e. bootstrap page tables         [pt_base, CR3 (x86)]
667 *      f. bootstrap stack               [register ESP (x86)]
668 *  4. Bootstrap elements are packed together, but each is 4kB-aligned.
669 *  5. The initial ram disk may be omitted.
670 *  6. The list of page frames forms a contiguous 'pseudo-physical' memory
671 *     layout for the domain. In particular, the bootstrap virtual-memory
672 *     region is a 1:1 mapping to the first section of the pseudo-physical map.
673 *  7. All bootstrap elements are mapped read-writable for the guest OS. The
674 *     only exception is the bootstrap page table, which is mapped read-only.
675 *  8. There is guaranteed to be at least 512kB padding after the final
676 *     bootstrap element. If necessary, the bootstrap virtual region is
677 *     extended by an extra 4MB to ensure this.
678 */
679
680#define MAX_GUEST_CMDLINE 1024
681struct start_info {
682    /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME.    */
683    char magic[32];             /* "xen-<version>-<platform>".            */
684    unsigned long nr_pages;     /* Total pages allocated to this domain.  */
685    unsigned long shared_info;  /* MACHINE address of shared info struct. */
686    uint32_t flags;             /* SIF_xxx flags.                         */
687    xen_pfn_t store_mfn;        /* MACHINE page number of shared page.    */
688    uint32_t store_evtchn;      /* Event channel for store communication. */
689    union {
690        struct {
691            xen_pfn_t mfn;      /* MACHINE page number of console page.   */
692            uint32_t  evtchn;   /* Event channel for console page.        */
693        } domU;
694        struct {
695            uint32_t info_off;  /* Offset of console_info struct.         */
696            uint32_t info_size; /* Size of console_info struct from start.*/
697        } dom0;
698    } console;
699    /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME).     */
700    unsigned long pt_base;      /* VIRTUAL address of page directory.     */
701    unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames.       */
702    unsigned long mfn_list;     /* VIRTUAL address of page-frame list.    */
703    unsigned long mod_start;    /* VIRTUAL address of pre-loaded module   */
704                                /* (PFN of pre-loaded module if           */
705                                /*  SIF_MOD_START_PFN set in flags).      */
706    unsigned long mod_len;      /* Size (bytes) of pre-loaded module.     */
707    int8_t cmd_line[MAX_GUEST_CMDLINE];
708    /* The pfn range here covers both page table and p->m table frames.   */
709    unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table.    */
710    unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table.  */
711};
712typedef struct start_info start_info_t;
713
714/* New console union for dom0 introduced in 0x00030203. */
715#if __XEN_INTERFACE_VERSION__ < 0x00030203
716#define console_mfn    console.domU.mfn
717#define console_evtchn console.domU.evtchn
718#endif
719
720/* These flags are passed in the 'flags' field of start_info_t. */
721#define SIF_PRIVILEGED    (1<<0)  /* Is the domain privileged? */
722#define SIF_INITDOMAIN    (1<<1)  /* Is this the initial control domain? */
723#define SIF_MULTIBOOT_MOD (1<<2)  /* Is mod_start a multiboot module? */
724#define SIF_MOD_START_PFN (1<<3)  /* Is mod_start a PFN? */
725#define SIF_PM_MASK       (0xFF<<8) /* reserve 1 byte for xen-pm options */
726
727/*
728 * A multiboot module is a package containing modules very similar to a
729 * multiboot module array. The only differences are:
730 * - the array of module descriptors is by convention simply at the beginning
731 *   of the multiboot module,
732 * - addresses in the module descriptors are based on the beginning of the
733 *   multiboot module,
734 * - the number of modules is determined by a termination descriptor that has
735 *   mod_start == 0.
736 *
737 * This permits to both build it statically and reference it in a configuration
738 * file, and let the PV guest easily rebase the addresses to virtual addresses
739 * and at the same time count the number of modules.
740 */
741struct xen_multiboot_mod_list
742{
743    /* Address of first byte of the module */
744    uint32_t mod_start;
745    /* Address of last byte of the module (inclusive) */
746    uint32_t mod_end;
747    /* Address of zero-terminated command line */
748    uint32_t cmdline;
749    /* Unused, must be zero */
750    uint32_t pad;
751};
752
753typedef struct dom0_vga_console_info {
754    uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */
755#define XEN_VGATYPE_TEXT_MODE_3 0x03
756#define XEN_VGATYPE_VESA_LFB    0x23
757#define XEN_VGATYPE_EFI_LFB     0x70
758
759    union {
760        struct {
761            /* Font height, in pixels. */
762            uint16_t font_height;
763            /* Cursor location (column, row). */
764            uint16_t cursor_x, cursor_y;
765            /* Number of rows and columns (dimensions in characters). */
766            uint16_t rows, columns;
767        } text_mode_3;
768
769        struct {
770            /* Width and height, in pixels. */
771            uint16_t width, height;
772            /* Bytes per scan line. */
773            uint16_t bytes_per_line;
774            /* Bits per pixel. */
775            uint16_t bits_per_pixel;
776            /* LFB physical address, and size (in units of 64kB). */
777            uint32_t lfb_base;
778            uint32_t lfb_size;
779            /* RGB mask offsets and sizes, as defined by VBE 1.2+ */
780            uint8_t  red_pos, red_size;
781            uint8_t  green_pos, green_size;
782            uint8_t  blue_pos, blue_size;
783            uint8_t  rsvd_pos, rsvd_size;
784#if __XEN_INTERFACE_VERSION__ >= 0x00030206
785            /* VESA capabilities (offset 0xa, VESA command 0x4f00). */
786            uint32_t gbl_caps;
787            /* Mode attributes (offset 0x0, VESA command 0x4f01). */
788            uint16_t mode_attrs;
789#endif
790        } vesa_lfb;
791    } u;
792} dom0_vga_console_info_t;
793#define xen_vga_console_info dom0_vga_console_info
794#define xen_vga_console_info_t dom0_vga_console_info_t
795
796typedef uint8_t xen_domain_handle_t[16];
797
798/* Turn a plain number into a C unsigned long constant. */
799#define __mk_unsigned_long(x) x ## UL
800#define mk_unsigned_long(x) __mk_unsigned_long(x)
801
802__DEFINE_XEN_GUEST_HANDLE(uint8,  uint8_t);
803__DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
804__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
805__DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t);
806
807#else /* __ASSEMBLY__ */
808
809/* In assembly code we cannot use C numeric constant suffixes. */
810#define mk_unsigned_long(x) x
811
812#endif /* !__ASSEMBLY__ */
813
814/* Default definitions for macros used by domctl/sysctl. */
815#if defined(__XEN__) || defined(__XEN_TOOLS__)
816
817#ifndef uint64_aligned_t
818#define uint64_aligned_t uint64_t
819#endif
820#ifndef XEN_GUEST_HANDLE_64
821#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
822#endif
823
824#ifndef __ASSEMBLY__
825struct xenctl_cpumap {
826    XEN_GUEST_HANDLE_64(uint8) bitmap;
827    uint32_t nr_cpus;
828};
829#endif
830
831#endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */
832
833#endif /* __XEN_PUBLIC_XEN_H__ */
834
835/*
836 * Local variables:
837 * mode: C
838 * c-set-style: "BSD"
839 * c-basic-offset: 4
840 * tab-width: 4
841 * indent-tabs-mode: nil
842 * End:
843 */
844