1/*-
2 * Copyright (C) 2012 Margarida Gouveia
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * $FreeBSD$
26 */
27
28#include <machine/bat.h>
29/*
30 * When we are invoked from Wii loaders, the state of the MMU and the BAT
31 * mappings can vary.  In this file we try to reset the MMU to a state
32 * that lets us boot FreeBSD.
33 *
34 * N.B.: keep the BAT0 in sync with mmu_oea.c and never touch BAT1 later.
35 *
36 * This file is being included from aim/locore32.S.
37 */
38
39#define	MMU_REALMODE()				\
40	mfmsr	%r12;				\
41	rlwinm	%r12, %r12, 0, ~(PSL_DR|PSL_IR);\
42	sync;					\
43	bl	1f;				\
441:						\
45	mflr    %r11;				\
46	clrlwi  %r11, %r11, 3;	/* XXX why? */	\
47	addi    %r11, %r11, 2f - 1b;		\
48	mtsrr0  %r11;				\
49	mtsrr1	%r12;	/* Disables the MMU */	\
50	isync;					\
51	rfi;					\
522:
53
54#define	MMU_VIRTUALMODE()			\
55	bl	3f;				\
563:						\
57	mflr	%r11;				\
58	addi	%r11, %r11, 4f - 3b;		\
59	mfmsr	%r12;				\
60	ori	%r12, %r12, PSL_DR|PSL_IR;	\
61	mtsrr0	%r11;				\
62	mtsrr1	%r12;	/* Enables the MMU */	\
63	isync;					\
64	rfi;					\
654:
66
67	MMU_REALMODE()
68
69	/* Reset standard BATs */
70	li	%r11, 0
71	mtibatu 0, %r11
72	mtibatl 0, %r11
73	mtdbatu 0, %r11
74	mtdbatl 0, %r11
75	mtibatu 1, %r11
76	mtibatl 1, %r11
77	mtdbatu 1, %r11
78	mtdbatl 1, %r11
79	mtibatu 2, %r11
80	mtibatl 2, %r11
81	mtdbatu 2, %r11
82	mtdbatl 2, %r11
83	mtibatu 3, %r11
84	mtibatl 3, %r11
85	mtdbatu 3, %r11
86	mtdbatl 3, %r11
87
88	/* Reset high BATs. IBAT[4-7][UL] + DBAT[4-7][UL] */
89	mtspr	560, %r11
90	mtspr	561, %r11
91	mtspr	562, %r11
92	mtspr	563, %r11
93	mtspr	564, %r11
94	mtspr	565, %r11
95	mtspr	566, %r11
96	mtspr	567, %r11
97	mtspr	568, %r11
98	mtspr	569, %r11
99	mtspr	570, %r11
100	mtspr	571, %r11
101	mtspr	572, %r11
102	mtspr	573, %r11
103	mtspr	574, %r11
104	mtspr	575, %r11
105
106	/*
107	 * We need to setup BAT0 as in mmu_oea.c.
108	 */
109	li	%r11, BATU(0x00000000, BAT_BL_256M, BAT_Vs)
110	li	%r12, BATL(0x00000000, BAT_M, BAT_PP_RW)
111	mtdbatu	0, %r11
112	mtdbatl	0, %r12
113	mtibatu	0, %r11
114	mtibatl	0, %r12
115	isync
116
117	/*
118	 * We use BAT1 to be able to write I/O memory, including the
119	 * framebuffer registers.
120	 */
121	/* BATU(0x0c000000, BAT_BL_32M, BAT_Vs) */
122	lis	%r11, 0x0c00
123	ori	%r11, %r11, BAT_BL_32M|BAT_Vs
124	/* BATL(0x0c000000, BAT_I|BAT_G, BAT_PP_RW) */
125	lis	%r12, 0x0c00
126	ori	%r12, %r12, BAT_I|BAT_G|BAT_PP_RW
127	mtdbatu	1, %r11
128	mtdbatl	1, %r12
129	isync
130
131	MMU_VIRTUALMODE()
132