1/*-
2 * Copyright (c) KATO Takenori, 1999.
3 *
4 * All rights reserved.  Unpublished rights reserved under the copyright
5 * laws of Japan.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer as
13 *    the first lines of this file unmodified.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * $FreeBSD$
32 */
33
34/*	$NecBSD: busio.h,v 3.25.4.2.2.1 2000/06/12 03:53:08 honda Exp $	*/
35/*	$NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $	*/
36
37/*-
38 * [NetBSD for NEC PC-98 series]
39 *  Copyright (c) 1997, 1998
40 *	NetBSD/pc98 porting staff. All rights reserved.
41 *
42 * [Ported for FreeBSD]
43 *  Copyright (c) 2001
44 *	TAKAHASHI Yoshihiro. All rights reserved.
45 *
46 *  Redistribution and use in source and binary forms, with or without
47 *  modification, are permitted provided that the following conditions
48 *  are met:
49 *  1. Redistributions of source code must retain the above copyright
50 *     notice, this list of conditions and the following disclaimer.
51 *  2. Redistributions in binary form must reproduce the above copyright
52 *     notice, this list of conditions and the following disclaimer in the
53 *     documentation and/or other materials provided with the distribution.
54 *  3. The name of the author may not be used to endorse or promote products
55 *     derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
59 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
60 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
61 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
62 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
63 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
64 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
65 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
66 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70/*
71 * Copyright (c) 1997, 1998
72 *	Naofumi HONDA.  All rights reserved.
73 *
74 * This module support generic bus address relocation mechanism.
75 * To reduce a function call overhead, we employ pascal call methods.
76 */
77
78#ifndef _PC98_BUS_H_
79#define _PC98_BUS_H_
80
81#include <sys/systm.h>
82
83#include <machine/_bus.h>
84#include <machine/cpufunc.h>
85
86#define BUS_SPACE_MAXSIZE_24BIT	0xFFFFFF
87#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
88#define BUS_SPACE_MAXSIZE	0xFFFFFFFF
89#define BUS_SPACE_MAXADDR_24BIT	0xFFFFFF
90#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
91#define BUS_SPACE_MAXADDR	0xFFFFFFFF
92
93#define BUS_SPACE_UNRESTRICTED	(~0)
94
95/*
96 * address relocation table
97 */
98#define BUS_SPACE_IAT_MAXSIZE	33
99typedef bus_addr_t *bus_space_iat_t;
100
101#define BUS_SPACE_IAT_SZ(IOTARRAY) (sizeof(IOTARRAY)/sizeof(bus_addr_t))
102
103/*
104 * Access methods for bus resources and address space.
105 */
106struct resource;
107
108/*
109 * bus space tag
110 */
111#define	_PASCAL_CALL	(void)
112
113#define	_BUS_SPACE_CALL_FUNCS_TAB(NAME,TYPE,BWN) \
114	NAME##_space_read_##BWN, 				\
115	NAME##_space_read_multi_##BWN, 				\
116	NAME##_space_read_region_##BWN,				\
117	NAME##_space_write_##BWN, 				\
118	NAME##_space_write_multi_##BWN, 			\
119	NAME##_space_write_region_##BWN,			\
120	NAME##_space_set_multi_##BWN,				\
121	NAME##_space_set_region_##BWN,				\
122	NAME##_space_copy_region_##BWN
123
124#define	_BUS_SPACE_CALL_FUNCS_PROTO(NAME,TYPE,BWN) \
125	TYPE NAME##_space_read_##BWN _PASCAL_CALL;		\
126	void NAME##_space_read_multi_##BWN _PASCAL_CALL;	\
127	void NAME##_space_read_region_##BWN _PASCAL_CALL;	\
128	void NAME##_space_write_##BWN _PASCAL_CALL;		\
129	void NAME##_space_write_multi_##BWN _PASCAL_CALL;	\
130	void NAME##_space_write_region_##BWN _PASCAL_CALL;	\
131	void NAME##_space_set_multi_##BWN _PASCAL_CALL;		\
132	void NAME##_space_set_region_##BWN _PASCAL_CALL;	\
133	void NAME##_space_copy_region_##BWN _PASCAL_CALL;
134
135#define	_BUS_SPACE_CALL_FUNCS(NAME,TYPE,BWN) \
136	TYPE (* NAME##_read_##BWN) _PASCAL_CALL;		\
137	void (* NAME##_read_multi_##BWN) _PASCAL_CALL;		\
138	void (* NAME##_read_region_##BWN) _PASCAL_CALL;		\
139	void (* NAME##_write_##BWN) _PASCAL_CALL;		\
140	void (* NAME##_write_multi_##BWN) _PASCAL_CALL;		\
141	void (* NAME##_write_region_##BWN) _PASCAL_CALL;	\
142	void (* NAME##_set_multi_##BWN) _PASCAL_CALL;		\
143	void (* NAME##_set_region_##BWN) _PASCAL_CALL;		\
144	void (* NAME##_copy_region_##BWN) _PASCAL_CALL;
145
146struct bus_space_access_methods {
147	/* 8 bits access methods */
148	_BUS_SPACE_CALL_FUNCS(bs,u_int8_t,1)
149
150	/* 16 bits access methods */
151	_BUS_SPACE_CALL_FUNCS(bs,u_int16_t,2)
152
153	/* 32 bits access methods */
154	_BUS_SPACE_CALL_FUNCS(bs,u_int32_t,4)
155};
156
157/*
158 * Access methods for bus resources and address space.
159 */
160struct bus_space_tag {
161#define	BUS_SPACE_TAG_IO	0
162#define	BUS_SPACE_TAG_MEM	1
163	u_int	bs_tag;			/* bus space flags */
164
165	struct bus_space_access_methods bs_da;	/* direct access */
166	struct bus_space_access_methods bs_ra;	/* relocate access */
167#if	0
168	struct bus_space_access_methods bs_ida;	/* indexed direct access */
169#endif
170};
171
172/*
173 * bus space handle
174 */
175struct bus_space_handle {
176	bus_addr_t	bsh_base;
177	size_t		bsh_sz;
178
179	bus_addr_t	bsh_iat[BUS_SPACE_IAT_MAXSIZE];
180	size_t		bsh_maxiatsz;
181	size_t		bsh_iatsz;
182
183	struct resource	**bsh_res;
184	size_t		bsh_ressz;
185
186	struct bus_space_access_methods bsh_bam;
187};
188
189/*
190 * Values for the pc98 bus space tag, not to be used directly by MI code.
191 */
192extern struct bus_space_tag SBUS_io_space_tag;
193extern struct bus_space_tag SBUS_mem_space_tag;
194
195#define X86_BUS_SPACE_IO	(&SBUS_io_space_tag)
196#define X86_BUS_SPACE_MEM	(&SBUS_mem_space_tag)
197
198/*
199 * Allocate/Free bus_space_handle
200 */
201int i386_bus_space_handle_alloc(bus_space_tag_t t, bus_addr_t bpa,
202				bus_size_t size, bus_space_handle_t *bshp);
203void i386_bus_space_handle_free(bus_space_tag_t t, bus_space_handle_t bsh,
204				size_t size);
205
206/*
207 *      int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
208 *          bus_size_t size, int flag, bus_space_handle_t *bshp);
209 *
210 * Map a region of bus space.
211 */
212
213int i386_memio_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
214		   int flag, bus_space_handle_t *bshp);
215
216#define bus_space_map(t, a, s, f, hp)					\
217	i386_memio_map((t), (a), (s), (f), (hp))
218
219/*
220 *      int bus_space_unmap (bus_space_tag_t t,
221 *          bus_space_handle_t bsh, bus_size_t size);
222 *
223 * Unmap a region of bus space.
224 */
225
226void i386_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
227		       bus_size_t size);
228
229#define bus_space_unmap(t, h, s)					\
230	i386_memio_unmap((t), (h), (s))
231
232/*
233 *      int bus_space_map_load (bus_space_tag_t t, bus_space_handle_t bsh,
234 *          bus_size_t size, bus_space_iat_t iat, u_int flags);
235 *
236 * Load I/O address table of bus space.
237 */
238
239int i386_memio_map_load(bus_space_tag_t t, bus_space_handle_t bsh,
240			bus_size_t size, bus_space_iat_t iat, u_int flags);
241
242#define bus_space_map_load(t, h, s, iat, f)				\
243	i386_memio_map_load((t), (h), (s), (iat), (f))
244
245/*
246 *      int bus_space_subregion (bus_space_tag_t t,
247 *          bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
248 *          bus_space_handle_t *nbshp);
249 *
250 * Get a new handle for a subregion of an already-mapped area of bus space.
251 */
252
253int i386_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
254			 bus_size_t offset, bus_size_t size,
255			 bus_space_handle_t *nbshp);
256
257#define bus_space_subregion(t, h, o, s, nhp)				\
258	i386_memio_subregion((t), (h), (o), (s), (nhp))
259
260/*
261 *      int bus_space_free (bus_space_tag_t t,
262 *          bus_space_handle_t bsh, bus_size_t size);
263 *
264 * Free a region of bus space.
265 */
266
267void i386_memio_free(bus_space_tag_t t, bus_space_handle_t bsh,
268		     bus_size_t size);
269
270#define bus_space_free(t, h, s)						\
271	i386_memio_free((t), (h), (s))
272
273/*
274 *      int bus_space_compare (bus_space_tag_t t1, bus_space_handle_t bsh1,
275 *          bus_space_tag_t t2, bus_space_handle_t bsh2);
276 *
277 * Compare two resources.
278 */
279int i386_memio_compare(bus_space_tag_t t1, bus_space_handle_t bsh1,
280		       bus_space_tag_t t2, bus_space_handle_t bsh2);
281
282#define bus_space_compare(t1, h1, t2, h2)				\
283	i386_memio_compare((t1), (h1), (t2), (h2))
284
285/*
286 * Access methods for bus resources and address space.
287 */
288#define	_BUS_ACCESS_METHODS_PROTO(TYPE,BWN) \
289	static __inline TYPE bus_space_read_##BWN 			\
290	(bus_space_tag_t, bus_space_handle_t, bus_size_t offset);	\
291	static __inline void bus_space_read_multi_##BWN			\
292	(bus_space_tag_t, bus_space_handle_t,				\
293	     bus_size_t, TYPE *, size_t);				\
294	static __inline void bus_space_read_region_##BWN		\
295	(bus_space_tag_t, bus_space_handle_t,				\
296	     bus_size_t, TYPE *, size_t);				\
297	static __inline void bus_space_write_##BWN			\
298	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE);	\
299	static __inline void bus_space_write_multi_##BWN		\
300	(bus_space_tag_t, bus_space_handle_t,				\
301	     bus_size_t, const TYPE *, size_t);				\
302	static __inline void bus_space_write_region_##BWN		\
303	(bus_space_tag_t, bus_space_handle_t,				\
304	     bus_size_t, const TYPE *, size_t);				\
305	static __inline void bus_space_set_multi_##BWN			\
306	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
307	static __inline void bus_space_set_region_##BWN			\
308	(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
309	static __inline void bus_space_copy_region_##BWN		\
310	(bus_space_tag_t, bus_space_handle_t, bus_size_t,		\
311	     bus_space_handle_t, bus_size_t, size_t);
312
313_BUS_ACCESS_METHODS_PROTO(u_int8_t,1)
314_BUS_ACCESS_METHODS_PROTO(u_int16_t,2)
315_BUS_ACCESS_METHODS_PROTO(u_int32_t,4)
316
317/*
318 * read methods
319 */
320#define	_BUS_SPACE_READ(TYPE,BWN)					\
321static __inline TYPE							\
322bus_space_read_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
323	bus_size_t offset)						\
324{									\
325	register TYPE result;						\
326									\
327	__asm __volatile("call *%2"  					\
328			:"=a" (result),					\
329			 "=d" (offset)					\
330			:"o" (bsh->bsh_bam.bs_read_##BWN),		\
331			 "b" (bsh),					\
332			 "1" (offset)					\
333			);						\
334									\
335	return result;							\
336}
337
338_BUS_SPACE_READ(u_int8_t,1)
339_BUS_SPACE_READ(u_int16_t,2)
340_BUS_SPACE_READ(u_int32_t,4)
341
342/*
343 * write methods
344 */
345#define	_BUS_SPACE_WRITE(TYPE,BWN)					\
346static __inline void							\
347bus_space_write_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
348	bus_size_t offset, TYPE  val)					\
349{									\
350									\
351	__asm __volatile("call *%1"					\
352			:"=d" (offset)					\
353			:"o" (bsh->bsh_bam.bs_write_##BWN),		\
354			 "a" (val),					\
355			 "b" (bsh),					\
356			 "0" (offset)					\
357			);						\
358}
359
360_BUS_SPACE_WRITE(u_int8_t,1)
361_BUS_SPACE_WRITE(u_int16_t,2)
362_BUS_SPACE_WRITE(u_int32_t,4)
363
364/*
365 * multi read
366 */
367#define	_BUS_SPACE_READ_MULTI(TYPE,BWN)					\
368static __inline void							\
369bus_space_read_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
370	bus_size_t offset, TYPE *buf, size_t cnt) 			\
371{									\
372									\
373	__asm __volatile("call *%3"					\
374			:"=c" (cnt),					\
375			 "=d" (offset),					\
376			 "=D" (buf)					\
377			:"o" (bsh->bsh_bam.bs_read_multi_##BWN),	\
378			 "b" (bsh),					\
379			 "0" (cnt),					\
380			 "1" (offset),					\
381			 "2" (buf)					\
382			:"memory");					\
383}
384
385_BUS_SPACE_READ_MULTI(u_int8_t,1)
386_BUS_SPACE_READ_MULTI(u_int16_t,2)
387_BUS_SPACE_READ_MULTI(u_int32_t,4)
388
389/*
390 * multi write
391 */
392#define	_BUS_SPACE_WRITE_MULTI(TYPE,BWN)				\
393static __inline void							\
394bus_space_write_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
395	bus_size_t offset, const TYPE *buf, size_t cnt) 		\
396{									\
397									\
398	__asm __volatile("call *%3"					\
399			:"=c" (cnt),					\
400			 "=d" (offset),					\
401			 "=S" (buf)					\
402			:"o" (bsh->bsh_bam.bs_write_multi_##BWN),	\
403			 "b" (bsh),					\
404			 "0" (cnt),					\
405			 "1" (offset),					\
406			 "2" (buf)					\
407			);						\
408}
409
410_BUS_SPACE_WRITE_MULTI(u_int8_t,1)
411_BUS_SPACE_WRITE_MULTI(u_int16_t,2)
412_BUS_SPACE_WRITE_MULTI(u_int32_t,4)
413
414/*
415 * region read
416 */
417#define	_BUS_SPACE_READ_REGION(TYPE,BWN)				\
418static __inline void							\
419bus_space_read_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
420	bus_size_t offset, TYPE *buf, size_t cnt) 			\
421{									\
422									\
423	__asm __volatile("call *%3"					\
424			:"=c" (cnt),					\
425			 "=d" (offset),					\
426			 "=D" (buf)					\
427			:"o" (bsh->bsh_bam.bs_read_region_##BWN),	\
428			 "b" (bsh),					\
429			 "0" (cnt),					\
430			 "1" (offset),					\
431			 "2" (buf)					\
432			:"memory");					\
433}
434
435_BUS_SPACE_READ_REGION(u_int8_t,1)
436_BUS_SPACE_READ_REGION(u_int16_t,2)
437_BUS_SPACE_READ_REGION(u_int32_t,4)
438
439/*
440 * region write
441 */
442#define	_BUS_SPACE_WRITE_REGION(TYPE,BWN)				\
443static __inline void							\
444bus_space_write_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
445	bus_size_t offset, const TYPE *buf, size_t cnt) 		\
446{									\
447									\
448	__asm __volatile("call *%3"					\
449			:"=c" (cnt),					\
450			 "=d" (offset),					\
451			 "=S" (buf)					\
452			:"o" (bsh->bsh_bam.bs_write_region_##BWN),	\
453			 "b" (bsh),					\
454			 "0" (cnt),					\
455			 "1" (offset),					\
456			 "2" (buf)					\
457			);						\
458}
459
460_BUS_SPACE_WRITE_REGION(u_int8_t,1)
461_BUS_SPACE_WRITE_REGION(u_int16_t,2)
462_BUS_SPACE_WRITE_REGION(u_int32_t,4)
463
464/*
465 * multi set
466 */
467#define	_BUS_SPACE_SET_MULTI(TYPE,BWN)					\
468static __inline void							\
469bus_space_set_multi_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh,	\
470	bus_size_t offset, TYPE val, size_t cnt)	 		\
471{									\
472									\
473	__asm __volatile("call *%2"					\
474			:"=c" (cnt),					\
475			 "=d" (offset)					\
476			:"o" (bsh->bsh_bam.bs_set_multi_##BWN),		\
477			 "a" (val),					\
478			 "b" (bsh),					\
479			 "0" (cnt),					\
480			 "1" (offset)					\
481			);						\
482}
483
484_BUS_SPACE_SET_MULTI(u_int8_t,1)
485_BUS_SPACE_SET_MULTI(u_int16_t,2)
486_BUS_SPACE_SET_MULTI(u_int32_t,4)
487
488/*
489 * region set
490 */
491#define	_BUS_SPACE_SET_REGION(TYPE,BWN)					\
492static __inline void							\
493bus_space_set_region_##BWN (bus_space_tag_t tag, bus_space_handle_t bsh, \
494	bus_size_t offset, TYPE val, size_t cnt) 			\
495{									\
496									\
497	__asm __volatile("call *%2"					\
498			:"=c" (cnt),					\
499			 "=d" (offset)					\
500			:"o" (bsh->bsh_bam.bs_set_region_##BWN),	\
501			 "a" (val),					\
502			 "b" (bsh),					\
503			 "0" (cnt),					\
504			 "1" (offset)					\
505			);						\
506}
507
508_BUS_SPACE_SET_REGION(u_int8_t,1)
509_BUS_SPACE_SET_REGION(u_int16_t,2)
510_BUS_SPACE_SET_REGION(u_int32_t,4)
511
512/*
513 * copy
514 */
515#define	_BUS_SPACE_COPY_REGION(BWN)					\
516static __inline void							\
517bus_space_copy_region_##BWN (bus_space_tag_t tag, bus_space_handle_t sbsh, \
518	bus_size_t src, bus_space_handle_t dbsh, bus_size_t dst, size_t cnt) \
519{									\
520									\
521	if (dbsh->bsh_bam.bs_copy_region_1 != sbsh->bsh_bam.bs_copy_region_1) \
522		panic("bus_space_copy_region: funcs mismatch (ENOSUPPORT)");\
523									\
524	__asm __volatile("call *%3"					\
525			:"=c" (cnt),					\
526			 "=S" (src),					\
527			 "=D" (dst)					\
528			:"o" (dbsh->bsh_bam.bs_copy_region_##BWN),	\
529			 "a" (sbsh),					\
530			 "b" (dbsh),					\
531			 "0" (cnt),					\
532			 "1" (src),					\
533			 "2" (dst)					\
534			);						\
535}
536
537_BUS_SPACE_COPY_REGION(1)
538_BUS_SPACE_COPY_REGION(2)
539_BUS_SPACE_COPY_REGION(4)
540
541/*
542 * Bus read/write barrier methods.
543 *
544 *	void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
545 *			       bus_size_t offset, bus_size_t len, int flags);
546 *
547 *
548 * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
549 * prevent reordering by the compiler; all Intel x86 processors currently
550 * retire operations outside the CPU in program order.
551 */
552#define	BUS_SPACE_BARRIER_READ	0x01		/* force read barrier */
553#define	BUS_SPACE_BARRIER_WRITE	0x02		/* force write barrier */
554
555static __inline void
556bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
557		  bus_size_t offset, bus_size_t len, int flags)
558{
559	if (flags & BUS_SPACE_BARRIER_READ)
560		__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
561	else
562		__compiler_membar();
563}
564
565#ifdef BUS_SPACE_NO_LEGACY
566#undef inb
567#undef outb
568#define inb(a) compiler_error
569#define inw(a) compiler_error
570#define inl(a) compiler_error
571#define outb(a, b) compiler_error
572#define outw(a, b) compiler_error
573#define outl(a, b) compiler_error
574#endif
575
576#include <machine/bus_dma.h>
577
578/*
579 * Stream accesses are the same as normal accesses on i386/pc98; there are no
580 * supported bus systems with an endianess different from the host one.
581 */
582#define	bus_space_read_stream_1(t, h, o)	bus_space_read_1((t), (h), (o))
583#define	bus_space_read_stream_2(t, h, o)	bus_space_read_2((t), (h), (o))
584#define	bus_space_read_stream_4(t, h, o)	bus_space_read_4((t), (h), (o))
585
586#define	bus_space_read_multi_stream_1(t, h, o, a, c) \
587	bus_space_read_multi_1((t), (h), (o), (a), (c))
588#define	bus_space_read_multi_stream_2(t, h, o, a, c) \
589	bus_space_read_multi_2((t), (h), (o), (a), (c))
590#define	bus_space_read_multi_stream_4(t, h, o, a, c) \
591	bus_space_read_multi_4((t), (h), (o), (a), (c))
592
593#define	bus_space_write_stream_1(t, h, o, v) \
594	bus_space_write_1((t), (h), (o), (v))
595#define	bus_space_write_stream_2(t, h, o, v) \
596	bus_space_write_2((t), (h), (o), (v))
597#define	bus_space_write_stream_4(t, h, o, v) \
598	bus_space_write_4((t), (h), (o), (v))
599
600#define	bus_space_write_multi_stream_1(t, h, o, a, c) \
601	bus_space_write_multi_1((t), (h), (o), (a), (c))
602#define	bus_space_write_multi_stream_2(t, h, o, a, c) \
603	bus_space_write_multi_2((t), (h), (o), (a), (c))
604#define	bus_space_write_multi_stream_4(t, h, o, a, c) \
605	bus_space_write_multi_4((t), (h), (o), (a), (c))
606
607#define	bus_space_set_multi_stream_1(t, h, o, v, c) \
608	bus_space_set_multi_1((t), (h), (o), (v), (c))
609#define	bus_space_set_multi_stream_2(t, h, o, v, c) \
610	bus_space_set_multi_2((t), (h), (o), (v), (c))
611#define	bus_space_set_multi_stream_4(t, h, o, v, c) \
612	bus_space_set_multi_4((t), (h), (o), (v), (c))
613
614#define	bus_space_read_region_stream_1(t, h, o, a, c) \
615	bus_space_read_region_1((t), (h), (o), (a), (c))
616#define	bus_space_read_region_stream_2(t, h, o, a, c) \
617	bus_space_read_region_2((t), (h), (o), (a), (c))
618#define	bus_space_read_region_stream_4(t, h, o, a, c) \
619	bus_space_read_region_4((t), (h), (o), (a), (c))
620
621#define	bus_space_write_region_stream_1(t, h, o, a, c) \
622	bus_space_write_region_1((t), (h), (o), (a), (c))
623#define	bus_space_write_region_stream_2(t, h, o, a, c) \
624	bus_space_write_region_2((t), (h), (o), (a), (c))
625#define	bus_space_write_region_stream_4(t, h, o, a, c) \
626	bus_space_write_region_4((t), (h), (o), (a), (c))
627
628#define	bus_space_set_region_stream_1(t, h, o, v, c) \
629	bus_space_set_region_1((t), (h), (o), (v), (c))
630#define	bus_space_set_region_stream_2(t, h, o, v, c) \
631	bus_space_set_region_2((t), (h), (o), (v), (c))
632#define	bus_space_set_region_stream_4(t, h, o, v, c) \
633	bus_space_set_region_4((t), (h), (o), (v), (c))
634
635#define	bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
636	bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
637#define	bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
638	bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
639#define	bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
640	bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
641
642#endif /* _PC98_BUS_H_ */
643