1/* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35#include <linux/module.h> 36#include <linux/errno.h> 37#include <linux/pci.h> 38#include <linux/interrupt.h> 39 40#include "mthca_dev.h" 41#include "mthca_config_reg.h" 42#include "mthca_cmd.h" 43#include "mthca_profile.h" 44#include "mthca_memfree.h" 45#include "mthca_wqe.h" 46 47MODULE_AUTHOR("Roland Dreier"); 48MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 49MODULE_LICENSE("Dual BSD/GPL"); 50MODULE_VERSION(DRV_VERSION); 51 52#ifdef CONFIG_INFINIBAND_MTHCA_DEBUG 53 54int mthca_debug_level = 0; 55module_param_named(debug_level, mthca_debug_level, int, 0644); 56MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 57 58#endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */ 59 60#ifdef CONFIG_PCI_MSI 61 62static int msi_x = 1; 63module_param(msi_x, int, 0444); 64MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 65 66#else /* CONFIG_PCI_MSI */ 67 68#define msi_x (0) 69 70#endif /* CONFIG_PCI_MSI */ 71 72static int tune_pci = 0; 73module_param(tune_pci, int, 0444); 74MODULE_PARM_DESC(tune_pci, "increase PCI burst from the default set by BIOS if nonzero"); 75 76DEFINE_MUTEX(mthca_device_mutex); 77 78#define MTHCA_DEFAULT_NUM_QP (1 << 16) 79#define MTHCA_DEFAULT_RDB_PER_QP (1 << 2) 80#define MTHCA_DEFAULT_NUM_CQ (1 << 16) 81#define MTHCA_DEFAULT_NUM_MCG (1 << 13) 82#define MTHCA_DEFAULT_NUM_MPT (1 << 17) 83#define MTHCA_DEFAULT_NUM_MTT (1 << 20) 84#define MTHCA_DEFAULT_NUM_UDAV (1 << 15) 85#define MTHCA_DEFAULT_NUM_RESERVED_MTTS (1 << 18) 86#define MTHCA_DEFAULT_NUM_UARC_SIZE (1 << 18) 87 88static struct mthca_profile hca_profile = { 89 .num_qp = MTHCA_DEFAULT_NUM_QP, 90 .rdb_per_qp = MTHCA_DEFAULT_RDB_PER_QP, 91 .num_cq = MTHCA_DEFAULT_NUM_CQ, 92 .num_mcg = MTHCA_DEFAULT_NUM_MCG, 93 .num_mpt = MTHCA_DEFAULT_NUM_MPT, 94 .num_mtt = MTHCA_DEFAULT_NUM_MTT, 95 .num_udav = MTHCA_DEFAULT_NUM_UDAV, /* Tavor only */ 96 .fmr_reserved_mtts = MTHCA_DEFAULT_NUM_RESERVED_MTTS, /* Tavor only */ 97 .uarc_size = MTHCA_DEFAULT_NUM_UARC_SIZE, /* Arbel only */ 98}; 99 100module_param_named(num_qp, hca_profile.num_qp, int, 0444); 101MODULE_PARM_DESC(num_qp, "maximum number of QPs per HCA"); 102 103module_param_named(rdb_per_qp, hca_profile.rdb_per_qp, int, 0444); 104MODULE_PARM_DESC(rdb_per_qp, "number of RDB buffers per QP"); 105 106module_param_named(num_cq, hca_profile.num_cq, int, 0444); 107MODULE_PARM_DESC(num_cq, "maximum number of CQs per HCA"); 108 109module_param_named(num_mcg, hca_profile.num_mcg, int, 0444); 110MODULE_PARM_DESC(num_mcg, "maximum number of multicast groups per HCA"); 111 112module_param_named(num_mpt, hca_profile.num_mpt, int, 0444); 113MODULE_PARM_DESC(num_mpt, 114 "maximum number of memory protection table entries per HCA"); 115 116module_param_named(num_mtt, hca_profile.num_mtt, int, 0444); 117MODULE_PARM_DESC(num_mtt, 118 "maximum number of memory translation table segments per HCA"); 119 120module_param_named(num_udav, hca_profile.num_udav, int, 0444); 121MODULE_PARM_DESC(num_udav, "maximum number of UD address vectors per HCA"); 122 123module_param_named(fmr_reserved_mtts, hca_profile.fmr_reserved_mtts, int, 0444); 124MODULE_PARM_DESC(fmr_reserved_mtts, 125 "number of memory translation table segments reserved for FMR"); 126 127static int log_mtts_per_seg; 128module_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); 129MODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment (1-5)"); 130 131static char mthca_version[] __devinitdata = 132 DRV_NAME ": Mellanox InfiniBand HCA driver v" 133 DRV_VERSION " (" DRV_RELDATE ")\n"; 134 135static int mthca_tune_pci(struct mthca_dev *mdev) 136{ 137 if (!tune_pci) 138 return 0; 139 140 /* First try to max out Read Byte Count */ 141 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX)) { 142 if (pcix_set_mmrbc(mdev->pdev, pcix_get_max_mmrbc(mdev->pdev))) { 143 mthca_err(mdev, "Couldn't set PCI-X max read count, " 144 "aborting.\n"); 145 return -ENODEV; 146 } 147 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 148 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 149 150 if (pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP)) { 151 if (pcie_set_readrq(mdev->pdev, 4096)) { 152 mthca_err(mdev, "Couldn't write PCI Express read request, " 153 "aborting.\n"); 154 return -ENODEV; 155 } 156 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 157 mthca_info(mdev, "No PCI Express capability, " 158 "not setting Max Read Request Size.\n"); 159 160 return 0; 161} 162 163static int mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 164{ 165 int err; 166 u8 status; 167 168 mdev->limits.mtt_seg_size = (1 << log_mtts_per_seg) * 8; 169 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 170 if (err) { 171 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 172 return err; 173 } 174 if (status) { 175 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 176 "aborting.\n", status); 177 return -EINVAL; 178 } 179 if (dev_lim->min_page_sz > PAGE_SIZE) { 180 mthca_err(mdev, "HCA minimum page size of %d bigger than " 181 "kernel PAGE_SIZE of %d, aborting.\n", 182 dev_lim->min_page_sz, PAGE_SIZE); 183 return -ENODEV; 184 } 185 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 186 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 187 "aborting.\n", 188 dev_lim->num_ports, MTHCA_MAX_PORTS); 189 return -ENODEV; 190 } 191 192 if (dev_lim->uar_size > pci_resource_len(mdev->pdev, 2)) { 193 mthca_err(mdev, "HCA reported UAR size of 0x%x bigger than " 194 "PCI resource 2 size of 0x%llx, aborting.\n", 195 dev_lim->uar_size, 196 (unsigned long long)pci_resource_len(mdev->pdev, 2)); 197 return -ENODEV; 198 } 199 200 mdev->limits.num_ports = dev_lim->num_ports; 201 mdev->limits.vl_cap = dev_lim->max_vl; 202 mdev->limits.mtu_cap = dev_lim->max_mtu; 203 mdev->limits.gid_table_len = dev_lim->max_gids; 204 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 205 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 206 /* 207 * Need to allow for worst case send WQE overhead and check 208 * whether max_desc_sz imposes a lower limit than max_sg; UD 209 * send has the biggest overhead. 210 */ 211 mdev->limits.max_sg = min_t(int, dev_lim->max_sg, 212 (dev_lim->max_desc_sz - 213 sizeof (struct mthca_next_seg) - 214 (mthca_is_memfree(mdev) ? 215 sizeof (struct mthca_arbel_ud_seg) : 216 sizeof (struct mthca_tavor_ud_seg))) / 217 sizeof (struct mthca_data_seg)); 218 mdev->limits.max_wqes = dev_lim->max_qp_sz; 219 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 220 mdev->limits.reserved_qps = dev_lim->reserved_qps; 221 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 222 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 223 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 224 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 225 mdev->limits.max_srq_sge = mthca_max_srq_sge(mdev); 226 /* 227 * Subtract 1 from the limit because we need to allocate a 228 * spare CQE so the HCA HW can tell the difference between an 229 * empty CQ and a full CQ. 230 */ 231 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 232 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 233 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 234 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 235 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 236 mdev->limits.reserved_uars = dev_lim->reserved_uars; 237 mdev->limits.reserved_pds = dev_lim->reserved_pds; 238 mdev->limits.port_width_cap = dev_lim->max_port_width; 239 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 240 mdev->limits.flags = dev_lim->flags; 241 /* 242 * For old FW that doesn't return static rate support, use a 243 * value of 0x3 (only static rate values of 0 or 1 are handled), 244 * except on Sinai, where even old FW can handle static rate 245 * values of 2 and 3. 246 */ 247 if (dev_lim->stat_rate_support) 248 mdev->limits.stat_rate_support = dev_lim->stat_rate_support; 249 else if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT) 250 mdev->limits.stat_rate_support = 0xf; 251 else 252 mdev->limits.stat_rate_support = 0x3; 253 254 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 255 May be doable since hardware supports it for SRQ. 256 257 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 258 259 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 260 supported by driver. */ 261 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 262 IB_DEVICE_PORT_ACTIVE_EVENT | 263 IB_DEVICE_SYS_IMAGE_GUID | 264 IB_DEVICE_RC_RNR_NAK_GEN; 265 266 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 267 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 268 269 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 270 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 271 272 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 273 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 274 275 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 276 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 277 278 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 279 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 280 281 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 282 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 283 284 if (mthca_is_memfree(mdev)) 285 if (dev_lim->flags & DEV_LIM_FLAG_IPOIB_CSUM) 286 mdev->device_cap_flags |= IB_DEVICE_UD_IP_CSUM; 287 288 return 0; 289} 290 291static int mthca_init_tavor(struct mthca_dev *mdev) 292{ 293 s64 size; 294 u8 status; 295 int err; 296 struct mthca_dev_lim dev_lim; 297 struct mthca_profile profile; 298 struct mthca_init_hca_param init_hca; 299 300 err = mthca_SYS_EN(mdev, &status); 301 if (err) { 302 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 303 return err; 304 } 305 if (status) { 306 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 307 "aborting.\n", status); 308 return -EINVAL; 309 } 310 311 err = mthca_QUERY_FW(mdev, &status); 312 if (err) { 313 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 314 goto err_disable; 315 } 316 if (status) { 317 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 318 "aborting.\n", status); 319 err = -EINVAL; 320 goto err_disable; 321 } 322 err = mthca_QUERY_DDR(mdev, &status); 323 if (err) { 324 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 325 goto err_disable; 326 } 327 if (status) { 328 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 329 "aborting.\n", status); 330 err = -EINVAL; 331 goto err_disable; 332 } 333 334 err = mthca_dev_lim(mdev, &dev_lim); 335 if (err) { 336 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 337 goto err_disable; 338 } 339 340 profile = hca_profile; 341 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 342 profile.uarc_size = 0; 343 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 344 profile.num_srq = dev_lim.max_srqs; 345 346 size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 347 if (size < 0) { 348 err = size; 349 goto err_disable; 350 } 351 352 err = mthca_INIT_HCA(mdev, &init_hca, &status); 353 if (err) { 354 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 355 goto err_disable; 356 } 357 if (status) { 358 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 359 "aborting.\n", status); 360 err = -EINVAL; 361 goto err_disable; 362 } 363 364 return 0; 365 366err_disable: 367 mthca_SYS_DIS(mdev, &status); 368 369 return err; 370} 371 372static int mthca_load_fw(struct mthca_dev *mdev) 373{ 374 u8 status; 375 int err; 376 377 /* FIXME: use HCA-attached memory for FW if present */ 378 379 mdev->fw.arbel.fw_icm = 380 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 381 GFP_HIGHUSER | __GFP_NOWARN, 0); 382 if (!mdev->fw.arbel.fw_icm) { 383 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 384 return -ENOMEM; 385 } 386 387 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 388 if (err) { 389 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 390 goto err_free; 391 } 392 if (status) { 393 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 394 err = -EINVAL; 395 goto err_free; 396 } 397 err = mthca_RUN_FW(mdev, &status); 398 if (err) { 399 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 400 goto err_unmap_fa; 401 } 402 if (status) { 403 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 404 err = -EINVAL; 405 goto err_unmap_fa; 406 } 407 408 return 0; 409 410err_unmap_fa: 411 mthca_UNMAP_FA(mdev, &status); 412 413err_free: 414 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 415 return err; 416} 417 418static int mthca_init_icm(struct mthca_dev *mdev, 419 struct mthca_dev_lim *dev_lim, 420 struct mthca_init_hca_param *init_hca, 421 u64 icm_size) 422{ 423 u64 aux_pages; 424 u8 status; 425 int err; 426 427 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 428 if (err) { 429 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 430 return err; 431 } 432 if (status) { 433 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 434 "aborting.\n", status); 435 return -EINVAL; 436 } 437 438 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 439 (unsigned long long) icm_size >> 10, 440 (unsigned long long) aux_pages << 2); 441 442 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 443 GFP_HIGHUSER | __GFP_NOWARN, 0); 444 if (!mdev->fw.arbel.aux_icm) { 445 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 446 return -ENOMEM; 447 } 448 449 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 450 if (err) { 451 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 452 goto err_free_aux; 453 } 454 if (status) { 455 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 456 err = -EINVAL; 457 goto err_free_aux; 458 } 459 460 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 461 if (err) { 462 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 463 goto err_unmap_aux; 464 } 465 466 /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ 467 mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * mdev->limits.mtt_seg_size, 468 dma_get_cache_alignment()) / mdev->limits.mtt_seg_size; 469 470 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 471 mdev->limits.mtt_seg_size, 472 mdev->limits.num_mtt_segs, 473 mdev->limits.reserved_mtts, 474 1, 0); 475 if (!mdev->mr_table.mtt_table) { 476 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 477 err = -ENOMEM; 478 goto err_unmap_eq; 479 } 480 481 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 482 dev_lim->mpt_entry_sz, 483 mdev->limits.num_mpts, 484 mdev->limits.reserved_mrws, 485 1, 1); 486 if (!mdev->mr_table.mpt_table) { 487 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 488 err = -ENOMEM; 489 goto err_unmap_mtt; 490 } 491 492 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 493 dev_lim->qpc_entry_sz, 494 mdev->limits.num_qps, 495 mdev->limits.reserved_qps, 496 0, 0); 497 if (!mdev->qp_table.qp_table) { 498 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 499 err = -ENOMEM; 500 goto err_unmap_mpt; 501 } 502 503 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 504 dev_lim->eqpc_entry_sz, 505 mdev->limits.num_qps, 506 mdev->limits.reserved_qps, 507 0, 0); 508 if (!mdev->qp_table.eqp_table) { 509 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 510 err = -ENOMEM; 511 goto err_unmap_qp; 512 } 513 514 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 515 MTHCA_RDB_ENTRY_SIZE, 516 mdev->limits.num_qps << 517 mdev->qp_table.rdb_shift, 0, 518 0, 0); 519 if (!mdev->qp_table.rdb_table) { 520 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 521 err = -ENOMEM; 522 goto err_unmap_eqp; 523 } 524 525 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 526 dev_lim->cqc_entry_sz, 527 mdev->limits.num_cqs, 528 mdev->limits.reserved_cqs, 529 0, 0); 530 if (!mdev->cq_table.table) { 531 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 532 err = -ENOMEM; 533 goto err_unmap_rdb; 534 } 535 536 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 537 mdev->srq_table.table = 538 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 539 dev_lim->srq_entry_sz, 540 mdev->limits.num_srqs, 541 mdev->limits.reserved_srqs, 542 0, 0); 543 if (!mdev->srq_table.table) { 544 mthca_err(mdev, "Failed to map SRQ context memory, " 545 "aborting.\n"); 546 err = -ENOMEM; 547 goto err_unmap_cq; 548 } 549 } 550 551 /* 552 * It's not strictly required, but for simplicity just map the 553 * whole multicast group table now. The table isn't very big 554 * and it's a lot easier than trying to track ref counts. 555 */ 556 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 557 MTHCA_MGM_ENTRY_SIZE, 558 mdev->limits.num_mgms + 559 mdev->limits.num_amgms, 560 mdev->limits.num_mgms + 561 mdev->limits.num_amgms, 562 0, 0); 563 if (!mdev->mcg_table.table) { 564 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 565 err = -ENOMEM; 566 goto err_unmap_srq; 567 } 568 569 return 0; 570 571err_unmap_srq: 572 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 573 mthca_free_icm_table(mdev, mdev->srq_table.table); 574 575err_unmap_cq: 576 mthca_free_icm_table(mdev, mdev->cq_table.table); 577 578err_unmap_rdb: 579 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 580 581err_unmap_eqp: 582 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 583 584err_unmap_qp: 585 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 586 587err_unmap_mpt: 588 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 589 590err_unmap_mtt: 591 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 592 593err_unmap_eq: 594 mthca_unmap_eq_icm(mdev); 595 596err_unmap_aux: 597 mthca_UNMAP_ICM_AUX(mdev, &status); 598 599err_free_aux: 600 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 601 602 return err; 603} 604 605static void mthca_free_icms(struct mthca_dev *mdev) 606{ 607 u8 status; 608 609 mthca_free_icm_table(mdev, mdev->mcg_table.table); 610 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 611 mthca_free_icm_table(mdev, mdev->srq_table.table); 612 mthca_free_icm_table(mdev, mdev->cq_table.table); 613 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 614 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 615 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 616 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 617 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 618 mthca_unmap_eq_icm(mdev); 619 620 mthca_UNMAP_ICM_AUX(mdev, &status); 621 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); 622} 623 624static int mthca_init_arbel(struct mthca_dev *mdev) 625{ 626 struct mthca_dev_lim dev_lim; 627 struct mthca_profile profile; 628 struct mthca_init_hca_param init_hca; 629 s64 icm_size; 630 u8 status; 631 int err; 632 633 err = mthca_QUERY_FW(mdev, &status); 634 if (err) { 635 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 636 return err; 637 } 638 if (status) { 639 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 640 "aborting.\n", status); 641 return -EINVAL; 642 } 643 644 err = mthca_ENABLE_LAM(mdev, &status); 645 if (err) { 646 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 647 return err; 648 } 649 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 650 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 651 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 652 } else if (status) { 653 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 654 "aborting.\n", status); 655 return -EINVAL; 656 } 657 658 err = mthca_load_fw(mdev); 659 if (err) { 660 mthca_err(mdev, "Failed to start FW, aborting.\n"); 661 goto err_disable; 662 } 663 664 err = mthca_dev_lim(mdev, &dev_lim); 665 if (err) { 666 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 667 goto err_stop_fw; 668 } 669 670 profile = hca_profile; 671 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 672 profile.num_udav = 0; 673 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 674 profile.num_srq = dev_lim.max_srqs; 675 676 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 677 if (icm_size < 0) { 678 err = icm_size; 679 goto err_stop_fw; 680 } 681 682 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 683 if (err) 684 goto err_stop_fw; 685 686 err = mthca_INIT_HCA(mdev, &init_hca, &status); 687 if (err) { 688 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 689 goto err_free_icm; 690 } 691 if (status) { 692 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 693 "aborting.\n", status); 694 err = -EINVAL; 695 goto err_free_icm; 696 } 697 698 return 0; 699 700err_free_icm: 701 mthca_free_icms(mdev); 702 703err_stop_fw: 704 mthca_UNMAP_FA(mdev, &status); 705 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 706 707err_disable: 708 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 709 mthca_DISABLE_LAM(mdev, &status); 710 711 return err; 712} 713 714static void mthca_close_hca(struct mthca_dev *mdev) 715{ 716 u8 status; 717 718 mthca_CLOSE_HCA(mdev, 0, &status); 719 720 if (mthca_is_memfree(mdev)) { 721 mthca_free_icms(mdev); 722 723 mthca_UNMAP_FA(mdev, &status); 724 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); 725 726 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 727 mthca_DISABLE_LAM(mdev, &status); 728 } else 729 mthca_SYS_DIS(mdev, &status); 730} 731 732static int mthca_init_hca(struct mthca_dev *mdev) 733{ 734 u8 status; 735 int err; 736 struct mthca_adapter adapter; 737 738 if (mthca_is_memfree(mdev)) 739 err = mthca_init_arbel(mdev); 740 else 741 err = mthca_init_tavor(mdev); 742 743 if (err) 744 return err; 745 746 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 747 if (err) { 748 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 749 goto err_close; 750 } 751 if (status) { 752 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 753 "aborting.\n", status); 754 err = -EINVAL; 755 goto err_close; 756 } 757 758 mdev->eq_table.inta_pin = adapter.inta_pin; 759 if (!mthca_is_memfree(mdev)) 760 mdev->rev_id = adapter.revision_id; 761 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 762 763 return 0; 764 765err_close: 766 mthca_close_hca(mdev); 767 return err; 768} 769 770static int mthca_setup_hca(struct mthca_dev *dev) 771{ 772 int err; 773 u8 status; 774 775 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 776 777 err = mthca_init_uar_table(dev); 778 if (err) { 779 mthca_err(dev, "Failed to initialize " 780 "user access region table, aborting.\n"); 781 return err; 782 } 783 784 err = mthca_uar_alloc(dev, &dev->driver_uar); 785 if (err) { 786 mthca_err(dev, "Failed to allocate driver access region, " 787 "aborting.\n"); 788 goto err_uar_table_free; 789 } 790 791 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 792 if (!dev->kar) { 793 mthca_err(dev, "Couldn't map kernel access region, " 794 "aborting.\n"); 795 err = -ENOMEM; 796 goto err_uar_free; 797 } 798 799 err = mthca_init_pd_table(dev); 800 if (err) { 801 mthca_err(dev, "Failed to initialize " 802 "protection domain table, aborting.\n"); 803 goto err_kar_unmap; 804 } 805 806 err = mthca_init_mr_table(dev); 807 if (err) { 808 mthca_err(dev, "Failed to initialize " 809 "memory region table, aborting.\n"); 810 goto err_pd_table_free; 811 } 812 813 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 814 if (err) { 815 mthca_err(dev, "Failed to create driver PD, " 816 "aborting.\n"); 817 goto err_mr_table_free; 818 } 819 820 err = mthca_init_eq_table(dev); 821 if (err) { 822 mthca_err(dev, "Failed to initialize " 823 "event queue table, aborting.\n"); 824 goto err_pd_free; 825 } 826 827 err = mthca_cmd_use_events(dev); 828 if (err) { 829 mthca_err(dev, "Failed to switch to event-driven " 830 "firmware commands, aborting.\n"); 831 goto err_eq_table_free; 832 } 833 834 err = mthca_NOP(dev, &status); 835 if (err || status) { 836 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { 837 mthca_warn(dev, "NOP command failed to generate interrupt " 838 "(IRQ %d).\n", 839 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector); 840 mthca_warn(dev, "Trying again with MSI-X disabled.\n"); 841 } else { 842 mthca_err(dev, "NOP command failed to generate interrupt " 843 "(IRQ %d), aborting.\n", 844 dev->pdev->irq); 845 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 846 } 847 848 goto err_cmd_poll; 849 } 850 851 mthca_dbg(dev, "NOP command IRQ test passed\n"); 852 853 err = mthca_init_cq_table(dev); 854 if (err) { 855 mthca_err(dev, "Failed to initialize " 856 "completion queue table, aborting.\n"); 857 goto err_cmd_poll; 858 } 859 860 err = mthca_init_srq_table(dev); 861 if (err) { 862 mthca_err(dev, "Failed to initialize " 863 "shared receive queue table, aborting.\n"); 864 goto err_cq_table_free; 865 } 866 867 err = mthca_init_qp_table(dev); 868 if (err) { 869 mthca_err(dev, "Failed to initialize " 870 "queue pair table, aborting.\n"); 871 goto err_srq_table_free; 872 } 873 874 err = mthca_init_av_table(dev); 875 if (err) { 876 mthca_err(dev, "Failed to initialize " 877 "address vector table, aborting.\n"); 878 goto err_qp_table_free; 879 } 880 881 err = mthca_init_mcg_table(dev); 882 if (err) { 883 mthca_err(dev, "Failed to initialize " 884 "multicast group table, aborting.\n"); 885 goto err_av_table_free; 886 } 887 888 return 0; 889 890err_av_table_free: 891 mthca_cleanup_av_table(dev); 892 893err_qp_table_free: 894 mthca_cleanup_qp_table(dev); 895 896err_srq_table_free: 897 mthca_cleanup_srq_table(dev); 898 899err_cq_table_free: 900 mthca_cleanup_cq_table(dev); 901 902err_cmd_poll: 903 mthca_cmd_use_polling(dev); 904 905err_eq_table_free: 906 mthca_cleanup_eq_table(dev); 907 908err_pd_free: 909 mthca_pd_free(dev, &dev->driver_pd); 910 911err_mr_table_free: 912 mthca_cleanup_mr_table(dev); 913 914err_pd_table_free: 915 mthca_cleanup_pd_table(dev); 916 917err_kar_unmap: 918 iounmap(dev->kar); 919 920err_uar_free: 921 mthca_uar_free(dev, &dev->driver_uar); 922 923err_uar_table_free: 924 mthca_cleanup_uar_table(dev); 925 return err; 926} 927 928static int mthca_enable_msi_x(struct mthca_dev *mdev) 929{ 930 struct msix_entry entries[3]; 931 int err; 932 933 entries[0].entry = 0; 934 entries[1].entry = 1; 935 entries[2].entry = 2; 936 937 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 938 if (err) { 939 if (err > 0) 940 mthca_info(mdev, "Only %d MSI-X vectors available, " 941 "not using MSI-X\n", err); 942 return err; 943 } 944 945 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 946 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 947 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 948 949 return 0; 950} 951 952/* Types of supported HCA */ 953enum { 954 TAVOR, /* MT23108 */ 955 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 956 ARBEL_NATIVE, /* MT25208 with extended features */ 957 SINAI /* MT25204 */ 958}; 959 960#define MTHCA_FW_VER(major, minor, subminor) \ 961 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 962 963static struct { 964 u64 latest_fw; 965 u32 flags; 966} mthca_hca_table[] = { 967 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 5, 0), 968 .flags = 0 }, 969 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 8, 200), 970 .flags = MTHCA_FLAG_PCIE }, 971 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 3, 0), 972 .flags = MTHCA_FLAG_MEMFREE | 973 MTHCA_FLAG_PCIE }, 974 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 2, 0), 975 .flags = MTHCA_FLAG_MEMFREE | 976 MTHCA_FLAG_PCIE | 977 MTHCA_FLAG_SINAI_OPT } 978}; 979 980static int __mthca_init_one(struct pci_dev *pdev, int hca_type) 981{ 982 int ddr_hidden = 0; 983 int err; 984 struct mthca_dev *mdev; 985 986 printk(KERN_INFO PFX "Initializing %s\n", 987 pci_name(pdev)); 988 989 err = pci_enable_device(pdev); 990 if (err) { 991 dev_err(&pdev->dev, "Cannot enable PCI device, " 992 "aborting.\n"); 993 return err; 994 } 995 996 /* 997 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 998 * be present) 999 */ 1000 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 1001 pci_resource_len(pdev, 0) != 1 << 20) { 1002 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 1003 err = -ENODEV; 1004 goto err_disable_pdev; 1005 } 1006 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 1007 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 1008 err = -ENODEV; 1009 goto err_disable_pdev; 1010 } 1011 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 1012 ddr_hidden = 1; 1013 1014 err = pci_request_regions(pdev, DRV_NAME); 1015 if (err) { 1016 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 1017 "aborting.\n"); 1018 goto err_disable_pdev; 1019 } 1020 1021 pci_set_master(pdev); 1022 1023 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 1024 if (err) { 1025 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 1026 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1027 if (err) { 1028 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 1029 goto err_free_res; 1030 } 1031 } 1032 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 1033 if (err) { 1034 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1035 "consistent PCI DMA mask.\n"); 1036 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 1037 if (err) { 1038 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1039 "aborting.\n"); 1040 goto err_free_res; 1041 } 1042 } 1043 1044 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1045 if (!mdev) { 1046 dev_err(&pdev->dev, "Device struct alloc failed, " 1047 "aborting.\n"); 1048 err = -ENOMEM; 1049 goto err_free_res; 1050 } 1051 1052 mdev->pdev = pdev; 1053 1054 mdev->mthca_flags = mthca_hca_table[hca_type].flags; 1055 if (ddr_hidden) 1056 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1057 1058 /* 1059 * Now reset the HCA before we touch the PCI capabilities or 1060 * attempt a firmware command, since a boot ROM may have left 1061 * the HCA in an undefined state. 1062 */ 1063 err = mthca_reset(mdev); 1064 if (err) { 1065 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1066 goto err_free_dev; 1067 } 1068 1069 if (mthca_cmd_init(mdev)) { 1070 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1071 goto err_free_dev; 1072 } 1073 1074 err = mthca_tune_pci(mdev); 1075 if (err) 1076 goto err_cmd; 1077 1078 err = mthca_init_hca(mdev); 1079 if (err) 1080 goto err_cmd; 1081 1082 if (mdev->fw_ver < mthca_hca_table[hca_type].latest_fw) { 1083 mthca_warn(mdev, "HCA FW version %d.%d.%03d is old (%d.%d.%03d is current).\n", 1084 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1085 (int) (mdev->fw_ver & 0xffff), 1086 (int) (mthca_hca_table[hca_type].latest_fw >> 32), 1087 (int) (mthca_hca_table[hca_type].latest_fw >> 16) & 0xffff, 1088 (int) (mthca_hca_table[hca_type].latest_fw & 0xffff)); 1089 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1090 } 1091 1092 if (msi_x && !mthca_enable_msi_x(mdev)) 1093 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1094 1095 err = mthca_setup_hca(mdev); 1096 if (err == -EBUSY && (mdev->mthca_flags & MTHCA_FLAG_MSI_X)) { 1097 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1098 pci_disable_msix(pdev); 1099 mdev->mthca_flags &= ~MTHCA_FLAG_MSI_X; 1100 1101 err = mthca_setup_hca(mdev); 1102 } 1103 1104 if (err) 1105 goto err_close; 1106 1107 err = mthca_register_device(mdev); 1108 if (err) 1109 goto err_cleanup; 1110 1111 err = mthca_create_agents(mdev); 1112 if (err) 1113 goto err_unregister; 1114 1115 pci_set_drvdata(pdev, mdev); 1116 mdev->hca_type = hca_type; 1117 1118 mdev->active = 1; 1119 1120 return 0; 1121 1122err_unregister: 1123 mthca_unregister_device(mdev); 1124 1125err_cleanup: 1126 mthca_cleanup_mcg_table(mdev); 1127 mthca_cleanup_av_table(mdev); 1128 mthca_cleanup_qp_table(mdev); 1129 mthca_cleanup_srq_table(mdev); 1130 mthca_cleanup_cq_table(mdev); 1131 mthca_cmd_use_polling(mdev); 1132 mthca_cleanup_eq_table(mdev); 1133 1134 mthca_pd_free(mdev, &mdev->driver_pd); 1135 1136 mthca_cleanup_mr_table(mdev); 1137 mthca_cleanup_pd_table(mdev); 1138 mthca_cleanup_uar_table(mdev); 1139 1140err_close: 1141 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1142 pci_disable_msix(pdev); 1143 1144 mthca_close_hca(mdev); 1145 1146err_cmd: 1147 mthca_cmd_cleanup(mdev); 1148 1149err_free_dev: 1150 ib_dealloc_device(&mdev->ib_dev); 1151 1152err_free_res: 1153 pci_release_regions(pdev); 1154 1155err_disable_pdev: 1156 pci_disable_device(pdev); 1157 pci_set_drvdata(pdev, NULL); 1158 return err; 1159} 1160 1161static void __mthca_remove_one(struct pci_dev *pdev) 1162{ 1163 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1164 u8 status; 1165 int p; 1166 1167 if (mdev) { 1168 mthca_free_agents(mdev); 1169 mthca_unregister_device(mdev); 1170 1171 for (p = 1; p <= mdev->limits.num_ports; ++p) 1172 mthca_CLOSE_IB(mdev, p, &status); 1173 1174 mthca_cleanup_mcg_table(mdev); 1175 mthca_cleanup_av_table(mdev); 1176 mthca_cleanup_qp_table(mdev); 1177 mthca_cleanup_srq_table(mdev); 1178 mthca_cleanup_cq_table(mdev); 1179 mthca_cmd_use_polling(mdev); 1180 mthca_cleanup_eq_table(mdev); 1181 1182 mthca_pd_free(mdev, &mdev->driver_pd); 1183 1184 mthca_cleanup_mr_table(mdev); 1185 mthca_cleanup_pd_table(mdev); 1186 1187 iounmap(mdev->kar); 1188 mthca_uar_free(mdev, &mdev->driver_uar); 1189 mthca_cleanup_uar_table(mdev); 1190 mthca_close_hca(mdev); 1191 mthca_cmd_cleanup(mdev); 1192 1193 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1194 pci_disable_msix(pdev); 1195 1196 ib_dealloc_device(&mdev->ib_dev); 1197 pci_release_regions(pdev); 1198 pci_disable_device(pdev); 1199 pci_set_drvdata(pdev, NULL); 1200 } 1201} 1202 1203int __mthca_restart_one(struct pci_dev *pdev) 1204{ 1205 struct mthca_dev *mdev; 1206 int hca_type; 1207 1208 mdev = pci_get_drvdata(pdev); 1209 if (!mdev) 1210 return -ENODEV; 1211 hca_type = mdev->hca_type; 1212 __mthca_remove_one(pdev); 1213 return __mthca_init_one(pdev, hca_type); 1214} 1215 1216static int __devinit mthca_init_one(struct pci_dev *pdev, 1217 const struct pci_device_id *id) 1218{ 1219 static int mthca_version_printed = 0; 1220 int ret; 1221 1222 mutex_lock(&mthca_device_mutex); 1223 1224 if (!mthca_version_printed) { 1225 printk(KERN_INFO "%s", mthca_version); 1226 ++mthca_version_printed; 1227 } 1228 1229 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 1230 printk(KERN_ERR PFX "%s has invalid driver data %jx\n", 1231 pci_name(pdev), (uintmax_t)id->driver_data); 1232 mutex_unlock(&mthca_device_mutex); 1233 return -ENODEV; 1234 } 1235 1236 ret = __mthca_init_one(pdev, id->driver_data); 1237 1238 mutex_unlock(&mthca_device_mutex); 1239 1240 return ret; 1241} 1242 1243static void __devexit mthca_remove_one(struct pci_dev *pdev) 1244{ 1245 mutex_lock(&mthca_device_mutex); 1246 __mthca_remove_one(pdev); 1247 mutex_unlock(&mthca_device_mutex); 1248} 1249 1250static struct pci_device_id mthca_pci_table[] = { 1251 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1252 .driver_data = TAVOR }, 1253 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1254 .driver_data = TAVOR }, 1255 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1256 .driver_data = ARBEL_COMPAT }, 1257 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1258 .driver_data = ARBEL_COMPAT }, 1259 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1260 .driver_data = ARBEL_NATIVE }, 1261 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1262 .driver_data = ARBEL_NATIVE }, 1263 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1264 .driver_data = SINAI }, 1265 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1266 .driver_data = SINAI }, 1267 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1268 .driver_data = SINAI }, 1269 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1270 .driver_data = SINAI }, 1271 { 0, } 1272}; 1273 1274MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1275 1276static struct pci_driver mthca_driver = { 1277 .name = DRV_NAME, 1278 .id_table = mthca_pci_table, 1279 .probe = mthca_init_one, 1280 .remove = __devexit_p(mthca_remove_one) 1281}; 1282 1283static void __init __mthca_check_profile_val(const char *name, int *pval, 1284 int pval_default) 1285{ 1286 /* value must be positive and power of 2 */ 1287 int old_pval = *pval; 1288 1289 if (old_pval <= 0) 1290 *pval = pval_default; 1291 else 1292 *pval = roundup_pow_of_two(old_pval); 1293 1294 if (old_pval != *pval) { 1295 printk(KERN_WARNING PFX "Invalid value %d for %s in module parameter.\n", 1296 old_pval, name); 1297 printk(KERN_WARNING PFX "Corrected %s to %d.\n", name, *pval); 1298 } 1299} 1300 1301#define mthca_check_profile_val(name, default) \ 1302 __mthca_check_profile_val(#name, &hca_profile.name, default) 1303 1304static void __init mthca_validate_profile(void) 1305{ 1306 mthca_check_profile_val(num_qp, MTHCA_DEFAULT_NUM_QP); 1307 mthca_check_profile_val(rdb_per_qp, MTHCA_DEFAULT_RDB_PER_QP); 1308 mthca_check_profile_val(num_cq, MTHCA_DEFAULT_NUM_CQ); 1309 mthca_check_profile_val(num_mcg, MTHCA_DEFAULT_NUM_MCG); 1310 mthca_check_profile_val(num_mpt, MTHCA_DEFAULT_NUM_MPT); 1311 mthca_check_profile_val(num_mtt, MTHCA_DEFAULT_NUM_MTT); 1312 mthca_check_profile_val(num_udav, MTHCA_DEFAULT_NUM_UDAV); 1313 mthca_check_profile_val(fmr_reserved_mtts, MTHCA_DEFAULT_NUM_RESERVED_MTTS); 1314 1315 if (hca_profile.fmr_reserved_mtts >= hca_profile.num_mtt) { 1316 printk(KERN_WARNING PFX "Invalid fmr_reserved_mtts module parameter %d.\n", 1317 hca_profile.fmr_reserved_mtts); 1318 printk(KERN_WARNING PFX "(Must be smaller than num_mtt %d)\n", 1319 hca_profile.num_mtt); 1320 hca_profile.fmr_reserved_mtts = hca_profile.num_mtt / 2; 1321 printk(KERN_WARNING PFX "Corrected fmr_reserved_mtts to %d.\n", 1322 hca_profile.fmr_reserved_mtts); 1323 } 1324 if (log_mtts_per_seg == 0) 1325 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8); 1326 if ((log_mtts_per_seg < 1) || (log_mtts_per_seg > 5)) { 1327 printk(KERN_WARNING PFX "bad log_mtts_per_seg (%d). Using default - %d\n", 1328 log_mtts_per_seg, ilog2(MTHCA_MTT_SEG_SIZE / 8)); 1329 log_mtts_per_seg = ilog2(MTHCA_MTT_SEG_SIZE / 8); 1330 } 1331} 1332 1333static int __init mthca_init(void) 1334{ 1335 int ret; 1336 1337 mthca_validate_profile(); 1338 1339 ret = mthca_catas_init(); 1340 if (ret) 1341 return ret; 1342 1343 ret = pci_register_driver(&mthca_driver); 1344 if (ret < 0) { 1345 mthca_catas_cleanup(); 1346 return ret; 1347 } 1348 1349 return 0; 1350} 1351 1352static void __exit mthca_cleanup(void) 1353{ 1354 pci_unregister_driver(&mthca_driver); 1355 mthca_catas_cleanup(); 1356} 1357 1358module_init_order(mthca_init, SI_ORDER_MIDDLE); 1359module_exit(mthca_cleanup); 1360