1/*	$FreeBSD$	*/
2/*	$NecBSD: dp83932var.h,v 1.3 1999/01/24 01:39:51 kmatsuda Exp $	*/
3/*	$NetBSD: if_snvar.h,v 1.12 1998/05/01 03:42:47 scottr Exp $	*/
4
5/*-
6 * [NetBSD for NEC PC-98 series]
7 *  Copyright (c) 1997, 1998, 1999
8 *	Kouichi Matsuda.  All rights reserved.
9 *
10 * Copyright (c) 1991   Algorithmics Ltd (http://www.algor.co.uk)
11 * You may use, copy, and modify this program so long as you retain the
12 * copyright line.
13 */
14
15/*
16 * if_snvar.h -- National Semiconductor DP8393X (SONIC) NetBSD/mac68k vars
17 */
18/*
19 * Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda.
20 * Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and
21 * PC-9801N-J02, J02R, which uses National Semiconductor DP83934AVQB as
22 * Ethernet Controller and National Semiconductor NS46C46 as
23 * (64 * 16 bits) Microwire Serial EEPROM.
24 */
25
26/*
27 * Vendor types
28 */
29
30/*
31 * SONIC buffers need to be aligned 16 or 32 bit aligned.
32 * These macros calculate and verify alignment.
33 */
34#define	ROUNDUP(p, N)	(((int) p + N - 1) & ~(N - 1))
35
36#define SOALIGN(m, array)	(m ? (ROUNDUP(array, 4)) : (ROUNDUP(array, 2)))
37
38#define LOWER(x) ((unsigned)(x) & 0xffff)
39#define UPPER(x) ((unsigned)(x) >> 16)
40
41/*
42 * Memory access macros. Since we handle SONIC in 16 bit mode (PB5X0)
43 * and 32 bit mode (everything else) using a single GENERIC kernel
44 * binary, all structures have to be accessed using macros which can
45 * adjust the offsets appropriately.
46 */
47/* m is not sc->bitmode, we treat m as sc. */
48#define	SWO(m, a, o, x)	(*(m)->sc_writetodesc)((m), (a), (o), (x))
49#define	SRO(m, a, o)	(*(m)->sc_readfromdesc)((m), (a), (o))
50
51/*
52 * Register access macros. We use bus_space_* to talk to the Sonic
53 * registers. A mapping table is used in case a particular configuration
54 * hooked the regs up at non-word offsets.
55 */
56#define	NIC_GET(sc, reg)	(*(sc)->sc_nic_get)(sc, reg)
57#define	NIC_PUT(sc, reg, val)	(*(sc)->sc_nic_put)(sc, reg, val)
58
59#define	SONIC_GETDMA(p)	(p)
60
61/* pc98 does not have any write buffers to flush... */
62#define	wbflush()
63
64/*
65 * buffer sizes in 32 bit mode
66 * 1 TXpkt is 4 hdr words + (3 * FRAGMAX) + 1 link word == 23 words == 92 bytes
67 *
68 * 1 RxPkt is 7 words == 28 bytes
69 * 1 Rda   is 4 words == 16 bytes
70 *
71 * The CDA is 17 words == 68 bytes
72 *
73 * total space in page 0 = NTDA * 92 + NRRA * 16 + NRDA * 28 + 68
74 */
75
76#define NRBA    16		/* # receive buffers < NRRA */
77#define RBAMASK (NRBA-1)
78#define NTDA    16		/* # transmit descriptors */
79#define NRRA    64		/* # receive resource descriptors */
80#define RRAMASK (NRRA-1)	/* the reason why NRRA must be power of two */
81
82#define FCSSIZE 4		/* size of FCS appended to packets */
83
84/*
85 * maximum receive packet size plus 2 byte pad to make each
86 * one aligned. 4 byte slop (required for eobc)
87 */
88#define RBASIZE(sc)	(sizeof(struct ether_header) + ETHERMTU + FCSSIZE + \
89			 ((sc)->bitmode ? 6 : 2))
90
91/*
92 * transmit buffer area
93 */
94#define TXBSIZE	1536	/* 6*2^8 -- the same size as the 8390 TXBUF */
95
96#define	SN_NPAGES	2 + NRBA + (NTDA/2)
97
98typedef struct mtd {
99	u_int32_t	mtd_vtxp;
100	u_int32_t	mtd_vbuf;
101	struct mbuf	*mtd_mbuf;
102} mtd_t;
103
104/*
105 * The snc_softc for PC-98 if_snc.
106 */
107typedef struct snc_softc {
108	struct ifnet	*	sc_ifp;
109
110	device_t	sc_dev;
111
112	struct resource *	ioport;
113	int			ioport_rid;
114	struct resource *	iomem;
115	int			iomem_rid;
116	struct resource *	irq;
117	int			irq_rid;
118	void *			irq_handle;
119
120	bus_space_tag_t		sc_iot;		/* bus identifier for io */
121	bus_space_tag_t		sc_memt;	/* bus identifier for mem */
122	bus_space_handle_t	sc_ioh;		/* io handle */
123	bus_space_handle_t	sc_memh;	/* bus memory handle */
124
125	int		bitmode;	/* 32 bit mode == 1, 16 == 0 */
126
127	u_int16_t	sncr_dcr;	/* DCR for this instance */
128	u_int16_t	sncr_dcr2;	/* DCR2 for this instance */
129
130	int		sc_rramark;	/* index into v_rra of wp */
131	u_int32_t	v_rra[NRRA];	/* DMA addresses of v_rra */
132	u_int32_t	v_rea;		/* ptr to the end of the rra space */
133
134	int		sc_rxmark;	/* current hw pos in rda ring */
135	int		sc_rdamark;	/* current sw pos in rda ring */
136	int		sc_nrda;	/* total number of RDAs */
137	u_int32_t	v_rda;
138
139	u_int32_t	rbuf[NRBA];
140
141	struct mtd	mtda[NTDA];
142	int		mtd_hw;		/* idx of first mtd given to hw */
143	int		mtd_prev;	/* idx of last mtd given to hardware */
144	int		mtd_free;	/* next free mtd to use */
145	int		mtd_tlinko;	/*
146					 * offset of tlink of last txp given
147					 * to SONIC. Need to clear EOL on
148					 * this word to add a desc.
149					 */
150	int		mtd_pint;	/* Counter to set TXP_PINT */
151
152	u_int32_t	v_cda;
153
154	u_int8_t	curbank;	/* current window bank */
155
156	struct	ifmedia sc_media;	/* supported media information */
157
158	/*
159	 * NIC register access functions:
160	 */
161	u_int16_t	(*sc_nic_get)
162		(struct snc_softc *, u_int8_t);
163	void		(*sc_nic_put)
164		(struct snc_softc *, u_int8_t, u_int16_t);
165
166	/*
167	 * Memory functions:
168	 *
169	 *	copy to/from descriptor
170	 *	copy to/from buffer
171	 *	zero bytes in buffer
172	 */
173	void		(*sc_writetodesc)
174		(struct snc_softc *, u_int32_t, u_int32_t, u_int16_t);
175	u_int16_t	(*sc_readfromdesc)
176		(struct snc_softc *, u_int32_t, u_int32_t);
177	void		(*sc_copytobuf)
178		(struct snc_softc *, void *, u_int32_t, size_t);
179	void		(*sc_copyfrombuf)
180		(struct snc_softc *, void *, u_int32_t, size_t);
181	void		(*sc_zerobuf)
182		(struct snc_softc *, u_int32_t, size_t);
183
184	/*
185	 * Machine-dependent functions:
186	 *
187	 *	hardware reset hook - may be NULL
188	 *	hardware init hook - may be NULL
189	 *	media change hook - may be NULL
190	 */
191	void	(*sc_hwreset)(struct snc_softc *);
192	void	(*sc_hwinit)(struct snc_softc *);
193	int	(*sc_mediachange)(struct snc_softc *);
194	void	(*sc_mediastatus)(struct snc_softc *, struct ifmediareq *);
195
196	int	sc_enabled;	/* boolean; power enabled on interface */
197
198	int	(*sc_enable)(struct snc_softc *);
199	void	(*sc_disable)(struct snc_softc *);
200
201	void	*sc_sh;		/* shutdownhook cookie */
202	int	gone;
203	struct mtx	sc_lock;
204	struct callout	sc_timer;
205	int		sc_tx_timeout;
206} snc_softc_t;
207
208#define	SNC_LOCK(sc)		mtx_lock(&(sc)->sc_lock)
209#define	SNC_UNLOCK(sc)		mtx_unlock(&(sc)->sc_lock)
210#define	SNC_ASSERT_LOCKED(sc)	mtx_assert(&(sc)->sc_lock, MA_OWNED)
211
212/*
213 * Accessing SONIC data structures and registers as 32 bit values
214 * makes code endianess independent.  The SONIC is however always in
215 * bigendian mode so it is necessary to ensure that data structures shared
216 * between the CPU and the SONIC are always in bigendian order.
217 */
218
219/*
220 * Receive Resource Descriptor
221 * This structure describes the buffers into which packets
222 * will be received.  Note that more than one packet may be
223 * packed into a single buffer if constraints permit.
224 */
225#define	RXRSRC_PTRLO	0	/* buffer address LO */
226#define	RXRSRC_PTRHI	1	/* buffer address HI */
227#define	RXRSRC_WCLO	2	/* buffer size (16bit words) LO */
228#define	RXRSRC_WCHI	3	/* buffer size (16bit words) HI */
229
230#define	RXRSRC_SIZE(sc)	(sc->bitmode ? (4 * 4) : (4 * 2))
231
232/*
233 * Receive Descriptor
234 * This structure holds information about packets received.
235 */
236#define	RXPKT_STATUS	0
237#define	RXPKT_BYTEC	1
238#define	RXPKT_PTRLO	2
239#define	RXPKT_PTRHI	3
240#define	RXPKT_SEQNO	4
241#define	RXPKT_RLINK	5
242#define	RXPKT_INUSE	6
243#define	RXPKT_SIZE(sc)	(sc->bitmode ? (7 * 4) : (7 * 2))
244
245#define RBASEQ(x) (((x)>>8)&0xff)
246#define PSNSEQ(x) ((x) & 0xff)
247
248/*
249 * Transmit Descriptor
250 * This structure holds information about packets to be transmitted.
251 */
252#define FRAGMAX	8		/* maximum number of fragments in a packet */
253
254#define	TXP_STATUS	0	/* + transmitted packet status */
255#define	TXP_CONFIG	1	/* transmission configuration */
256#define	TXP_PKTSIZE	2	/* entire packet size in bytes */
257#define	TXP_FRAGCNT	3	/* # fragments in packet */
258
259#define	TXP_FRAGOFF	4	/* offset to first fragment */
260#define	TXP_FRAGSIZE	3	/* size of each fragment desc */
261#define	TXP_FPTRLO	0	/* ptr to packet fragment LO */
262#define	TXP_FPTRHI	1	/* ptr to packet fragment HI */
263#define	TXP_FSIZE	2	/* fragment size */
264
265#define	TXP_WORDS	(TXP_FRAGOFF + (FRAGMAX*TXP_FRAGSIZE) + 1)	/* 1 for tlink */
266#define	TXP_SIZE(sc)	((sc->bitmode) ? (TXP_WORDS*4) : (TXP_WORDS*2))
267
268#define EOL	0x0001		/* end of list marker for link fields */
269
270/*
271 * CDA, the CAM descriptor area. The SONIC has a 16 entry CAM to
272 * match incoming addresses against. It is programmed via DMA
273 * from a memory region.
274 */
275#define MAXCAM	16	/* number of user entries in CAM */
276#define	CDA_CAMDESC	4	/* # words i na descriptor */
277#define	CDA_CAMEP	0	/* CAM Address Port 0 xx-xx-xx-xx-YY-YY */
278#define	CDA_CAMAP0	1	/* CAM Address Port 1 xx-xx-YY-YY-xx-xx */
279#define	CDA_CAMAP1	2	/* CAM Address Port 2 YY-YY-xx-xx-xx-xx */
280#define	CDA_CAMAP2	3
281#define	CDA_ENABLE	64	/* mask enabling CAM entries */
282#define	CDA_SIZE(sc)	((4*16 + 1) * ((sc->bitmode) ? 4 : 2))
283
284int	sncconfig(struct snc_softc *, int *, int, int, u_int8_t *);
285void	sncintr(void *);
286void	sncshutdown(void *);
287