1/****************************************************************************** 2 3 Copyright (c) 2001-2013, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD$*/ 34 35#include "ixgbe_api.h" 36#include "ixgbe_common.h" 37 38/** 39 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg 40 * @hw: pointer to hardware structure 41 * @map: pointer to u8 arr for returning map 42 * 43 * Read the rtrup2tc HW register and resolve its content into map 44 **/ 45void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map) 46{ 47 if (hw->mac.ops.get_rtrup2tc) 48 hw->mac.ops.get_rtrup2tc(hw, map); 49} 50 51/** 52 * ixgbe_init_shared_code - Initialize the shared code 53 * @hw: pointer to hardware structure 54 * 55 * This will assign function pointers and assign the MAC type and PHY code. 56 * Does not touch the hardware. This function must be called prior to any 57 * other function in the shared code. The ixgbe_hw structure should be 58 * memset to 0 prior to calling this function. The following fields in 59 * hw structure should be filled in prior to calling this function: 60 * hw_addr, back, device_id, vendor_id, subsystem_device_id, 61 * subsystem_vendor_id, and revision_id 62 **/ 63s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 64{ 65 s32 status; 66 67 DEBUGFUNC("ixgbe_init_shared_code"); 68 69 /* 70 * Set the mac type 71 */ 72 ixgbe_set_mac_type(hw); 73 74 switch (hw->mac.type) { 75 case ixgbe_mac_82598EB: 76 status = ixgbe_init_ops_82598(hw); 77 break; 78 case ixgbe_mac_82599EB: 79 status = ixgbe_init_ops_82599(hw); 80 break; 81 case ixgbe_mac_82599_vf: 82 case ixgbe_mac_X540_vf: 83 status = ixgbe_init_ops_vf(hw); 84 break; 85 case ixgbe_mac_X540: 86 status = ixgbe_init_ops_X540(hw); 87 break; 88 default: 89 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 90 break; 91 } 92 93 return status; 94} 95 96/** 97 * ixgbe_set_mac_type - Sets MAC type 98 * @hw: pointer to the HW structure 99 * 100 * This function sets the mac type of the adapter based on the 101 * vendor ID and device ID stored in the hw structure. 102 **/ 103s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 104{ 105 s32 ret_val = IXGBE_SUCCESS; 106 107 DEBUGFUNC("ixgbe_set_mac_type\n"); 108 109 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) { 110 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, 111 "Unsupported vendor id: %x", hw->vendor_id); 112 return IXGBE_ERR_DEVICE_NOT_SUPPORTED; 113 } 114 115 switch (hw->device_id) { 116 case IXGBE_DEV_ID_82598: 117 case IXGBE_DEV_ID_82598_BX: 118 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 119 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 120 case IXGBE_DEV_ID_82598AT: 121 case IXGBE_DEV_ID_82598AT2: 122 case IXGBE_DEV_ID_82598EB_CX4: 123 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 124 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 125 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 126 case IXGBE_DEV_ID_82598EB_XF_LR: 127 case IXGBE_DEV_ID_82598EB_SFP_LOM: 128 hw->mac.type = ixgbe_mac_82598EB; 129 break; 130 case IXGBE_DEV_ID_82599_KX4: 131 case IXGBE_DEV_ID_82599_KX4_MEZZ: 132 case IXGBE_DEV_ID_82599_XAUI_LOM: 133 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 134 case IXGBE_DEV_ID_82599_KR: 135 case IXGBE_DEV_ID_82599_SFP: 136 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 137 case IXGBE_DEV_ID_82599_SFP_FCOE: 138 case IXGBE_DEV_ID_82599_SFP_EM: 139 case IXGBE_DEV_ID_82599_SFP_SF2: 140 case IXGBE_DEV_ID_82599_SFP_SF_QP: 141 case IXGBE_DEV_ID_82599EN_SFP: 142 case IXGBE_DEV_ID_82599_CX4: 143 case IXGBE_DEV_ID_82599_BYPASS: 144 case IXGBE_DEV_ID_82599_T3_LOM: 145 hw->mac.type = ixgbe_mac_82599EB; 146 break; 147 case IXGBE_DEV_ID_82599_VF: 148 case IXGBE_DEV_ID_82599_VF_HV: 149 hw->mac.type = ixgbe_mac_82599_vf; 150 break; 151 case IXGBE_DEV_ID_X540_VF: 152 case IXGBE_DEV_ID_X540_VF_HV: 153 hw->mac.type = ixgbe_mac_X540_vf; 154 break; 155 case IXGBE_DEV_ID_X540T: 156 case IXGBE_DEV_ID_X540_BYPASS: 157 hw->mac.type = ixgbe_mac_X540; 158 break; 159 default: 160 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 161 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, 162 "Unsupported device id: %x", 163 hw->device_id); 164 break; 165 } 166 167 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 168 hw->mac.type, ret_val); 169 return ret_val; 170} 171 172/** 173 * ixgbe_init_hw - Initialize the hardware 174 * @hw: pointer to hardware structure 175 * 176 * Initialize the hardware by resetting and then starting the hardware 177 **/ 178s32 ixgbe_init_hw(struct ixgbe_hw *hw) 179{ 180 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 181 IXGBE_NOT_IMPLEMENTED); 182} 183 184/** 185 * ixgbe_reset_hw - Performs a hardware reset 186 * @hw: pointer to hardware structure 187 * 188 * Resets the hardware by resetting the transmit and receive units, masks and 189 * clears all interrupts, performs a PHY reset, and performs a MAC reset 190 **/ 191s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 192{ 193 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 194 IXGBE_NOT_IMPLEMENTED); 195} 196 197/** 198 * ixgbe_start_hw - Prepares hardware for Rx/Tx 199 * @hw: pointer to hardware structure 200 * 201 * Starts the hardware by filling the bus info structure and media type, 202 * clears all on chip counters, initializes receive address registers, 203 * multicast table, VLAN filter table, calls routine to setup link and 204 * flow control settings, and leaves transmit and receive units disabled 205 * and uninitialized. 206 **/ 207s32 ixgbe_start_hw(struct ixgbe_hw *hw) 208{ 209 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 210 IXGBE_NOT_IMPLEMENTED); 211} 212 213/** 214 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 215 * which is disabled by default in ixgbe_start_hw(); 216 * 217 * @hw: pointer to hardware structure 218 * 219 * Enable relaxed ordering; 220 **/ 221void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 222{ 223 if (hw->mac.ops.enable_relaxed_ordering) 224 hw->mac.ops.enable_relaxed_ordering(hw); 225} 226 227/** 228 * ixgbe_clear_hw_cntrs - Clear hardware counters 229 * @hw: pointer to hardware structure 230 * 231 * Clears all hardware statistics counters by reading them from the hardware 232 * Statistics counters are clear on read. 233 **/ 234s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 235{ 236 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 237 IXGBE_NOT_IMPLEMENTED); 238} 239 240/** 241 * ixgbe_get_media_type - Get media type 242 * @hw: pointer to hardware structure 243 * 244 * Returns the media type (fiber, copper, backplane) 245 **/ 246enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 247{ 248 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 249 ixgbe_media_type_unknown); 250} 251 252/** 253 * ixgbe_get_mac_addr - Get MAC address 254 * @hw: pointer to hardware structure 255 * @mac_addr: Adapter MAC address 256 * 257 * Reads the adapter's MAC address from the first Receive Address Register 258 * (RAR0) A reset of the adapter must have been performed prior to calling 259 * this function in order for the MAC address to have been loaded from the 260 * EEPROM into RAR0 261 **/ 262s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 263{ 264 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 265 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 266} 267 268/** 269 * ixgbe_get_san_mac_addr - Get SAN MAC address 270 * @hw: pointer to hardware structure 271 * @san_mac_addr: SAN MAC address 272 * 273 * Reads the SAN MAC address from the EEPROM, if it's available. This is 274 * per-port, so set_lan_id() must be called before reading the addresses. 275 **/ 276s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 277{ 278 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 279 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 280} 281 282/** 283 * ixgbe_set_san_mac_addr - Write a SAN MAC address 284 * @hw: pointer to hardware structure 285 * @san_mac_addr: SAN MAC address 286 * 287 * Writes A SAN MAC address to the EEPROM. 288 **/ 289s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 290{ 291 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 292 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 293} 294 295/** 296 * ixgbe_get_device_caps - Get additional device capabilities 297 * @hw: pointer to hardware structure 298 * @device_caps: the EEPROM word for device capabilities 299 * 300 * Reads the extra device capabilities from the EEPROM 301 **/ 302s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 303{ 304 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 305 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 306} 307 308/** 309 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 310 * @hw: pointer to hardware structure 311 * @wwnn_prefix: the alternative WWNN prefix 312 * @wwpn_prefix: the alternative WWPN prefix 313 * 314 * This function will read the EEPROM from the alternative SAN MAC address 315 * block to check the support for the alternative WWNN/WWPN prefix support. 316 **/ 317s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 318 u16 *wwpn_prefix) 319{ 320 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 321 (hw, wwnn_prefix, wwpn_prefix), 322 IXGBE_NOT_IMPLEMENTED); 323} 324 325/** 326 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 327 * @hw: pointer to hardware structure 328 * @bs: the fcoe boot status 329 * 330 * This function will read the FCOE boot status from the iSCSI FCOE block 331 **/ 332s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 333{ 334 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 335 (hw, bs), 336 IXGBE_NOT_IMPLEMENTED); 337} 338 339/** 340 * ixgbe_get_bus_info - Set PCI bus info 341 * @hw: pointer to hardware structure 342 * 343 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 344 **/ 345s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 346{ 347 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 348 IXGBE_NOT_IMPLEMENTED); 349} 350 351/** 352 * ixgbe_get_num_of_tx_queues - Get Tx queues 353 * @hw: pointer to hardware structure 354 * 355 * Returns the number of transmit queues for the given adapter. 356 **/ 357u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 358{ 359 return hw->mac.max_tx_queues; 360} 361 362/** 363 * ixgbe_get_num_of_rx_queues - Get Rx queues 364 * @hw: pointer to hardware structure 365 * 366 * Returns the number of receive queues for the given adapter. 367 **/ 368u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 369{ 370 return hw->mac.max_rx_queues; 371} 372 373/** 374 * ixgbe_stop_adapter - Disable Rx/Tx units 375 * @hw: pointer to hardware structure 376 * 377 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 378 * disables transmit and receive units. The adapter_stopped flag is used by 379 * the shared code and drivers to determine if the adapter is in a stopped 380 * state and should not touch the hardware. 381 **/ 382s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 383{ 384 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 385 IXGBE_NOT_IMPLEMENTED); 386} 387 388/** 389 * ixgbe_read_pba_string - Reads part number string from EEPROM 390 * @hw: pointer to hardware structure 391 * @pba_num: stores the part number string from the EEPROM 392 * @pba_num_size: part number string buffer length 393 * 394 * Reads the part number string from the EEPROM. 395 **/ 396s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 397{ 398 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 399} 400 401/** 402 * ixgbe_read_pba_num - Reads part number from EEPROM 403 * @hw: pointer to hardware structure 404 * @pba_num: stores the part number from the EEPROM 405 * 406 * Reads the part number from the EEPROM. 407 **/ 408s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 409{ 410 return ixgbe_read_pba_num_generic(hw, pba_num); 411} 412 413/** 414 * ixgbe_identify_phy - Get PHY type 415 * @hw: pointer to hardware structure 416 * 417 * Determines the physical layer module found on the current adapter. 418 **/ 419s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 420{ 421 s32 status = IXGBE_SUCCESS; 422 423 if (hw->phy.type == ixgbe_phy_unknown) { 424 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 425 IXGBE_NOT_IMPLEMENTED); 426 } 427 428 return status; 429} 430 431/** 432 * ixgbe_reset_phy - Perform a PHY reset 433 * @hw: pointer to hardware structure 434 **/ 435s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 436{ 437 s32 status = IXGBE_SUCCESS; 438 439 if (hw->phy.type == ixgbe_phy_unknown) { 440 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 441 status = IXGBE_ERR_PHY; 442 } 443 444 if (status == IXGBE_SUCCESS) { 445 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 446 IXGBE_NOT_IMPLEMENTED); 447 } 448 return status; 449} 450 451/** 452 * ixgbe_get_phy_firmware_version - 453 * @hw: pointer to hardware structure 454 * @firmware_version: pointer to firmware version 455 **/ 456s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 457{ 458 s32 status = IXGBE_SUCCESS; 459 460 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 461 (hw, firmware_version), 462 IXGBE_NOT_IMPLEMENTED); 463 return status; 464} 465 466/** 467 * ixgbe_read_phy_reg - Read PHY register 468 * @hw: pointer to hardware structure 469 * @reg_addr: 32 bit address of PHY register to read 470 * @phy_data: Pointer to read data from PHY register 471 * 472 * Reads a value from a specified PHY register 473 **/ 474s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 475 u16 *phy_data) 476{ 477 if (hw->phy.id == 0) 478 ixgbe_identify_phy(hw); 479 480 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 481 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 482} 483 484/** 485 * ixgbe_write_phy_reg - Write PHY register 486 * @hw: pointer to hardware structure 487 * @reg_addr: 32 bit PHY register to write 488 * @phy_data: Data to write to the PHY register 489 * 490 * Writes a value to specified PHY register 491 **/ 492s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 493 u16 phy_data) 494{ 495 if (hw->phy.id == 0) 496 ixgbe_identify_phy(hw); 497 498 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 499 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 500} 501 502/** 503 * ixgbe_setup_phy_link - Restart PHY autoneg 504 * @hw: pointer to hardware structure 505 * 506 * Restart autonegotiation and PHY and waits for completion. 507 **/ 508s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 509{ 510 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 511 IXGBE_NOT_IMPLEMENTED); 512} 513 514/** 515 * ixgbe_check_phy_link - Determine link and speed status 516 * @hw: pointer to hardware structure 517 * 518 * Reads a PHY register to determine if link is up and the current speed for 519 * the PHY. 520 **/ 521s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 522 bool *link_up) 523{ 524 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 525 link_up), IXGBE_NOT_IMPLEMENTED); 526} 527 528/** 529 * ixgbe_setup_phy_link_speed - Set auto advertise 530 * @hw: pointer to hardware structure 531 * @speed: new link speed 532 * 533 * Sets the auto advertised capabilities 534 **/ 535s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 536 bool autoneg_wait_to_complete) 537{ 538 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 539 autoneg_wait_to_complete), 540 IXGBE_NOT_IMPLEMENTED); 541} 542 543/** 544 * ixgbe_check_link - Get link and speed status 545 * @hw: pointer to hardware structure 546 * 547 * Reads the links register to determine if link is up and the current speed 548 **/ 549s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 550 bool *link_up, bool link_up_wait_to_complete) 551{ 552 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 553 link_up, link_up_wait_to_complete), 554 IXGBE_NOT_IMPLEMENTED); 555} 556 557/** 558 * ixgbe_disable_tx_laser - Disable Tx laser 559 * @hw: pointer to hardware structure 560 * 561 * If the driver needs to disable the laser on SFI optics. 562 **/ 563void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 564{ 565 if (hw->mac.ops.disable_tx_laser) 566 hw->mac.ops.disable_tx_laser(hw); 567} 568 569/** 570 * ixgbe_enable_tx_laser - Enable Tx laser 571 * @hw: pointer to hardware structure 572 * 573 * If the driver needs to enable the laser on SFI optics. 574 **/ 575void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 576{ 577 if (hw->mac.ops.enable_tx_laser) 578 hw->mac.ops.enable_tx_laser(hw); 579} 580 581/** 582 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 583 * @hw: pointer to hardware structure 584 * 585 * When the driver changes the link speeds that it can support then 586 * flap the tx laser to alert the link partner to start autotry 587 * process on its end. 588 **/ 589void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 590{ 591 if (hw->mac.ops.flap_tx_laser) 592 hw->mac.ops.flap_tx_laser(hw); 593} 594 595/** 596 * ixgbe_setup_link - Set link speed 597 * @hw: pointer to hardware structure 598 * @speed: new link speed 599 * 600 * Configures link settings. Restarts the link. 601 * Performs autonegotiation if needed. 602 **/ 603s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 604 bool autoneg_wait_to_complete) 605{ 606 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 607 autoneg_wait_to_complete), 608 IXGBE_NOT_IMPLEMENTED); 609} 610 611/** 612 * ixgbe_get_link_capabilities - Returns link capabilities 613 * @hw: pointer to hardware structure 614 * 615 * Determines the link capabilities of the current configuration. 616 **/ 617s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 618 bool *autoneg) 619{ 620 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 621 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 622} 623 624/** 625 * ixgbe_led_on - Turn on LEDs 626 * @hw: pointer to hardware structure 627 * @index: led number to turn on 628 * 629 * Turns on the software controllable LEDs. 630 **/ 631s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 632{ 633 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 634 IXGBE_NOT_IMPLEMENTED); 635} 636 637/** 638 * ixgbe_led_off - Turn off LEDs 639 * @hw: pointer to hardware structure 640 * @index: led number to turn off 641 * 642 * Turns off the software controllable LEDs. 643 **/ 644s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 645{ 646 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 647 IXGBE_NOT_IMPLEMENTED); 648} 649 650/** 651 * ixgbe_blink_led_start - Blink LEDs 652 * @hw: pointer to hardware structure 653 * @index: led number to blink 654 * 655 * Blink LED based on index. 656 **/ 657s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 658{ 659 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 660 IXGBE_NOT_IMPLEMENTED); 661} 662 663/** 664 * ixgbe_blink_led_stop - Stop blinking LEDs 665 * @hw: pointer to hardware structure 666 * 667 * Stop blinking LED based on index. 668 **/ 669s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 670{ 671 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 672 IXGBE_NOT_IMPLEMENTED); 673} 674 675/** 676 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 677 * @hw: pointer to hardware structure 678 * 679 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 680 * ixgbe_hw struct in order to set up EEPROM access. 681 **/ 682s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 683{ 684 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 685 IXGBE_NOT_IMPLEMENTED); 686} 687 688 689/** 690 * ixgbe_write_eeprom - Write word to EEPROM 691 * @hw: pointer to hardware structure 692 * @offset: offset within the EEPROM to be written to 693 * @data: 16 bit word to be written to the EEPROM 694 * 695 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 696 * called after this function, the EEPROM will most likely contain an 697 * invalid checksum. 698 **/ 699s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 700{ 701 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 702 IXGBE_NOT_IMPLEMENTED); 703} 704 705/** 706 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM 707 * @hw: pointer to hardware structure 708 * @offset: offset within the EEPROM to be written to 709 * @data: 16 bit word(s) to be written to the EEPROM 710 * @words: number of words 711 * 712 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not 713 * called after this function, the EEPROM will most likely contain an 714 * invalid checksum. 715 **/ 716s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words, 717 u16 *data) 718{ 719 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer, 720 (hw, offset, words, data), 721 IXGBE_NOT_IMPLEMENTED); 722} 723 724/** 725 * ixgbe_read_eeprom - Read word from EEPROM 726 * @hw: pointer to hardware structure 727 * @offset: offset within the EEPROM to be read 728 * @data: read 16 bit value from EEPROM 729 * 730 * Reads 16 bit value from EEPROM 731 **/ 732s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 733{ 734 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 735 IXGBE_NOT_IMPLEMENTED); 736} 737 738/** 739 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM 740 * @hw: pointer to hardware structure 741 * @offset: offset within the EEPROM to be read 742 * @data: read 16 bit word(s) from EEPROM 743 * @words: number of words 744 * 745 * Reads 16 bit word(s) from EEPROM 746 **/ 747s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 748 u16 words, u16 *data) 749{ 750 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer, 751 (hw, offset, words, data), 752 IXGBE_NOT_IMPLEMENTED); 753} 754 755/** 756 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 757 * @hw: pointer to hardware structure 758 * @checksum_val: calculated checksum 759 * 760 * Performs checksum calculation and validates the EEPROM checksum 761 **/ 762s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 763{ 764 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 765 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 766} 767 768/** 769 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 770 * @hw: pointer to hardware structure 771 **/ 772s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 773{ 774 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 775 IXGBE_NOT_IMPLEMENTED); 776} 777 778/** 779 * ixgbe_insert_mac_addr - Find a RAR for this mac address 780 * @hw: pointer to hardware structure 781 * @addr: Address to put into receive address register 782 * @vmdq: VMDq pool to assign 783 * 784 * Puts an ethernet address into a receive address register, or 785 * finds the rar that it is aleady in; adds to the pool list 786 **/ 787s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 788{ 789 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 790 (hw, addr, vmdq), 791 IXGBE_NOT_IMPLEMENTED); 792} 793 794/** 795 * ixgbe_set_rar - Set Rx address register 796 * @hw: pointer to hardware structure 797 * @index: Receive address register to write 798 * @addr: Address to put into receive address register 799 * @vmdq: VMDq "set" 800 * @enable_addr: set flag that address is active 801 * 802 * Puts an ethernet address into a receive address register. 803 **/ 804s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 805 u32 enable_addr) 806{ 807 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 808 enable_addr), IXGBE_NOT_IMPLEMENTED); 809} 810 811/** 812 * ixgbe_clear_rar - Clear Rx address register 813 * @hw: pointer to hardware structure 814 * @index: Receive address register to write 815 * 816 * Puts an ethernet address into a receive address register. 817 **/ 818s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 819{ 820 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 821 IXGBE_NOT_IMPLEMENTED); 822} 823 824/** 825 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 826 * @hw: pointer to hardware structure 827 * @rar: receive address register index to associate with VMDq index 828 * @vmdq: VMDq set or pool index 829 **/ 830s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 831{ 832 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 833 IXGBE_NOT_IMPLEMENTED); 834 835} 836 837/** 838 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address 839 * @hw: pointer to hardware structure 840 * @vmdq: VMDq default pool index 841 **/ 842s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq) 843{ 844 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac, 845 (hw, vmdq), IXGBE_NOT_IMPLEMENTED); 846} 847 848/** 849 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 850 * @hw: pointer to hardware structure 851 * @rar: receive address register index to disassociate with VMDq index 852 * @vmdq: VMDq set or pool index 853 **/ 854s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 855{ 856 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 857 IXGBE_NOT_IMPLEMENTED); 858} 859 860/** 861 * ixgbe_init_rx_addrs - Initializes receive address filters. 862 * @hw: pointer to hardware structure 863 * 864 * Places the MAC address in receive address register 0 and clears the rest 865 * of the receive address registers. Clears the multicast table. Assumes 866 * the receiver is in reset when the routine is called. 867 **/ 868s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 869{ 870 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 871 IXGBE_NOT_IMPLEMENTED); 872} 873 874/** 875 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 876 * @hw: pointer to hardware structure 877 **/ 878u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 879{ 880 return hw->mac.num_rar_entries; 881} 882 883/** 884 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 885 * @hw: pointer to hardware structure 886 * @addr_list: the list of new multicast addresses 887 * @addr_count: number of addresses 888 * @func: iterator function to walk the multicast address list 889 * 890 * The given list replaces any existing list. Clears the secondary addrs from 891 * receive address registers. Uses unused receive address registers for the 892 * first secondary addresses, and falls back to promiscuous mode as needed. 893 **/ 894s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 895 u32 addr_count, ixgbe_mc_addr_itr func) 896{ 897 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 898 addr_list, addr_count, func), 899 IXGBE_NOT_IMPLEMENTED); 900} 901 902/** 903 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 904 * @hw: pointer to hardware structure 905 * @mc_addr_list: the list of new multicast addresses 906 * @mc_addr_count: number of addresses 907 * @func: iterator function to walk the multicast address list 908 * 909 * The given list replaces any existing list. Clears the MC addrs from receive 910 * address registers and the multicast table. Uses unused receive address 911 * registers for the first multicast addresses, and hashes the rest into the 912 * multicast table. 913 **/ 914s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 915 u32 mc_addr_count, ixgbe_mc_addr_itr func, 916 bool clear) 917{ 918 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 919 mc_addr_list, mc_addr_count, func, clear), 920 IXGBE_NOT_IMPLEMENTED); 921} 922 923/** 924 * ixgbe_enable_mc - Enable multicast address in RAR 925 * @hw: pointer to hardware structure 926 * 927 * Enables multicast address in RAR and the use of the multicast hash table. 928 **/ 929s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 930{ 931 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 932 IXGBE_NOT_IMPLEMENTED); 933} 934 935/** 936 * ixgbe_disable_mc - Disable multicast address in RAR 937 * @hw: pointer to hardware structure 938 * 939 * Disables multicast address in RAR and the use of the multicast hash table. 940 **/ 941s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 942{ 943 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 944 IXGBE_NOT_IMPLEMENTED); 945} 946 947/** 948 * ixgbe_clear_vfta - Clear VLAN filter table 949 * @hw: pointer to hardware structure 950 * 951 * Clears the VLAN filer table, and the VMDq index associated with the filter 952 **/ 953s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 954{ 955 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 956 IXGBE_NOT_IMPLEMENTED); 957} 958 959/** 960 * ixgbe_set_vfta - Set VLAN filter table 961 * @hw: pointer to hardware structure 962 * @vlan: VLAN id to write to VLAN filter 963 * @vind: VMDq output index that maps queue to VLAN id in VFTA 964 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 965 * 966 * Turn on/off specified VLAN in the VLAN filter table. 967 **/ 968s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 969{ 970 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 971 vlan_on), IXGBE_NOT_IMPLEMENTED); 972} 973 974/** 975 * ixgbe_set_vlvf - Set VLAN Pool Filter 976 * @hw: pointer to hardware structure 977 * @vlan: VLAN id to write to VLAN filter 978 * @vind: VMDq output index that maps queue to VLAN id in VFVFB 979 * @vlan_on: boolean flag to turn on/off VLAN in VFVF 980 * @vfta_changed: pointer to boolean flag which indicates whether VFTA 981 * should be changed 982 * 983 * Turn on/off specified bit in VLVF table. 984 **/ 985s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, 986 bool *vfta_changed) 987{ 988 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind, 989 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED); 990} 991 992/** 993 * ixgbe_fc_enable - Enable flow control 994 * @hw: pointer to hardware structure 995 * 996 * Configures the flow control settings based on SW configuration. 997 **/ 998s32 ixgbe_fc_enable(struct ixgbe_hw *hw) 999{ 1000 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw), 1001 IXGBE_NOT_IMPLEMENTED); 1002} 1003 1004/** 1005 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW 1006 * @hw: pointer to hardware structure 1007 * @maj: driver major number to be sent to firmware 1008 * @min: driver minor number to be sent to firmware 1009 * @build: driver build number to be sent to firmware 1010 * @ver: driver version number to be sent to firmware 1011 **/ 1012s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 1013 u8 ver) 1014{ 1015 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min, 1016 build, ver), IXGBE_NOT_IMPLEMENTED); 1017} 1018 1019 1020 1021 1022/** 1023 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 1024 * @hw: pointer to hardware structure 1025 * @reg: analog register to read 1026 * @val: read value 1027 * 1028 * Performs write operation to analog register specified. 1029 **/ 1030s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 1031{ 1032 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 1033 val), IXGBE_NOT_IMPLEMENTED); 1034} 1035 1036/** 1037 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 1038 * @hw: pointer to hardware structure 1039 * @reg: analog register to write 1040 * @val: value to write 1041 * 1042 * Performs write operation to Atlas analog register specified. 1043 **/ 1044s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 1045{ 1046 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 1047 val), IXGBE_NOT_IMPLEMENTED); 1048} 1049 1050/** 1051 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 1052 * @hw: pointer to hardware structure 1053 * 1054 * Initializes the Unicast Table Arrays to zero on device load. This 1055 * is part of the Rx init addr execution path. 1056 **/ 1057s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 1058{ 1059 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 1060 IXGBE_NOT_IMPLEMENTED); 1061} 1062 1063/** 1064 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 1065 * @hw: pointer to hardware structure 1066 * @byte_offset: byte offset to read 1067 * @data: value read 1068 * 1069 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1070 **/ 1071s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1072 u8 *data) 1073{ 1074 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 1075 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1076} 1077 1078/** 1079 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 1080 * @hw: pointer to hardware structure 1081 * @byte_offset: byte offset to write 1082 * @data: value to write 1083 * 1084 * Performs byte write operation to SFP module's EEPROM over I2C interface 1085 * at a specified device address. 1086 **/ 1087s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1088 u8 data) 1089{ 1090 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 1091 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1092} 1093 1094/** 1095 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 1096 * @hw: pointer to hardware structure 1097 * @byte_offset: EEPROM byte offset to write 1098 * @eeprom_data: value to write 1099 * 1100 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1101 **/ 1102s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1103 u8 byte_offset, u8 eeprom_data) 1104{ 1105 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1106 (hw, byte_offset, eeprom_data), 1107 IXGBE_NOT_IMPLEMENTED); 1108} 1109 1110/** 1111 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1112 * @hw: pointer to hardware structure 1113 * @byte_offset: EEPROM byte offset to read 1114 * @eeprom_data: value read 1115 * 1116 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1117 **/ 1118s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1119{ 1120 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1121 (hw, byte_offset, eeprom_data), 1122 IXGBE_NOT_IMPLEMENTED); 1123} 1124 1125/** 1126 * ixgbe_get_supported_physical_layer - Returns physical layer type 1127 * @hw: pointer to hardware structure 1128 * 1129 * Determines physical layer capabilities of the current configuration. 1130 **/ 1131u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1132{ 1133 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1134 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1135} 1136 1137/** 1138 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics 1139 * @hw: pointer to hardware structure 1140 * @regval: bitfield to write to the Rx DMA register 1141 * 1142 * Enables the Rx DMA unit of the device. 1143 **/ 1144s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1145{ 1146 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1147 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1148} 1149 1150/** 1151 * ixgbe_disable_sec_rx_path - Stops the receive data path 1152 * @hw: pointer to hardware structure 1153 * 1154 * Stops the receive data path. 1155 **/ 1156s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw) 1157{ 1158 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path, 1159 (hw), IXGBE_NOT_IMPLEMENTED); 1160} 1161 1162/** 1163 * ixgbe_enable_sec_rx_path - Enables the receive data path 1164 * @hw: pointer to hardware structure 1165 * 1166 * Enables the receive data path. 1167 **/ 1168s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw) 1169{ 1170 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path, 1171 (hw), IXGBE_NOT_IMPLEMENTED); 1172} 1173 1174/** 1175 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1176 * @hw: pointer to hardware structure 1177 * @mask: Mask to specify which semaphore to acquire 1178 * 1179 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1180 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1181 **/ 1182s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1183{ 1184 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1185 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1186} 1187 1188/** 1189 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1190 * @hw: pointer to hardware structure 1191 * @mask: Mask to specify which semaphore to release 1192 * 1193 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1194 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1195 **/ 1196void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1197{ 1198 if (hw->mac.ops.release_swfw_sync) 1199 hw->mac.ops.release_swfw_sync(hw, mask); 1200} 1201 1202