if_ed.c revision 6
1/* 2 * Device driver for National Semiconductor DS8390 based ethernet 3 * adapters. By David Greenman, 29-April-1993 4 * 5 * Copyright (C) 1993, David Greenman. This software may be used, modified, 6 * copied, distributed, and sold, in both source and binary form provided 7 * that the above copyright and these terms are retained. Under no 8 * circumstances is the author responsible for the proper functioning 9 * of this software, nor does the author assume any responsibility 10 * for damages incurred with its use. 11 * 12 * Currently supports the Western Digital/SMC 8003 and 8013 series 13 * and the 3Com 3c503 14 */ 15 16/* 17 * Modification history 18 * 19 * $Log$ 20 * 21 */ 22 23#include "ed.h" 24#if NED > 0 25#include "bpfilter.h" 26 27#include "param.h" 28#include "errno.h" 29#include "ioctl.h" 30#include "mbuf.h" 31#include "socket.h" 32#include "syslog.h" 33 34#include "net/if.h" 35#include "net/if_dl.h" 36#include "net/if_types.h" 37#include "net/netisr.h" 38 39#ifdef INET 40#include "netinet/in.h" 41#include "netinet/in_systm.h" 42#include "netinet/in_var.h" 43#include "netinet/ip.h" 44#include "netinet/if_ether.h" 45#endif 46 47#ifdef NS 48#include "netns/ns.h" 49#include "netns/ns_if.h" 50#endif 51 52#if NBPFILTER > 0 53#include "net/bpf.h" 54#include "net/bpfdesc.h" 55#endif 56 57#include "i386/isa/isa.h" 58#include "i386/isa/isa_device.h" 59#include "i386/isa/icu.h" 60#include "i386/isa/if_edreg.h" 61 62#include "i386/include/pio.h" 63 64 65/* 66 * ed_softc: per line info and status 67 */ 68struct ed_softc { 69 struct arpcom arpcom; /* ethernet common */ 70 71 char *type_str; /* pointer to type string */ 72 u_char vendor; /* interface vendor */ 73 u_char type; /* interface type code */ 74 75 u_short vector; /* interrupt vector */ 76 u_short asic_addr; /* ASIC I/O bus address */ 77 u_short nic_addr; /* NIC (DS8390) I/O bus address */ 78 79 caddr_t smem_start; /* shared memory start address */ 80 caddr_t smem_end; /* shared memory end address */ 81 u_long smem_size; /* total shared memory size */ 82 caddr_t smem_ring; /* start of RX ring-buffer (in smem) */ 83 84 caddr_t bpf; /* BPF "magic cookie" */ 85 86 u_char memwidth; /* width of access to card mem 8 or 16 */ 87 u_char xmit_busy; /* transmitter is busy */ 88 u_char txb_cnt; /* Number of transmit buffers */ 89 u_char txb_next; /* Pointer to next buffer ready to xmit */ 90 u_short txb_next_len; /* next xmit buffer length */ 91 u_char data_buffered; /* data has been buffered in interface memory */ 92 u_char tx_page_start; /* first page of TX buffer area */ 93 94 u_char rec_page_start; /* first page of RX ring-buffer */ 95 u_char rec_page_stop; /* last page of RX ring-buffer */ 96 u_char next_packet; /* pointer to next unread RX packet */ 97} ed_softc[NED]; 98 99int ed_attach(), ed_init(), edintr(), ed_ioctl(), ed_probe(), 100 ed_start(), ed_reset(), ed_watchdog(); 101 102static void ed_stop(); 103 104static inline void ed_rint(); 105static inline void ed_xmit(); 106static inline char *ed_ring_copy(); 107 108extern int ether_output(); 109 110struct isa_driver eddriver = { 111 ed_probe, 112 ed_attach, 113 "ed" 114}; 115/* 116 * Interrupt conversion table for WD/SMC ASIC 117 * (IRQ* are defined in icu.h) 118 */ 119static unsigned short ed_intr_mask[] = { 120 IRQ9, 121 IRQ3, 122 IRQ5, 123 IRQ7, 124 IRQ10, 125 IRQ11, 126 IRQ15, 127 IRQ4 128}; 129 130#define ETHER_MIN_LEN 64 131#define ETHER_MAX_LEN 1518 132#define ETHER_ADDR_LEN 6 133#define ETHER_HDR_SIZE 14 134 135/* 136 * Determine if the device is present 137 * 138 * on entry: 139 * a pointer to an isa_device struct 140 * on exit: 141 * NULL if device not found 142 * or # of i/o addresses used (if found) 143 */ 144int 145ed_probe(isa_dev) 146 struct isa_device *isa_dev; 147{ 148 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 149 int i, x; 150 u_int memsize; 151 u_char iptr, memwidth, sum, tmp; 152 153 /* 154 * Setup initial i/o address for ASIC and NIC 155 */ 156 sc->asic_addr = isa_dev->id_iobase; 157 sc->vector = isa_dev->id_irq; 158 sc->smem_start = (caddr_t)isa_dev->id_maddr; 159 160 /* 161 * Attempt to do a checksum over the station address PROM. 162 * This is mapped differently on the WD80x3 and 3C503, so if 163 * it fails, it might be a 3C503. There is a problem with 164 * this, though: some clone WD boards don't pass the 165 * checksum test. Danpex boards for one. We need to do 166 * additional checking for this case. 167 */ 168 for (sum = 0, i = 0; i < 8; ++i) { 169 sum += inb(sc->asic_addr + ED_WD_PROM + i); 170 } 171 172 if (sum == ED_WD_ROM_CHECKSUM_TOTAL) { 173 goto type_WD80x3; 174 } else { 175 /* 176 * Do additional checking to make sure its a 3Com and 177 * not a broken WD clone 178 */ 179 goto type_3Com; 180 } 181 182type_WD80x3: 183 /* 184 * Looks like a WD/SMC board 185 */ 186 187 sc->vendor = ED_VENDOR_WD_SMC; 188 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID); 189 190 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET; 191 192 /* reset card to force it into a known state. */ 193 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST); 194 DELAY(100); 195 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST); 196 /* wait in the case this card is reading it's EEROM */ 197 DELAY(5000); 198 199 /* 200 * Set initial values for width/size. 201 */ 202 switch (sc->type) { 203 case ED_TYPE_WD8003S: 204 sc->type_str = "WD8003S"; 205 memsize = 8192; 206 memwidth = 8; 207 break; 208 case ED_TYPE_WD8003E: 209 sc->type_str = "WD8003E"; 210 memsize = 8192; 211 memwidth = 8; 212 break; 213 case ED_TYPE_WD8013EBT: 214 sc->type_str = "WD8013EBT"; 215 memsize = 16384; 216 memwidth = 16; 217 break; 218 case ED_TYPE_WD8013EB: /* also WD8003EP */ 219 if (inb(sc->asic_addr + ED_WD_ICR) 220 & ED_WD_ICR_16BIT) { 221 memwidth = 16; 222 memsize = 16384; 223 sc->type_str = "WD8013EB"; 224 } else { 225 sc->type_str = "WD8003EP"; 226 memsize = 8192; 227 memwidth = 8; 228 } 229 break; 230 case ED_TYPE_WD8013EBP: 231 sc->type_str = "WD8013EBP"; 232 memsize = 16384; 233 memwidth = 16; 234 break; 235 case ED_TYPE_WD8013EPC: 236 sc->type_str = "WD8013EPC"; 237 memsize = 16384; 238 memwidth = 16; 239 break; 240 default: 241 sc->type_str = "unknown"; 242 memsize = 8192; 243 memwidth = 8; 244 break; 245 } 246 /* 247 * Make some adjustments to initial values depending on what is 248 * found in the ICR. 249 */ 250 if ((memwidth==16) 251 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) { 252 memwidth = 8; 253 memsize = 8192; 254 } 255 if (inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_MSZ) { 256 memsize = 32768; 257 } 258 259#if ED_DEBUG 260 printf("type=%s width=%d memsize=%d\n",sc->type_str,memwidth,memsize); 261 for (i=0; i<8; i++) 262 printf("%x -> %x\n", i, inb(sc->asic_addr + i)); 263#endif 264 265 if (sc->type & ED_WD_SOFTCONFIG) { 266 iptr = inb(isa_dev->id_iobase + 1) & 4 | 267 ((inb(isa_dev->id_iobase+4) & 0x60) >> 5); 268 if (ed_intr_mask[iptr] != isa_dev->id_irq) { 269 printf("ed%d: kernel configured irq doesn't match board configured irq\n", 270 isa_dev->id_unit); 271 return(0); 272 } 273 outb(isa_dev->id_iobase+4, inb(isa_dev->id_iobase+4) | 0x80); 274 } 275 276 sc->memwidth = memwidth; 277 /* 278 * allocate one xmit buffer if < 16k, two buffers otherwise 279 */ 280 if (memsize < 16384) { 281 sc->smem_ring = sc->smem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 282 sc->txb_cnt = 1; 283 sc->rec_page_start = ED_TXBUF_SIZE; 284 } else { 285 sc->smem_ring = sc->smem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE * 2); 286 sc->txb_cnt = 2; 287 sc->rec_page_start = ED_TXBUF_SIZE * 2; 288 } 289 sc->smem_size = memsize; 290 sc->smem_end = sc->smem_start + memsize; 291 sc->rec_page_stop = memsize / ED_PAGE_SIZE; 292 sc->tx_page_start = ED_WD_PAGE_OFFSET; 293 294 /* 295 * Get station address from on-board ROM 296 */ 297 for (i = 0; i < ETHER_ADDR_LEN; ++i) 298 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i); 299 300 /* 301 * Set address and enable interface shared memory. 302 */ 303 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->smem_start) >> 13) & 304 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB); 305 306 /* 307 * Set upper address bits and 8/16 bit access to shared memory 308 */ 309 if (sc->type & ED_WD_SOFTCONFIG) { 310 if (memwidth == 8) { 311 outb(sc->asic_addr + ED_WD_LAAR, 312 ((kvtop(sc->smem_start) >> 19) & ED_WD_LAAR_ADDRHI)); 313 } else { 314 outb(sc->asic_addr + ED_WD_LAAR, 315 ED_WD_LAAR_L16EN | ED_WD_LAAR_M16EN | 316 ((kvtop(sc->smem_start) >> 19) & ED_WD_LAAR_ADDRHI)); 317 } 318 } 319 320 /* 321 * Now zero memory and verify that it is clear 322 */ 323 bzero(sc->smem_start, memsize); 324 325 for (i = 0; i < memsize; ++i) 326 if (sc->smem_start[i]) { 327 printf("ed%d: failed to clear shared memory at %x - check configuration\n", 328 isa_dev->id_unit, sc->smem_start + i); 329 330 /* 331 * Disable 16 bit access to shared memory 332 */ 333 if (memwidth == 16) 334 outb(sc->asic_addr + ED_WD_LAAR, 335 inb(sc->asic_addr + ED_WD_LAAR) 336 & ~ED_WD_LAAR_M16EN); 337 338 return(0); 339 } 340 341 /* 342 * Disable 16bit access to shared memory - we leave it disabled so 343 * that 1) machines reboot properly when the board is set 344 * 16 bit mode and there are conflicting 8bit devices/ROMS 345 * in the same 128k address space as this boards shared 346 * memory. and 2) so that other 8 bit devices with shared 347 * memory can be used in this 128k region, too. 348 */ 349 if (memwidth == 16) 350 outb(sc->asic_addr + ED_WD_LAAR, inb(sc->asic_addr + ED_WD_LAAR) 351 & ~ED_WD_LAAR_M16EN); 352 353 isa_dev->id_msize = memsize; 354 return (ED_WD_IO_PORTS); 355 356type_3Com: 357 /* 358 * Looks like a 3Com board 359 */ 360 361 sc->vendor = ED_VENDOR_3COM; 362 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET; 363 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET; 364 365 sc->type_str = "3c503"; 366 367 memsize = 8192; 368 369 /* 370 * Verify that the kernel configured I/O address matches the board 371 * configured address 372 */ 373 switch (sc->asic_addr + ED_3COM_BCFR) { 374 case ED_3COM_BCFR_300: 375 if (isa_dev->id_iobase != 0x300) 376 return(0); 377 break; 378 case ED_3COM_BCFR_310: 379 if (isa_dev->id_iobase != 0x310) 380 return(0); 381 break; 382 case ED_3COM_BCFR_330: 383 if (isa_dev->id_iobase != 0x330) 384 return(0); 385 break; 386 case ED_3COM_BCFR_350: 387 if (isa_dev->id_iobase != 0x350) 388 return(0); 389 break; 390 case ED_3COM_BCFR_250: 391 if (isa_dev->id_iobase != 0x250) 392 return(0); 393 break; 394 case ED_3COM_BCFR_280: 395 if (isa_dev->id_iobase != 0x280) 396 return(0); 397 break; 398 case ED_3COM_BCFR_2A0: 399 if (isa_dev->id_iobase != 0x2a0) 400 return(0); 401 break; 402 case ED_3COM_BCFR_2E0: 403 if (isa_dev->id_iobase != 0x2e0) 404 return(0); 405 break; 406 } 407 408 /* 409 * Verify that the kernel shared memory address matches the 410 * board configured address. 411 */ 412 switch (sc->asic_addr + ED_3COM_PCFR) { 413 case ED_3COM_PCFR_DC000: 414 if (kvtop(isa_dev->id_maddr) != ED_3COM_PCFR_DC000) 415 return(0); 416 break; 417 case ED_3COM_PCFR_D8000: 418 if (kvtop(isa_dev->id_maddr) != ED_3COM_PCFR_D8000) 419 return(0); 420 break; 421 case ED_3COM_PCFR_CC000: 422 if (kvtop(isa_dev->id_maddr) != ED_3COM_PCFR_CC000) 423 return(0); 424 break; 425 case ED_3COM_PCFR_C8000: 426 if (kvtop(isa_dev->id_maddr) != ED_3COM_PCFR_C8000) 427 return(0); 428 break; 429 } 430 431 /* 432 * Reset NIC and ASIC 433 */ 434 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST); 435 /* 436 * Verify that reset bit was set 437 */ 438 if ((inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST) == 0) 439 return (0); 440 /* 441 * Wait for a while, then un-reset it 442 */ 443 DELAY(5000); 444 outb(sc->asic_addr + ED_3COM_CR, 0); 445 446 /* 447 * Verify that the bit cleared 448 */ 449 if (inb(sc->asic_addr + ED_3COM_CR) & ED_3COM_CR_RST) 450 return (0); 451 452 /* 453 * Wait a bit for the NIC to recover from the reset 454 */ 455 DELAY(5000); 456 457 /* 458 * Determine if this is an 8bit or 16bit board 459 */ 460 /* XXX - either this code is broken...or the hardware is... */ 461 /* it always comes up 8bit */ 462 /* 463 * select page 0 registers 464 */ 465 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 466 /* 467 * Attempt to clear WTS bit. If it doesn't clear, then this is a 468 * 16bit board. 469 */ 470 outb(sc->nic_addr + ED_P0_DCR, 0); 471 /* 472 * select page 2 registers 473 */ 474 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2|ED_CR_RD2|ED_CR_STP); 475 /* 476 * The 3c503 forces the WTS bit to a one if this is a 16bit board 477 */ 478 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS) 479 memwidth = 16; 480 else 481 memwidth = 8; 482 483#if 0 484printf(" (%dbit)",memwidth); 485#endif 486 /* 487 * select page 0 registers 488 */ 489 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 490 491 sc->txb_cnt = 1; 492 493 sc->tx_page_start = ED_3COM_PAGE_OFFSET; 494 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_PAGE_OFFSET; 495 sc->rec_page_stop = memsize / ED_PAGE_SIZE + ED_3COM_PAGE_OFFSET; 496 497 sc->smem_size = memsize; 498 sc->smem_end = sc->smem_start + memsize; 499 sc->smem_ring = sc->smem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE); 500 501 sc->memwidth = memwidth; 502 503 /* 504 * Initialize GA page start/stop registers. Probably only needed 505 * if doing DMA, but what the hell. 506 */ 507 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start); 508 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop); 509 510 /* 511 * Set IRQ. 3c503 only allows a choice of irq 2-5. 512 */ 513 switch (isa_dev->id_irq) { 514 case IRQ2: 515 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2); 516 break; 517 case IRQ3: 518 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3); 519 break; 520 case IRQ4: 521 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4); 522 break; 523 case IRQ5: 524 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5); 525 break; 526 default: 527 printf("ed0: Invalid irq configuration\n"); 528 return(0); 529 } 530 531 /* 532 * Initialize GA configuration register. Set bank and enable smem. 533 */ 534 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL | 535 ED_3COM_GACFR_MBS0); 536 537 /* 538 * Initialize "Vector Pointer" registers. These gawd-awful things 539 * are compared to 20 bits of the address on ISA, and if they 540 * match, the shared memory is disabled. We set them to 541 * 0xffff0...allegedly the reset vector. 542 */ 543 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff); 544 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff); 545 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00); 546 547 /* 548 * Get station address from on-board ROM 549 */ 550 /* 551 * First, map ethernet address PROM over the top of where the NIC 552 * registers normally appear. 553 */ 554 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO); 555 556 for (i = 0; i < ETHER_ADDR_LEN; ++i) 557 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i); 558 559 /* 560 * Unmap PROM - select NIC registers 561 */ 562 outb(sc->asic_addr + ED_3COM_CR, 0); 563 564 /* 565 * Zero memory and verify that it is clear 566 */ 567#if 0 568{ char test_buf[1024]; 569printf("starting write\n"); 570 for (i = 0; i < 8*8192; ++i) 571 bcopy(test_buf, sc->smem_start, 1024); 572printf("starting read\n"); 573 for (i = 0; i < 8*8192; ++i) 574 bcopy(sc->smem_start, test_buf, 1024); 575printf("done.\n"); 576} 577#endif 578 579 bzero(sc->smem_start, memsize); 580 581 for (i = 0; i < memsize; ++i) 582 if (sc->smem_start[i]) { 583 printf("ed%d: failed to clear shared memory at %x - check configuration\n", 584 isa_dev->id_unit, sc->smem_start + i); 585 return(0); 586 } 587 588 isa_dev->id_msize = memsize; 589 return(ED_3COM_IO_PORTS); 590} 591 592/* 593 * Install interface into kernel networking data structures 594 */ 595int 596ed_attach(isa_dev) 597 struct isa_device *isa_dev; 598{ 599 struct ed_softc *sc = &ed_softc[isa_dev->id_unit]; 600 struct ifnet *ifp = &sc->arpcom.ac_if; 601 struct ifaddr *ifa; 602 struct sockaddr_dl *sdl; 603 604 /* 605 * Set interface to stopped condition (reset) 606 */ 607 ed_stop(isa_dev->id_unit); 608 609 /* 610 * Initialize ifnet structure 611 */ 612 ifp->if_unit = isa_dev->id_unit; 613 ifp->if_name = "ed" ; 614 ifp->if_mtu = ETHERMTU; 615 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS ; 616 ifp->if_init = ed_init; 617 ifp->if_output = ether_output; 618 ifp->if_start = ed_start; 619 ifp->if_ioctl = ed_ioctl; 620 ifp->if_reset = ed_reset; 621 ifp->if_watchdog = ed_watchdog; 622 623 if_attach(ifp); 624 625#if NBPFILTER > 0 626 bpfattach(&sc->bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 627#endif 628 629 /* 630 * Search down the ifa address list looking for the AF_LINK type entry 631 */ 632 ifa = ifp->if_addrlist; 633 while ((ifa != 0) && (ifa->ifa_addr != 0) && 634 (ifa->ifa_addr->sa_family != AF_LINK)) 635 ifa = ifa->ifa_next; 636 637 /* 638 * If we find an AF_LINK type entry, we well fill in the hardware addr 639 */ 640 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 641 /* 642 * Fill in the link level address for this interface 643 */ 644 sdl = (struct sockaddr_dl *)ifa->ifa_addr; 645 sdl->sdl_type = IFT_ETHER; 646 sdl->sdl_alen = ETHER_ADDR_LEN; 647 sdl->sdl_slen = 0; 648 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 649 } 650 651 /* 652 * Print additional info when attached 653 */ 654 printf(" enet %s type %s", ether_sprintf(sc->arpcom.ac_enaddr), 655 sc->type_str); 656} 657 658/* 659 * Reset interface. 660 */ 661int 662ed_reset(unit, uban) 663 int unit; 664{ 665 int s; 666 667 s = splnet(); 668 669 /* 670 * Stop interface and re-initialize. 671 */ 672 ed_stop(unit); 673 ed_init(unit); 674 675 s = splx(s); 676} 677 678/* 679 * Take interface offline. 680 */ 681void 682ed_stop(unit) 683 int unit; 684{ 685 struct ed_softc *sc = &ed_softc[unit]; 686 int n = 5000; 687 688 /* 689 * Stop everything on the interface, and select page 0 registers. 690 */ 691 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 692 693 /* 694 * Wait for interface to enter stopped state, but limit # of checks 695 * to 'n' (about 5ms). It shouldn't even take 5us on modern 696 * DS8390's, but just in case it's an old one. 697 */ 698 while ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) { 699 if (--n == 0) 700 break; 701 } 702} 703 704int 705ed_watchdog(unit) 706 int unit; 707{ 708 log(LOG_ERR, "ed%d: device timeout\n", unit); 709 710 ed_reset(unit); 711} 712 713/* 714 * Initialize device. 715 */ 716ed_init(unit) 717 int unit; 718{ 719 struct ed_softc *sc = &ed_softc[unit]; 720 struct ifnet *ifp = &sc->arpcom.ac_if; 721 int i, s; 722 u_char command; 723 724 725 /* address not known */ 726 if (ifp->if_addrlist == (struct ifaddr *)0) return; 727 728 /* 729 * Initialize the NIC in the exact order outlined in the NS manual. 730 * This init procedure is "mandatory"...don't change what or when 731 * things happen. 732 */ 733 s = splnet(); 734 735 /* reset transmitter flags */ 736 sc->data_buffered = 0; 737 sc->xmit_busy = 0; 738 sc->arpcom.ac_if.if_timer = 0; 739 740 sc->txb_next = 0; 741 742 /* This variable is used below - don't move this assignment */ 743 sc->next_packet = sc->rec_page_start + 1; 744 745 /* 746 * Set interface for page 0, Remote DMA complete, Stopped 747 */ 748 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STP); 749 750 if (sc->memwidth == 16) { 751 /* 752 * Set FIFO threshold to 8, No auto-init Remote DMA, 753 * byte order=80x86, word-wide DMA xfers 754 */ 755 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1|ED_DCR_WTS); 756 } else { 757 /* 758 * Same as above, but byte-wide DMA xfers 759 */ 760 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1); 761 } 762 763 /* 764 * Clear Remote Byte Count Registers 765 */ 766 outb(sc->nic_addr + ED_P0_RBCR0, 0); 767 outb(sc->nic_addr + ED_P0_RBCR1, 0); 768 769 /* 770 * Enable reception of broadcast packets 771 */ 772 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 773 774 /* 775 * Place NIC in internal loopback mode 776 */ 777 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0); 778 779 /* 780 * Initialize transmit/receive (ring-buffer) Page Start 781 */ 782 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start); 783 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start); 784 785 /* 786 * Initialize Receiver (ring-buffer) Page Stop and Boundry 787 */ 788 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop); 789 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start); 790 791 /* 792 * Clear all interrupts. A '1' in each bit position clears the 793 * corresponding flag. 794 */ 795 outb(sc->nic_addr + ED_P0_ISR, 0xff); 796 797 /* 798 * Enable the following interrupts: receive/transmit complete, 799 * receive/transmit error, and Receiver OverWrite. 800 * 801 * Counter overflow and Remote DMA complete are *not* enabled. 802 */ 803 outb(sc->nic_addr + ED_P0_IMR, 804 ED_IMR_PRXE|ED_IMR_PTXE|ED_IMR_RXEE|ED_IMR_TXEE|ED_IMR_OVWE); 805 806 /* 807 * Program Command Register for page 1 808 */ 809 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STP); 810 811 /* 812 * Copy out our station address 813 */ 814 for (i = 0; i < ETHER_ADDR_LEN; ++i) 815 outb(sc->nic_addr + ED_P1_PAR0 + i, sc->arpcom.ac_enaddr[i]); 816 817#if NBPFILTER > 0 818 /* 819 * Initialize multicast address hashing registers to accept 820 * all multicasts (only used when in promiscuous mode) 821 */ 822 for (i = 0; i < 8; ++i) 823 outb(sc->nic_addr + ED_P1_MAR0 + i, 0xff); 824#endif 825 826 /* 827 * Set Current Page pointer to next_packet (initialized above) 828 */ 829 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet); 830 831 /* 832 * Set Command Register for page 0, Remote DMA complete, 833 * and interface Start. 834 */ 835 outb(sc->nic_addr + ED_P1_CR, ED_CR_RD2|ED_CR_STA); 836 837 /* 838 * Take interface out of loopback 839 */ 840 outb(sc->nic_addr + ED_P0_TCR, 0); 841 842 /* 843 * Set 'running' flag, and clear output active flag. 844 */ 845 ifp->if_flags |= IFF_RUNNING; 846 ifp->if_flags &= ~IFF_OACTIVE; 847 848 /* 849 * ...and attempt to start output 850 */ 851 ed_start(ifp); 852 853 (void) splx(s); 854} 855 856static inline void ed_xmit(ifp) 857 struct ifnet *ifp; 858{ 859 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 860 u_short len = sc->txb_next_len; 861 862 /* 863 * Set NIC for page 0 register access 864 */ 865 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 866 867 /* 868 * Set TX buffer start page 869 */ 870 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start + 871 sc->txb_next * ED_TXBUF_SIZE); 872 873 /* 874 * Set TX length 875 */ 876 outb(sc->nic_addr + ED_P0_TBCR0, len & 0xff); 877 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8); 878 879 /* 880 * Set page 0, Remote DMA complete, Transmit Packet, and Start 881 */ 882 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_TXP|ED_CR_STA); 883 884 sc->xmit_busy = 1; 885 sc->data_buffered = 0; 886 887 if ((sc->txb_next == 0) && (sc->txb_cnt > 1)) 888 sc->txb_next = 1; 889 else 890 sc->txb_next = 0; 891 892 /* 893 * Set a timer just in case we never hear from the board again 894 */ 895 ifp->if_timer = 2; 896} 897 898/* 899 * Start output on interface. 900 * We make two assumptions here: 901 * 1) that the current priority is set to splnet _before_ this code 902 * is called *and* is returned to the appropriate priority after 903 * return 904 * 2) that the IFF_OACTIVE flag is checked before this code is called 905 * (i.e. that the output part of the interface is idle) 906 */ 907int 908ed_start(ifp) 909 struct ifnet *ifp; 910{ 911 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 912 struct mbuf *m0, *m; 913 caddr_t buffer; 914 int len; 915 u_char laar_tmp; 916 917outloop: 918 if (sc->data_buffered) 919 if (sc->xmit_busy) { 920 ifp->if_flags |= IFF_OACTIVE; 921 return; 922 } else { 923 /* 924 * Note that ed_xmit() resets the data_buffered flag 925 * before returning 926 */ 927 ed_xmit(ifp); 928 } 929 930 IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m); 931 if (m == 0) { 932 /* 933 * The following isn't pretty; we are using the !OACTIVE flag to 934 * indicate to the outside world that we can accept an additional 935 * packet rather than that the transmitter is _actually_ 936 * active. Indeed, the transmitter may be active, but if we haven't 937 * filled the secondary buffer with data then we still want to 938 * accept more. 939 * Note that it isn't necessary to test the data_buffered flag - 940 * we wouldn't have tried to de-queue the packet in the first place 941 * if it was set. 942 */ 943 ifp->if_flags &= ~IFF_OACTIVE; 944 return; 945 } 946 947 /* 948 * Copy the mbuf chain into the transmit buffer 949 */ 950 /* 951 * Enable 16bit access to shared memory on WD/SMC boards 952 */ 953 if (sc->memwidth == 16) 954 if (sc->vendor == ED_VENDOR_WD_SMC) { 955 laar_tmp = inb(sc->asic_addr + ED_WD_LAAR); 956 outb(sc->asic_addr + ED_WD_LAAR, laar_tmp | ED_WD_LAAR_M16EN); 957 } 958 959 buffer = sc->smem_start + (sc->txb_next * ED_TXBUF_SIZE * ED_PAGE_SIZE); 960 len = 0; 961 for (m0 = m; m != 0; m = m->m_next) { 962 bcopy(mtod(m, caddr_t), buffer, m->m_len); 963 buffer += m->m_len; 964 len += m->m_len; 965 } 966 967 /* 968 * Restore previous shared mem access type 969 */ 970 if (sc->memwidth == 16) 971 if (sc->vendor == ED_VENDOR_WD_SMC) { 972 outb(sc->asic_addr + ED_WD_LAAR, laar_tmp); 973 } 974 975 sc->txb_next_len = MAX(len, ETHER_MIN_LEN); 976 977 if (sc->txb_cnt > 1) 978 /* 979 * only set 'buffered' flag if doing multiple buffers 980 */ 981 sc->data_buffered = 1; 982 983 if (sc->xmit_busy == 0) 984 ed_xmit(ifp); 985 /* 986 * If there is BPF support in the configuration, tap off here. 987 * The following has support for converting trailer packets 988 * back to normal. 989 */ 990#if NBPFILTER > 0 991 if (sc->bpf) { 992 u_short etype; 993 int off, datasize, resid; 994 struct ether_header *eh; 995 struct trailer_header { 996 u_short ether_type; 997 u_short ether_residual; 998 } trailer_header; 999 char ether_packet[ETHER_MAX_LEN]; 1000 char *ep; 1001 1002 ep = ether_packet; 1003 1004 /* 1005 * We handle trailers below: 1006 * Copy ether header first, then residual data, 1007 * then data. Put all this in a temporary buffer 1008 * 'ether_packet' and send off to bpf. Since the 1009 * system has generated this packet, we assume 1010 * that all of the offsets in the packet are 1011 * correct; if they're not, the system will almost 1012 * certainly crash in m_copydata. 1013 * We make no assumptions about how the data is 1014 * arranged in the mbuf chain (i.e. how much 1015 * data is in each mbuf, if mbuf clusters are 1016 * used, etc.), which is why we use m_copydata 1017 * to get the ether header rather than assume 1018 * that this is located in the first mbuf. 1019 */ 1020 /* copy ether header */ 1021 m_copydata(m0, 0, sizeof(struct ether_header), ep); 1022 eh = (struct ether_header *) ep; 1023 ep += sizeof(struct ether_header); 1024 etype = ntohs(eh->ether_type); 1025 if (etype >= ETHERTYPE_TRAIL && 1026 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 1027 datasize = ((etype - ETHERTYPE_TRAIL) << 9); 1028 off = datasize + sizeof(struct ether_header); 1029 1030 /* copy trailer_header into a data structure */ 1031 m_copydata(m0, off, sizeof(struct trailer_header), 1032 &trailer_header.ether_type); 1033 1034 /* copy residual data */ 1035 m_copydata(m0, off+sizeof(struct trailer_header), 1036 resid = ntohs(trailer_header.ether_residual) - 1037 sizeof(struct trailer_header), ep); 1038 ep += resid; 1039 1040 /* copy data */ 1041 m_copydata(m0, sizeof(struct ether_header), 1042 datasize, ep); 1043 ep += datasize; 1044 1045 /* restore original ether packet type */ 1046 eh->ether_type = trailer_header.ether_type; 1047 1048 bpf_tap(sc->bpf, ether_packet, ep - ether_packet); 1049 } else 1050 bpf_mtap(sc->bpf, m0); 1051 } 1052#endif 1053 1054 m_freem(m0); 1055 1056 if (sc->txb_cnt > 1) 1057 goto outloop; 1058 else { 1059 ifp->if_flags |= IFF_OACTIVE; 1060 return; 1061 } 1062} 1063 1064/* 1065 * Ethernet interface receiver interrupt. 1066 */ 1067static inline void /* only called from one place, so may as well integrate */ 1068ed_rint(unit) 1069 int unit; 1070{ 1071 register struct ed_softc *sc = &ed_softc[unit]; 1072 u_char boundry, current; 1073 u_short len; 1074 struct ed_ring *packet_ptr; 1075 1076 /* 1077 * Set NIC to page 1 registers to get 'current' pointer 1078 */ 1079 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); 1080 1081 /* 1082 * 'sc->next_packet' is the logical beginning of the ring-buffer - i.e. 1083 * it points to where new data has been buffered. The 'CURR' 1084 * (current) register points to the logical end of the ring-buffer 1085 * - i.e. it points to where additional new data will be added. 1086 * We loop here until the logical beginning equals the logical 1087 * end (or in other words, until the ring-buffer is empty). 1088 */ 1089 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) { 1090 1091 /* get pointer to this buffer header structure */ 1092 packet_ptr = (struct ed_ring *)(sc->smem_ring + 1093 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE); 1094 1095 /* 1096 * The byte count includes the FCS - Frame Check Sequence (a 1097 * 32 bit CRC). 1098 */ 1099 len = packet_ptr->count; 1100 if ((len >= ETHER_MIN_LEN) && (len <= ETHER_MAX_LEN)) { 1101 /* 1102 * Go get packet. len - 4 removes CRC from length. 1103 * (packet_ptr + 1) points to data just after the packet ring 1104 * header (+4 bytes) 1105 */ 1106 ed_get_packet(sc, (caddr_t)(packet_ptr + 1), len - 4); 1107 ++sc->arpcom.ac_if.if_ipackets; 1108 } else { 1109 /* 1110 * Really BAD...probably indicates that the ring pointers 1111 * are corrupted. Also seen on early rev chips under 1112 * high load - the byte order of the length gets switched. 1113 */ 1114 log(LOG_ERR, 1115 "ed%d: shared memory corrupt - invalid packet length %d\n", 1116 unit, len); 1117 ed_reset(unit); 1118 return; 1119 } 1120 1121 /* 1122 * Update next packet pointer 1123 */ 1124 sc->next_packet = packet_ptr->next_packet; 1125 1126 /* 1127 * Update NIC boundry pointer - being careful to keep it 1128 * one buffer behind. (as recommended by NS databook) 1129 */ 1130 boundry = sc->next_packet - 1; 1131 if (boundry < sc->rec_page_start) 1132 boundry = sc->rec_page_stop - 1; 1133 1134 /* 1135 * Set NIC to page 0 registers to update boundry register 1136 */ 1137 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1138 1139 outb(sc->nic_addr + ED_P0_BNRY, boundry); 1140 1141 /* 1142 * Set NIC to page 1 registers before looping to top (prepare to 1143 * get 'CURR' current pointer) 1144 */ 1145 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_1|ED_CR_RD2|ED_CR_STA); 1146 } 1147} 1148 1149/* 1150 * Ethernet interface interrupt processor 1151 */ 1152int 1153edintr(unit) 1154 int unit; 1155{ 1156 struct ed_softc *sc = &ed_softc[unit]; 1157 u_char isr; 1158 1159 /* 1160 * Set NIC to page 0 registers 1161 */ 1162 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1163 1164 /* 1165 * loop until there are no more new interrupts 1166 */ 1167 while (isr = inb(sc->nic_addr + ED_P0_ISR)) { 1168 1169 /* 1170 * reset all the bits that we are 'acknowleging' 1171 * by writing a '1' to each bit position that was set 1172 * (writing a '1' *clears* the bit) 1173 */ 1174 outb(sc->nic_addr + ED_P0_ISR, isr); 1175 1176 /* 1177 * Transmit error. If a TX completed with an error, we end up 1178 * throwing the packet away. Really the only error that is 1179 * possible is excessive collisions, and in this case it is 1180 * best to allow the automatic mechanisms of TCP to backoff 1181 * the flow. Of course, with UDP we're screwed, but this is 1182 * expected when a network is heavily loaded. 1183 */ 1184 if (isr & ED_ISR_TXE) { 1185 u_char tsr = inb(sc->nic_addr + ED_P0_TSR); 1186 u_char ncr = inb(sc->nic_addr + ED_P0_NCR); 1187 1188 /* 1189 * Excessive collisions (16) 1190 */ 1191 if ((tsr & ED_TSR_ABT) && (ncr == 0)) { 1192 /* 1193 * When collisions total 16, the P0_NCR will 1194 * indicate 0, and the TSR_ABT is set. 1195 */ 1196 sc->arpcom.ac_if.if_collisions += 16; 1197 } else 1198 sc->arpcom.ac_if.if_collisions += ncr; 1199 1200 /* 1201 * update output errors counter 1202 */ 1203 ++sc->arpcom.ac_if.if_oerrors; 1204 1205 /* 1206 * reset tx busy and output active flags 1207 */ 1208 sc->xmit_busy = 0; 1209 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 1210 1211 /* 1212 * reset watchdog timer 1213 */ 1214 sc->arpcom.ac_if.if_timer = 0; 1215 } 1216 1217 1218 /* 1219 * Receiver Error. One or more of: CRC error, frame alignment error 1220 * FIFO overrun, or missed packet. 1221 */ 1222 if (isr & ED_ISR_RXE) { 1223 ++sc->arpcom.ac_if.if_ierrors; 1224 } 1225 1226 /* 1227 * Overwrite warning. In order to make sure that a lockup 1228 * of the local DMA hasn't occurred, we reset and 1229 * re-init the NIC. The NSC manual suggests only a 1230 * partial reset/re-init is necessary - but some 1231 * chips seem to want more. The DMA lockup has been 1232 * seen only with early rev chips - Methinks this 1233 * bug was fixed in later revs. -DG 1234 */ 1235 if (isr & ED_ISR_OVW) { 1236 ++sc->arpcom.ac_if.if_ierrors; 1237 log(LOG_WARNING, 1238 "ed%d: warning - receiver ring buffer overrun\n", 1239 unit); 1240 /* 1241 * Stop/reset/re-init NIC 1242 */ 1243 ed_reset(unit); 1244 } 1245 1246 /* 1247 * Transmission completed normally. 1248 */ 1249 if (isr & ED_ISR_PTX) { 1250 1251 /* 1252 * reset tx busy and output active flags 1253 */ 1254 sc->xmit_busy = 0; 1255 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 1256 1257 /* 1258 * reset watchdog timer 1259 */ 1260 sc->arpcom.ac_if.if_timer = 0; 1261 1262 /* 1263 * Update total number of successfully transmitted 1264 * packets. 1265 */ 1266 ++sc->arpcom.ac_if.if_opackets; 1267 1268 /* 1269 * Add in total number of collisions on last 1270 * transmission. 1271 */ 1272 sc->arpcom.ac_if.if_collisions += inb(sc->nic_addr + 1273 ED_P0_TBCR0); 1274 } 1275 1276 /* 1277 * Receive Completion. Go and get the packet. 1278 * XXX - Doing this on an error is dubious because there 1279 * shouldn't be any data to get (we've configured the 1280 * interface to not accept packets with errors). 1281 */ 1282 if (isr & (ED_ISR_PRX|ED_ISR_RXE)) { 1283 /* 1284 * Enable access to shared memory on WD/SMC boards 1285 */ 1286 if (sc->memwidth == 16) 1287 if (sc->vendor == ED_VENDOR_WD_SMC) { 1288 outb(sc->asic_addr + ED_WD_LAAR, 1289 inb(sc->asic_addr + ED_WD_LAAR) 1290 | ED_WD_LAAR_M16EN); 1291 } 1292 1293 ed_rint (unit); 1294 1295 /* 1296 * Disable access to shared memory 1297 */ 1298 if (sc->memwidth == 16) 1299 if (sc->vendor == ED_VENDOR_WD_SMC) { 1300 outb(sc->asic_addr + ED_WD_LAAR, 1301 inb(sc->asic_addr + ED_WD_LAAR) 1302 & ~ED_WD_LAAR_M16EN); 1303 } 1304 } 1305 1306 /* 1307 * If it looks like the transmitter can take more data, 1308 * attempt to start output on the interface. If data is 1309 * already buffered and ready to go, send it first. 1310 */ 1311 if ((sc->arpcom.ac_if.if_flags & IFF_OACTIVE) == 0) { 1312 if (sc->data_buffered) 1313 ed_xmit(&sc->arpcom.ac_if); 1314 ed_start(&sc->arpcom.ac_if); 1315 } 1316 1317 /* 1318 * return NIC CR to standard state before looping back 1319 * to top: page 0, remote DMA complete, start 1320 * (toggling the TXP bit off, even if was just set in the 1321 * transmit routine, is *okay* - it is 'edge' triggered 1322 * from low to high) 1323 */ 1324 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2|ED_CR_STA); 1325 } 1326} 1327 1328/* 1329 * Process an ioctl request. This code needs some work - it looks 1330 * pretty ugly. 1331 */ 1332int 1333ed_ioctl(ifp, command, data) 1334 register struct ifnet *ifp; 1335 int command; 1336 caddr_t data; 1337{ 1338 register struct ifaddr *ifa = (struct ifaddr *)data; 1339 struct ed_softc *sc = &ed_softc[ifp->if_unit]; 1340 struct ifreq *ifr = (struct ifreq *)data; 1341 int s, error = 0; 1342 1343 s = splnet(); 1344 1345 switch (command) { 1346 1347 case SIOCSIFADDR: 1348 ifp->if_flags |= IFF_UP; 1349 1350 switch (ifa->ifa_addr->sa_family) { 1351#ifdef INET 1352 case AF_INET: 1353 ed_init(ifp->if_unit); /* before arpwhohas */ 1354 /* 1355 * See if another station has *our* IP address. 1356 * i.e.: There is an address conflict! If a 1357 * conflict exists, a message is sent to the 1358 * console. 1359 */ 1360 ((struct arpcom *)ifp)->ac_ipaddr = 1361 IA_SIN(ifa)->sin_addr; 1362 arpwhohas((struct arpcom *)ifp, &IA_SIN(ifa)->sin_addr); 1363 break; 1364#endif 1365#ifdef NS 1366 /* 1367 * XXX - This code is probably wrong 1368 */ 1369 case AF_NS: 1370 { 1371 register struct ns_addr *ina = &(IA_SNS(ifa)->sns_addr); 1372 1373 if (ns_nullhost(*ina)) 1374 ina->x_host = 1375 *(union ns_host *)(sc->arpcom.ac_enaddr); 1376 else { 1377 /* 1378 * 1379 */ 1380 bcopy((caddr_t)ina->x_host.c_host, 1381 (caddr_t)sc->arpcom.ac_enaddr, 1382 sizeof(sc->arpcom.ac_enaddr)); 1383 } 1384 /* 1385 * Set new address 1386 */ 1387 ed_init(ifp->if_unit); 1388 break; 1389 } 1390#endif 1391 default: 1392 ed_init(ifp->if_unit); 1393 break; 1394 } 1395 break; 1396 1397 case SIOCSIFFLAGS: 1398 /* 1399 * If interface is marked down and it is running, then stop it 1400 */ 1401 if (((ifp->if_flags & IFF_UP) == 0) && 1402 (ifp->if_flags & IFF_RUNNING)) { 1403 ed_stop(ifp->if_unit); 1404 ifp->if_flags &= ~IFF_RUNNING; 1405 } else { 1406 /* 1407 * If interface is marked up and it is stopped, then start it 1408 */ 1409 if ((ifp->if_flags & IFF_UP) && 1410 ((ifp->if_flags & IFF_RUNNING) == 0)) 1411 ed_init(ifp->if_unit); 1412 } 1413#if NBPFILTER > 0 1414 if (ifp->if_flags & IFF_PROMISC) { 1415 /* 1416 * Set promiscuous mode on interface. 1417 * XXX - for multicasts to work, we would need to 1418 * write 1's in all bits of multicast 1419 * hashing array. For now we assume that 1420 * this was done in ed_init(). 1421 */ 1422 outb(sc->nic_addr + ED_P0_RCR, 1423 ED_RCR_PRO|ED_RCR_AM|ED_RCR_AB); 1424 } else 1425 /* 1426 * XXX - for multicasts to work, we would need to 1427 * rewrite the multicast hashing array with the 1428 * proper hash (would have been destroyed above). 1429 */ 1430 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB); 1431#endif 1432 break; 1433 1434 default: 1435 error = EINVAL; 1436 } 1437 (void) splx(s); 1438 return (error); 1439} 1440 1441/* 1442 * Macro to calculate a new address within shared memory when given an offset 1443 * from an address, taking into account ring-wrap. 1444 */ 1445#define ringoffset(sc, start, off, type) \ 1446 ((type)( ((caddr_t)(start)+(off) >= (sc)->smem_end) ? \ 1447 (((caddr_t)(start)+(off))) - (sc)->smem_end \ 1448 + (sc)->smem_ring: \ 1449 ((caddr_t)(start)+(off)) )) 1450 1451/* 1452 * Retreive packet from shared memory and send to the next level up via 1453 * ether_input(). If there is a BPF listener, give a copy to BPF, too. 1454 */ 1455ed_get_packet(sc, buf, len) 1456 struct ed_softc *sc; 1457 char *buf; 1458 u_short len; 1459{ 1460 struct ether_header *eh; 1461 struct mbuf *m, *head, *ed_ring_to_mbuf(); 1462 u_short off; 1463 int resid; 1464 u_short etype; 1465 struct trailer_header { 1466 u_short trail_type; 1467 u_short trail_residual; 1468 } trailer_header; 1469 1470 /* Allocate a header mbuf */ 1471 MGETHDR(m, M_DONTWAIT, MT_DATA); 1472 if (m == 0) 1473 goto bad; 1474 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 1475 m->m_pkthdr.len = len; 1476 m->m_len = 0; 1477 head = m; 1478 1479 eh = (struct ether_header *)buf; 1480 1481 /* The following sillines is to make NFS happy */ 1482#define EROUND ((sizeof(struct ether_header) + 3) & ~3) 1483#define EOFF (EROUND - sizeof(struct ether_header)) 1484 1485 /* 1486 * The following assumes there is room for 1487 * the ether header in the header mbuf 1488 */ 1489 head->m_data += EOFF; 1490 bcopy(buf, mtod(head, caddr_t), sizeof(struct ether_header)); 1491 buf += sizeof(struct ether_header); 1492 head->m_len += sizeof(struct ether_header); 1493 len -= sizeof(struct ether_header); 1494 1495 etype = ntohs((u_short)eh->ether_type); 1496 1497 /* 1498 * Deal with trailer protocol: 1499 * If trailer protocol, calculate the datasize as 'off', 1500 * which is also the offset to the trailer header. 1501 * Set resid to the amount of packet data following the 1502 * trailer header. 1503 * Finally, copy residual data into mbuf chain. 1504 */ 1505 if (etype >= ETHERTYPE_TRAIL && 1506 etype < ETHERTYPE_TRAIL+ETHERTYPE_NTRAILER) { 1507 1508 off = (etype - ETHERTYPE_TRAIL) << 9; 1509 if ((off + sizeof(struct trailer_header)) > len) 1510 goto bad; /* insanity */ 1511 1512 eh->ether_type = *ringoffset(sc, buf, off, u_short *); 1513 resid = ntohs(*ringoffset(sc, buf, off+2, u_short *)); 1514 1515 if ((off + resid) > len) goto bad; /* insanity */ 1516 1517 resid -= sizeof(struct trailer_header); 1518 if (resid < 0) goto bad; /* insanity */ 1519 1520 m = ed_ring_to_mbuf(sc, ringoffset(sc, buf, off+4, char *), head, resid); 1521 if (m == 0) goto bad; 1522 1523 len = off; 1524 head->m_pkthdr.len -= 4; /* subtract trailer header */ 1525 } 1526 1527 /* 1528 * Pull packet off interface. Or if this was a trailer packet, 1529 * the data portion is appended. 1530 */ 1531 m = ed_ring_to_mbuf(sc, buf, m, len); 1532 if (m == 0) goto bad; 1533 1534#if NBPFILTER > 0 1535 /* 1536 * Check if there's a BPF listener on this interface. 1537 * If so, hand off the raw packet to bpf. 1538 */ 1539 if (sc->bpf) { 1540 bpf_mtap(sc->bpf, head); 1541 1542 /* 1543 * Note that the interface cannot be in promiscuous mode if 1544 * there are no BPF listeners. And if we are in promiscuous 1545 * mode, we have to check if this packet is really ours. 1546 * 1547 * XXX This test does not support multicasts. 1548 */ 1549 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) && 1550 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, 1551 sizeof(eh->ether_dhost)) != 0 && 1552 bcmp(eh->ether_dhost, etherbroadcastaddr, 1553 sizeof(eh->ether_dhost)) != 0) { 1554 1555 m_freem(head); 1556 return; 1557 } 1558 } 1559#endif 1560 1561 /* 1562 * Fix up data start offset in mbuf to point past ether header 1563 */ 1564 m_adj(head, sizeof(struct ether_header)); 1565 1566 /* 1567 * silly ether_input routine needs 'type' in host byte order 1568 */ 1569 eh->ether_type = ntohs(eh->ether_type); 1570 1571 ether_input(&sc->arpcom.ac_if, eh, head); 1572 return; 1573 1574bad: if (head) 1575 m_freem(head); 1576 return; 1577} 1578 1579/* 1580 * Supporting routines 1581 */ 1582 1583/* 1584 * Given a source and destination address, copy 'amount' of a packet from 1585 * the ring buffer into a linear destination buffer. Takes into account 1586 * ring-wrap. 1587 */ 1588static inline char * 1589ed_ring_copy(sc,src,dst,amount) 1590 struct ed_softc *sc; 1591 char *src; 1592 char *dst; 1593 u_short amount; 1594{ 1595 u_short tmp_amount; 1596 1597 /* does copy wrap to lower addr in ring buffer? */ 1598 if (src + amount > sc->smem_end) { 1599 tmp_amount = sc->smem_end - src; 1600 bcopy(src,dst,tmp_amount); /* copy amount up to end of smem */ 1601 amount -= tmp_amount; 1602 src = sc->smem_ring; 1603 dst += tmp_amount; 1604 } 1605 1606 bcopy(src, dst, amount); 1607 1608 return(src + amount); 1609} 1610 1611/* 1612 * Copy data from receive buffer to end of mbuf chain 1613 * allocate additional mbufs as needed. return pointer 1614 * to last mbuf in chain. 1615 * sc = ed info (softc) 1616 * src = pointer in ed ring buffer 1617 * dst = pointer to last mbuf in mbuf chain to copy to 1618 * amount = amount of data to copy 1619 */ 1620struct mbuf * 1621ed_ring_to_mbuf(sc,src,dst,total_len) 1622 struct ed_softc *sc; 1623 char *src; 1624 struct mbuf *dst; 1625 u_short total_len; 1626{ 1627 register struct mbuf *m = dst; 1628 1629 while (total_len) { 1630 register u_short amount = min(total_len, M_TRAILINGSPACE(m)); 1631 1632 if (amount == 0) { /* no more data in this mbuf, alloc another */ 1633 /* 1634 * if there is enough data for an mbuf cluster, attempt 1635 * to allocate one of those, otherwise, a regular mbuf 1636 * will do. 1637 */ 1638 dst = m; 1639 MGET(m, M_DONTWAIT, MT_DATA); 1640 if (m == 0) 1641 return (0); 1642 1643 if (total_len >= MINCLSIZE) 1644 MCLGET(m, M_DONTWAIT); 1645 1646 m->m_len = 0; 1647 dst->m_next = m; 1648 amount = min(total_len, M_TRAILINGSPACE(m)); 1649 } 1650 1651 src = ed_ring_copy(sc, src, mtod(m, caddr_t) + m->m_len, amount); 1652 1653 m->m_len += amount; 1654 total_len -= amount; 1655 1656 } 1657 return (m); 1658} 1659#endif 1660 1661