1/* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD$"); 33 34#include <dev/drm2/drmP.h> 35#include <dev/drm2/drm.h> 36#include <dev/drm2/i915/i915_drm.h> 37#include <dev/drm2/i915/intel_drv.h> 38 39#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */ 40 41void 42intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, 43 struct drm_display_mode *adjusted_mode) 44{ 45 adjusted_mode->hdisplay = fixed_mode->hdisplay; 46 adjusted_mode->hsync_start = fixed_mode->hsync_start; 47 adjusted_mode->hsync_end = fixed_mode->hsync_end; 48 adjusted_mode->htotal = fixed_mode->htotal; 49 50 adjusted_mode->vdisplay = fixed_mode->vdisplay; 51 adjusted_mode->vsync_start = fixed_mode->vsync_start; 52 adjusted_mode->vsync_end = fixed_mode->vsync_end; 53 adjusted_mode->vtotal = fixed_mode->vtotal; 54 55 adjusted_mode->clock = fixed_mode->clock; 56} 57 58/* adjusted_mode has been preset to be the panel's fixed mode */ 59void 60intel_pch_panel_fitting(struct drm_device *dev, 61 int fitting_mode, 62 const struct drm_display_mode *mode, 63 struct drm_display_mode *adjusted_mode) 64{ 65 struct drm_i915_private *dev_priv = dev->dev_private; 66 int x, y, width, height; 67 68 x = y = width = height = 0; 69 70 /* Native modes don't need fitting */ 71 if (adjusted_mode->hdisplay == mode->hdisplay && 72 adjusted_mode->vdisplay == mode->vdisplay) 73 goto done; 74 75 switch (fitting_mode) { 76 case DRM_MODE_SCALE_CENTER: 77 width = mode->hdisplay; 78 height = mode->vdisplay; 79 x = (adjusted_mode->hdisplay - width + 1)/2; 80 y = (adjusted_mode->vdisplay - height + 1)/2; 81 break; 82 83 case DRM_MODE_SCALE_ASPECT: 84 /* Scale but preserve the aspect ratio */ 85 { 86 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay; 87 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay; 88 if (scaled_width > scaled_height) { /* pillar */ 89 width = scaled_height / mode->vdisplay; 90 if (width & 1) 91 width++; 92 x = (adjusted_mode->hdisplay - width + 1) / 2; 93 y = 0; 94 height = adjusted_mode->vdisplay; 95 } else if (scaled_width < scaled_height) { /* letter */ 96 height = scaled_width / mode->hdisplay; 97 if (height & 1) 98 height++; 99 y = (adjusted_mode->vdisplay - height + 1) / 2; 100 x = 0; 101 width = adjusted_mode->hdisplay; 102 } else { 103 x = y = 0; 104 width = adjusted_mode->hdisplay; 105 height = adjusted_mode->vdisplay; 106 } 107 } 108 break; 109 110 default: 111 case DRM_MODE_SCALE_FULLSCREEN: 112 x = y = 0; 113 width = adjusted_mode->hdisplay; 114 height = adjusted_mode->vdisplay; 115 break; 116 } 117 118done: 119 dev_priv->pch_pf_pos = (x << 16) | y; 120 dev_priv->pch_pf_size = (width << 16) | height; 121} 122 123static int is_backlight_combination_mode(struct drm_device *dev) 124{ 125 struct drm_i915_private *dev_priv = dev->dev_private; 126 127 if (INTEL_INFO(dev)->gen >= 4) 128 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE; 129 130 if (IS_GEN2(dev)) 131 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE; 132 133 return 0; 134} 135 136static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) 137{ 138 u32 val; 139 140 /* Restore the CTL value if it lost, e.g. GPU reset */ 141 142 if (HAS_PCH_SPLIT(dev_priv->dev)) { 143 val = I915_READ(BLC_PWM_PCH_CTL2); 144 if (dev_priv->saveBLC_PWM_CTL2 == 0) { 145 dev_priv->saveBLC_PWM_CTL2 = val; 146 } else if (val == 0) { 147 I915_WRITE(BLC_PWM_PCH_CTL2, 148 dev_priv->saveBLC_PWM_CTL2); 149 val = dev_priv->saveBLC_PWM_CTL2; 150 } 151 } else { 152 val = I915_READ(BLC_PWM_CTL); 153 if (dev_priv->saveBLC_PWM_CTL == 0) { 154 dev_priv->saveBLC_PWM_CTL = val; 155 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 156 } else if (val == 0) { 157 I915_WRITE(BLC_PWM_CTL, 158 dev_priv->saveBLC_PWM_CTL); 159 I915_WRITE(BLC_PWM_CTL2, 160 dev_priv->saveBLC_PWM_CTL2); 161 val = dev_priv->saveBLC_PWM_CTL; 162 } 163 } 164 165 return val; 166} 167 168u32 intel_panel_get_max_backlight(struct drm_device *dev) 169{ 170 struct drm_i915_private *dev_priv = dev->dev_private; 171 u32 max; 172 173 max = i915_read_blc_pwm_ctl(dev_priv); 174 if (max == 0) { 175 /* XXX add code here to query mode clock or hardware clock 176 * and program max PWM appropriately. 177 */ 178#if 0 179 printf("fixme: max PWM is zero.\n"); 180#endif 181 return 1; 182 } 183 184 if (HAS_PCH_SPLIT(dev)) { 185 max >>= 16; 186 } else { 187 if (INTEL_INFO(dev)->gen < 4) 188 max >>= 17; 189 else 190 max >>= 16; 191 192 if (is_backlight_combination_mode(dev)) 193 max *= 0xff; 194 } 195 196 DRM_DEBUG("max backlight PWM = %d\n", max); 197 return max; 198} 199 200u32 intel_panel_get_backlight(struct drm_device *dev) 201{ 202 struct drm_i915_private *dev_priv = dev->dev_private; 203 u32 val; 204 205 if (HAS_PCH_SPLIT(dev)) { 206 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 207 } else { 208 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 209 if (INTEL_INFO(dev)->gen < 4) 210 val >>= 1; 211 212 if (is_backlight_combination_mode(dev)) { 213 u8 lbpc; 214 215 lbpc = pci_read_config(dev->device, PCI_LBPC, 1); 216 val *= lbpc; 217 } 218 } 219 220 DRM_DEBUG("get backlight PWM = %d\n", val); 221 return val; 222} 223 224static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level) 225{ 226 struct drm_i915_private *dev_priv = dev->dev_private; 227 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 228 I915_WRITE(BLC_PWM_CPU_CTL, val | level); 229} 230 231static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level) 232{ 233 struct drm_i915_private *dev_priv = dev->dev_private; 234 u32 tmp; 235 236 DRM_DEBUG("set backlight PWM = %d\n", level); 237 238 if (HAS_PCH_SPLIT(dev)) 239 return intel_pch_panel_set_backlight(dev, level); 240 241 if (is_backlight_combination_mode(dev)) { 242 u32 max = intel_panel_get_max_backlight(dev); 243 u8 lbpc; 244 245 lbpc = level * 0xfe / max + 1; 246 level /= lbpc; 247 pci_write_config(dev->device, PCI_LBPC, lbpc, 4); 248 } 249 250 tmp = I915_READ(BLC_PWM_CTL); 251 if (INTEL_INFO(dev)->gen < 4) 252 level <<= 1; 253 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK; 254 I915_WRITE(BLC_PWM_CTL, tmp | level); 255} 256 257void intel_panel_set_backlight(struct drm_device *dev, u32 level) 258{ 259 struct drm_i915_private *dev_priv = dev->dev_private; 260 261 dev_priv->backlight_level = level; 262 if (dev_priv->backlight_enabled) 263 intel_panel_actually_set_backlight(dev, level); 264} 265 266void intel_panel_disable_backlight(struct drm_device *dev) 267{ 268 struct drm_i915_private *dev_priv = dev->dev_private; 269 270 dev_priv->backlight_enabled = false; 271 intel_panel_actually_set_backlight(dev, 0); 272} 273 274void intel_panel_enable_backlight(struct drm_device *dev) 275{ 276 struct drm_i915_private *dev_priv = dev->dev_private; 277 278 if (dev_priv->backlight_level == 0) 279 dev_priv->backlight_level = intel_panel_get_max_backlight(dev); 280 281 dev_priv->backlight_enabled = true; 282 intel_panel_actually_set_backlight(dev, dev_priv->backlight_level); 283} 284 285static void intel_panel_init_backlight(struct drm_device *dev) 286{ 287 struct drm_i915_private *dev_priv = dev->dev_private; 288 289 dev_priv->backlight_level = intel_panel_get_backlight(dev); 290 dev_priv->backlight_enabled = dev_priv->backlight_level != 0; 291} 292 293enum drm_connector_status 294intel_panel_detect(struct drm_device *dev) 295{ 296#if 0 297 struct drm_i915_private *dev_priv = dev->dev_private; 298#endif 299 300 if (i915_panel_ignore_lid) 301 return i915_panel_ignore_lid > 0 ? 302 connector_status_connected : 303 connector_status_disconnected; 304 305 /* opregion lid state on HP 2540p is wrong at boot up, 306 * appears to be either the BIOS or Linux ACPI fault */ 307#if 0 308 /* Assume that the BIOS does not lie through the OpRegion... */ 309 if (dev_priv->opregion.lid_state) 310 return ioread32(dev_priv->opregion.lid_state) & 0x1 ? 311 connector_status_connected : 312 connector_status_disconnected; 313#endif 314 315 return connector_status_unknown; 316} 317 318int intel_panel_setup_backlight(struct drm_device *dev) 319{ 320 intel_panel_init_backlight(dev); 321 return 0; 322} 323 324void intel_panel_destroy_backlight(struct drm_device *dev) 325{ 326 return; 327} 328