1145132Sanholt/* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*- 2145132Sanholt * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com 3152909Sanholt */ 4152909Sanholt/*- 5145132Sanholt * Copyright 2000 Gareth Hughes 6145132Sanholt * Copyright 2002 Frank C. Earl 7145132Sanholt * Copyright 2002-2003 Leif Delgass 8145132Sanholt * All Rights Reserved. 9145132Sanholt * 10145132Sanholt * Permission is hereby granted, free of charge, to any person obtaining a 11145132Sanholt * copy of this software and associated documentation files (the "Software"), 12145132Sanholt * to deal in the Software without restriction, including without limitation 13145132Sanholt * the rights to use, copy, modify, merge, publish, distribute, sublicense, 14145132Sanholt * and/or sell copies of the Software, and to permit persons to whom the 15145132Sanholt * Software is furnished to do so, subject to the following conditions: 16145132Sanholt * 17145132Sanholt * The above copyright notice and this permission notice (including the next 18145132Sanholt * paragraph) shall be included in all copies or substantial portions of the 19145132Sanholt * Software. 20145132Sanholt * 21145132Sanholt * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22145132Sanholt * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23145132Sanholt * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 24145132Sanholt * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER 25145132Sanholt * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 26145132Sanholt * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 27145132Sanholt * 28145132Sanholt * Authors: 29145132Sanholt * Gareth Hughes <gareth@valinux.com> 30145132Sanholt * Frank C. Earl <fearl@airmail.net> 31145132Sanholt * Leif Delgass <ldelgass@retinalburn.net> 32145132Sanholt */ 33145132Sanholt 34152909Sanholt#include <sys/cdefs.h> 35152909Sanholt__FBSDID("$FreeBSD$"); 36152909Sanholt 37145132Sanholt#ifndef __MACH64_DRM_H__ 38145132Sanholt#define __MACH64_DRM_H__ 39145132Sanholt 40145132Sanholt/* WARNING: If you change any of these defines, make sure to change the 41145132Sanholt * defines in the Xserver file (mach64_sarea.h) 42145132Sanholt */ 43145132Sanholt#ifndef __MACH64_SAREA_DEFINES__ 44145132Sanholt#define __MACH64_SAREA_DEFINES__ 45145132Sanholt 46145132Sanholt/* What needs to be changed for the current vertex buffer? 47145132Sanholt * GH: We're going to be pedantic about this. We want the card to do as 48145132Sanholt * little as possible, so let's avoid having it fetch a whole bunch of 49145132Sanholt * register values that don't change all that often, if at all. 50145132Sanholt */ 51145132Sanholt#define MACH64_UPLOAD_DST_OFF_PITCH 0x0001 52145132Sanholt#define MACH64_UPLOAD_Z_OFF_PITCH 0x0002 53145132Sanholt#define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004 54145132Sanholt#define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008 55145132Sanholt#define MACH64_UPLOAD_DP_FOG_CLR 0x0010 56145132Sanholt#define MACH64_UPLOAD_DP_WRITE_MASK 0x0020 57145132Sanholt#define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040 58145132Sanholt#define MACH64_UPLOAD_SETUP_CNTL 0x0080 59145132Sanholt#define MACH64_UPLOAD_MISC 0x0100 60145132Sanholt#define MACH64_UPLOAD_TEXTURE 0x0200 61145132Sanholt#define MACH64_UPLOAD_TEX0IMAGE 0x0400 62145132Sanholt#define MACH64_UPLOAD_TEX1IMAGE 0x0800 63145132Sanholt#define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */ 64145132Sanholt#define MACH64_UPLOAD_CONTEXT 0x00ff 65145132Sanholt#define MACH64_UPLOAD_ALL 0x1fff 66145132Sanholt 67145132Sanholt/* DMA buffer size 68145132Sanholt */ 69145132Sanholt#define MACH64_BUFFER_SIZE 16384 70145132Sanholt 71145132Sanholt/* Max number of swaps allowed on the ring 72145132Sanholt * before the client must wait 73145132Sanholt */ 74162132Sanholt#define MACH64_MAX_QUEUED_FRAMES 3U 75145132Sanholt 76145132Sanholt/* Byte offsets for host blit buffer data 77145132Sanholt */ 78145132Sanholt#define MACH64_HOSTDATA_BLIT_OFFSET 104 79145132Sanholt 80145132Sanholt/* Keep these small for testing. 81145132Sanholt */ 82145132Sanholt#define MACH64_NR_SAREA_CLIPRECTS 8 83145132Sanholt 84145132Sanholt#define MACH64_CARD_HEAP 0 85145132Sanholt#define MACH64_AGP_HEAP 1 86145132Sanholt#define MACH64_NR_TEX_HEAPS 2 87145132Sanholt#define MACH64_NR_TEX_REGIONS 64 88145132Sanholt#define MACH64_LOG_TEX_GRANULARITY 16 89145132Sanholt 90145132Sanholt#define MACH64_TEX_MAXLEVELS 1 91145132Sanholt 92145132Sanholt#define MACH64_NR_CONTEXT_REGS 15 93145132Sanholt#define MACH64_NR_TEXTURE_REGS 4 94145132Sanholt 95145132Sanholt#endif /* __MACH64_SAREA_DEFINES__ */ 96145132Sanholt 97145132Sanholttypedef struct { 98145132Sanholt unsigned int dst_off_pitch; 99145132Sanholt 100145132Sanholt unsigned int z_off_pitch; 101145132Sanholt unsigned int z_cntl; 102145132Sanholt unsigned int alpha_tst_cntl; 103145132Sanholt 104145132Sanholt unsigned int scale_3d_cntl; 105145132Sanholt 106145132Sanholt unsigned int sc_left_right; 107145132Sanholt unsigned int sc_top_bottom; 108145132Sanholt 109145132Sanholt unsigned int dp_fog_clr; 110145132Sanholt unsigned int dp_write_mask; 111145132Sanholt unsigned int dp_pix_width; 112145132Sanholt unsigned int dp_mix; 113145132Sanholt unsigned int dp_src; 114145132Sanholt 115145132Sanholt unsigned int clr_cmp_cntl; 116145132Sanholt unsigned int gui_traj_cntl; 117145132Sanholt 118145132Sanholt unsigned int setup_cntl; 119145132Sanholt 120145132Sanholt unsigned int tex_size_pitch; 121145132Sanholt unsigned int tex_cntl; 122145132Sanholt unsigned int secondary_tex_off; 123145132Sanholt unsigned int tex_offset; 124145132Sanholt} drm_mach64_context_regs_t; 125145132Sanholt 126145132Sanholttypedef struct drm_mach64_sarea { 127145132Sanholt /* The channel for communication of state information to the kernel 128145132Sanholt * on firing a vertex dma buffer. 129145132Sanholt */ 130145132Sanholt drm_mach64_context_regs_t context_state; 131145132Sanholt unsigned int dirty; 132145132Sanholt unsigned int vertsize; 133145132Sanholt 134145132Sanholt /* The current cliprects, or a subset thereof. 135145132Sanholt */ 136182080Srnoland struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS]; 137145132Sanholt unsigned int nbox; 138145132Sanholt 139145132Sanholt /* Counters for client-side throttling of rendering clients. 140145132Sanholt */ 141145132Sanholt unsigned int frames_queued; 142145132Sanholt 143145132Sanholt /* Texture memory LRU. 144145132Sanholt */ 145182080Srnoland struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS + 146145132Sanholt 1]; 147145132Sanholt unsigned int tex_age[MACH64_NR_TEX_HEAPS]; 148145132Sanholt int ctx_owner; 149145132Sanholt} drm_mach64_sarea_t; 150145132Sanholt 151145132Sanholt/* WARNING: If you change any of these defines, make sure to change the 152145132Sanholt * defines in the Xserver file (mach64_common.h) 153145132Sanholt */ 154145132Sanholt 155145132Sanholt/* Mach64 specific ioctls 156145132Sanholt * The device specific ioctl range is 0x40 to 0x79. 157145132Sanholt */ 158145132Sanholt 159145132Sanholt#define DRM_MACH64_INIT 0x00 160145132Sanholt#define DRM_MACH64_IDLE 0x01 161145132Sanholt#define DRM_MACH64_RESET 0x02 162145132Sanholt#define DRM_MACH64_SWAP 0x03 163145132Sanholt#define DRM_MACH64_CLEAR 0x04 164145132Sanholt#define DRM_MACH64_VERTEX 0x05 165145132Sanholt#define DRM_MACH64_BLIT 0x06 166145132Sanholt#define DRM_MACH64_FLUSH 0x07 167145132Sanholt#define DRM_MACH64_GETPARAM 0x08 168145132Sanholt 169145132Sanholt#define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t) 170145132Sanholt#define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE ) 171145132Sanholt#define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET ) 172145132Sanholt#define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP ) 173145132Sanholt#define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t) 174145132Sanholt#define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t) 175145132Sanholt#define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t) 176145132Sanholt#define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH ) 177145132Sanholt#define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t) 178145132Sanholt 179145132Sanholt/* Buffer flags for clears 180145132Sanholt */ 181145132Sanholt#define MACH64_FRONT 0x1 182145132Sanholt#define MACH64_BACK 0x2 183145132Sanholt#define MACH64_DEPTH 0x4 184145132Sanholt 185145132Sanholt/* Primitive types for vertex buffers 186145132Sanholt */ 187145132Sanholt#define MACH64_PRIM_POINTS 0x00000000 188145132Sanholt#define MACH64_PRIM_LINES 0x00000001 189145132Sanholt#define MACH64_PRIM_LINE_LOOP 0x00000002 190145132Sanholt#define MACH64_PRIM_LINE_STRIP 0x00000003 191145132Sanholt#define MACH64_PRIM_TRIANGLES 0x00000004 192145132Sanholt#define MACH64_PRIM_TRIANGLE_STRIP 0x00000005 193145132Sanholt#define MACH64_PRIM_TRIANGLE_FAN 0x00000006 194145132Sanholt#define MACH64_PRIM_QUADS 0x00000007 195145132Sanholt#define MACH64_PRIM_QUAD_STRIP 0x00000008 196145132Sanholt#define MACH64_PRIM_POLYGON 0x00000009 197145132Sanholt 198145132Sanholttypedef enum _drm_mach64_dma_mode_t { 199145132Sanholt MACH64_MODE_DMA_ASYNC, 200145132Sanholt MACH64_MODE_DMA_SYNC, 201145132Sanholt MACH64_MODE_MMIO 202145132Sanholt} drm_mach64_dma_mode_t; 203145132Sanholt 204145132Sanholttypedef struct drm_mach64_init { 205145132Sanholt enum { 206145132Sanholt DRM_MACH64_INIT_DMA = 0x01, 207145132Sanholt DRM_MACH64_CLEANUP_DMA = 0x02 208145132Sanholt } func; 209145132Sanholt 210145132Sanholt unsigned long sarea_priv_offset; 211145132Sanholt int is_pci; 212145132Sanholt drm_mach64_dma_mode_t dma_mode; 213145132Sanholt 214145132Sanholt unsigned int fb_bpp; 215145132Sanholt unsigned int front_offset, front_pitch; 216145132Sanholt unsigned int back_offset, back_pitch; 217145132Sanholt 218145132Sanholt unsigned int depth_bpp; 219145132Sanholt unsigned int depth_offset, depth_pitch; 220145132Sanholt 221145132Sanholt unsigned long fb_offset; 222145132Sanholt unsigned long mmio_offset; 223145132Sanholt unsigned long ring_offset; 224145132Sanholt unsigned long buffers_offset; 225145132Sanholt unsigned long agp_textures_offset; 226145132Sanholt} drm_mach64_init_t; 227145132Sanholt 228145132Sanholttypedef struct drm_mach64_clear { 229145132Sanholt unsigned int flags; 230145132Sanholt int x, y, w, h; 231145132Sanholt unsigned int clear_color; 232145132Sanholt unsigned int clear_depth; 233145132Sanholt} drm_mach64_clear_t; 234145132Sanholt 235145132Sanholttypedef struct drm_mach64_vertex { 236145132Sanholt int prim; 237145132Sanholt void *buf; /* Address of vertex buffer */ 238145132Sanholt unsigned long used; /* Number of bytes in buffer */ 239145132Sanholt int discard; /* Client finished with buffer? */ 240145132Sanholt} drm_mach64_vertex_t; 241145132Sanholt 242145132Sanholttypedef struct drm_mach64_blit { 243182080Srnoland void *buf; 244145132Sanholt int pitch; 245145132Sanholt int offset; 246145132Sanholt int format; 247145132Sanholt unsigned short x, y; 248145132Sanholt unsigned short width, height; 249145132Sanholt} drm_mach64_blit_t; 250145132Sanholt 251145132Sanholttypedef struct drm_mach64_getparam { 252145132Sanholt enum { 253145132Sanholt MACH64_PARAM_FRAMES_QUEUED = 0x01, 254145132Sanholt MACH64_PARAM_IRQ_NR = 0x02 255145132Sanholt } param; 256145132Sanholt void *value; 257145132Sanholt} drm_mach64_getparam_t; 258145132Sanholt 259145132Sanholt#endif 260