1/* 2 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC 3 * 4 * Copyright (C) 2012 Atmel, 5 * 2012 Hong Xu <hong.xu@atmel.com> 6 * 7 * Licensed under GPLv2 or later. 8 */ 9 10#include "skeleton.dtsi" 11#include <dt-bindings/dma/at91.h> 12#include <dt-bindings/pinctrl/at91.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/gpio/gpio.h> 15 16/ { 17 model = "Atmel AT91SAM9N12 SoC"; 18 compatible = "atmel,at91sam9n12"; 19 interrupt-parent = <&aic>; 20 21 aliases { 22 serial0 = &dbgu; 23 serial1 = &usart0; 24 serial2 = &usart1; 25 serial3 = &usart2; 26 serial4 = &usart3; 27 gpio0 = &pioA; 28 gpio1 = &pioB; 29 gpio2 = &pioC; 30 gpio3 = &pioD; 31 tcb0 = &tcb0; 32 tcb1 = &tcb1; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 ssc0 = &ssc0; 36 pwm0 = &pwm0; 37 }; 38 cpus { 39 #address-cells = <0>; 40 #size-cells = <0>; 41 42 cpu { 43 compatible = "arm,arm926ej-s"; 44 device_type = "cpu"; 45 }; 46 }; 47 48 memory { 49 reg = <0x20000000 0x10000000>; 50 }; 51 52 ahb { 53 compatible = "simple-bus"; 54 #address-cells = <1>; 55 #size-cells = <1>; 56 ranges; 57 58 apb { 59 compatible = "simple-bus"; 60 #address-cells = <1>; 61 #size-cells = <1>; 62 ranges; 63 64 aic: interrupt-controller@fffff000 { 65 #interrupt-cells = <3>; 66 compatible = "atmel,at91rm9200-aic"; 67 interrupt-controller; 68 reg = <0xfffff000 0x200>; 69 atmel,external-irqs = <31>; 70 }; 71 72 ramc0: ramc@ffffe800 { 73 compatible = "atmel,at91sam9g45-ddramc"; 74 reg = <0xffffe800 0x200>; 75 }; 76 77 pmc: pmc@fffffc00 { 78 compatible = "atmel,at91rm9200-pmc"; 79 reg = <0xfffffc00 0x100>; 80 }; 81 82 rstc@fffffe00 { 83 compatible = "atmel,at91sam9g45-rstc"; 84 reg = <0xfffffe00 0x10>; 85 }; 86 87 pit: timer@fffffe30 { 88 compatible = "atmel,at91sam9260-pit"; 89 reg = <0xfffffe30 0xf>; 90 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 91 }; 92 93 shdwc@fffffe10 { 94 compatible = "atmel,at91sam9x5-shdwc"; 95 reg = <0xfffffe10 0x10>; 96 }; 97 98 mmc0: mmc@f0008000 { 99 compatible = "atmel,hsmci"; 100 reg = <0xf0008000 0x600>; 101 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>; 102 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>; 103 dma-names = "rxtx"; 104 #address-cells = <1>; 105 #size-cells = <0>; 106 status = "disabled"; 107 }; 108 109 tcb0: timer@f8008000 { 110 compatible = "atmel,at91sam9x5-tcb"; 111 reg = <0xf8008000 0x100>; 112 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 113 }; 114 115 tcb1: timer@f800c000 { 116 compatible = "atmel,at91sam9x5-tcb"; 117 reg = <0xf800c000 0x100>; 118 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 119 }; 120 121 dma: dma-controller@ffffec00 { 122 compatible = "atmel,at91sam9g45-dma"; 123 reg = <0xffffec00 0x200>; 124 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 125 #dma-cells = <2>; 126 }; 127 128 pinctrl@fffff400 { 129 #address-cells = <1>; 130 #size-cells = <1>; 131 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; 132 ranges = <0xfffff400 0xfffff400 0x800>; 133 134 atmel,mux-mask = < 135 /* A B C */ 136 0xffffffff 0xffe07983 0x00000000 /* pioA */ 137 0x00040000 0x00047e0f 0x00000000 /* pioB */ 138 0xfdffffff 0x07c00000 0xb83fffff /* pioC */ 139 0x003fffff 0x003f8000 0x00000000 /* pioD */ 140 >; 141 142 /* shared pinctrl settings */ 143 dbgu { 144 pinctrl_dbgu: dbgu-0 { 145 atmel,pins = 146 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */ 147 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */ 148 }; 149 }; 150 151 usart0 { 152 pinctrl_usart0: usart0-0 { 153 atmel,pins = 154 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 155 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */ 156 }; 157 158 pinctrl_usart0_rts: usart0_rts-0 { 159 atmel,pins = 160 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */ 161 }; 162 163 pinctrl_usart0_cts: usart0_cts-0 { 164 atmel,pins = 165 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */ 166 }; 167 }; 168 169 usart1 { 170 pinctrl_usart1: usart1-0 { 171 atmel,pins = 172 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */ 173 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */ 174 }; 175 }; 176 177 usart2 { 178 pinctrl_usart2: usart2-0 { 179 atmel,pins = 180 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */ 181 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */ 182 }; 183 184 pinctrl_usart2_rts: usart2_rts-0 { 185 atmel,pins = 186 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */ 187 }; 188 189 pinctrl_usart2_cts: usart2_cts-0 { 190 atmel,pins = 191 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */ 192 }; 193 }; 194 195 usart3 { 196 pinctrl_usart3: usart3-0 { 197 atmel,pins = 198 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */ 199 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */ 200 }; 201 202 pinctrl_usart3_rts: usart3_rts-0 { 203 atmel,pins = 204 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */ 205 }; 206 207 pinctrl_usart3_cts: usart3_cts-0 { 208 atmel,pins = 209 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */ 210 }; 211 }; 212 213 uart0 { 214 pinctrl_uart0: uart0-0 { 215 atmel,pins = 216 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */ 217 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */ 218 }; 219 }; 220 221 uart1 { 222 pinctrl_uart1: uart1-0 { 223 atmel,pins = 224 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */ 225 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */ 226 }; 227 }; 228 229 nand { 230 pinctrl_nand: nand-0 { 231 atmel,pins = 232 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/ 233 AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */ 234 }; 235 }; 236 237 mmc0 { 238 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 { 239 atmel,pins = 240 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */ 241 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 242 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */ 243 }; 244 245 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 246 atmel,pins = 247 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 248 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 249 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 250 }; 251 252 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 { 253 atmel,pins = 254 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */ 255 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */ 256 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */ 257 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */ 258 }; 259 }; 260 261 ssc0 { 262 pinctrl_ssc0_tx: ssc0_tx-0 { 263 atmel,pins = 264 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */ 265 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */ 266 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */ 267 }; 268 269 pinctrl_ssc0_rx: ssc0_rx-0 { 270 atmel,pins = 271 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */ 272 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */ 273 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */ 274 }; 275 }; 276 277 spi0 { 278 pinctrl_spi0: spi0-0 { 279 atmel,pins = 280 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */ 281 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */ 282 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */ 283 }; 284 }; 285 286 spi1 { 287 pinctrl_spi1: spi1-0 { 288 atmel,pins = 289 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */ 290 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */ 291 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */ 292 }; 293 }; 294 295 i2c0 { 296 pinctrl_i2c0: i2c0-0 { 297 atmel,pins = 298 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE 299 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; 300 }; 301 }; 302 303 i2c1 { 304 pinctrl_i2c1: i2c1-0 { 305 atmel,pins = 306 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE 307 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; 308 }; 309 }; 310 311 tcb0 { 312 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 313 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; 314 }; 315 316 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 317 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; 318 }; 319 320 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 321 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 322 }; 323 324 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 325 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 326 }; 327 328 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 329 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 330 }; 331 332 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 333 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 334 }; 335 336 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 337 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 338 }; 339 340 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 341 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; 342 }; 343 344 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 345 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 346 }; 347 }; 348 349 tcb1 { 350 pinctrl_tcb1_tclk0: tcb1_tclk0-0 { 351 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; 352 }; 353 354 pinctrl_tcb1_tclk1: tcb1_tclk1-0 { 355 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>; 356 }; 357 358 pinctrl_tcb1_tclk2: tcb1_tclk2-0 { 359 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>; 360 }; 361 362 pinctrl_tcb1_tioa0: tcb1_tioa0-0 { 363 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>; 364 }; 365 366 pinctrl_tcb1_tioa1: tcb1_tioa1-0 { 367 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>; 368 }; 369 370 pinctrl_tcb1_tioa2: tcb1_tioa2-0 { 371 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>; 372 }; 373 374 pinctrl_tcb1_tiob0: tcb1_tiob0-0 { 375 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; 376 }; 377 378 pinctrl_tcb1_tiob1: tcb1_tiob1-0 { 379 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>; 380 }; 381 382 pinctrl_tcb1_tiob2: tcb1_tiob2-0 { 383 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>; 384 }; 385 }; 386 387 pioA: gpio@fffff400 { 388 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 389 reg = <0xfffff400 0x200>; 390 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 391 #gpio-cells = <2>; 392 gpio-controller; 393 interrupt-controller; 394 #interrupt-cells = <2>; 395 }; 396 397 pioB: gpio@fffff600 { 398 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 399 reg = <0xfffff600 0x200>; 400 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 401 #gpio-cells = <2>; 402 gpio-controller; 403 interrupt-controller; 404 #interrupt-cells = <2>; 405 }; 406 407 pioC: gpio@fffff800 { 408 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 409 reg = <0xfffff800 0x200>; 410 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 411 #gpio-cells = <2>; 412 gpio-controller; 413 interrupt-controller; 414 #interrupt-cells = <2>; 415 }; 416 417 pioD: gpio@fffffa00 { 418 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 419 reg = <0xfffffa00 0x200>; 420 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 421 #gpio-cells = <2>; 422 gpio-controller; 423 interrupt-controller; 424 #interrupt-cells = <2>; 425 }; 426 }; 427 428 dbgu: serial@fffff200 { 429 compatible = "atmel,at91sam9260-usart"; 430 reg = <0xfffff200 0x200>; 431 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 432 pinctrl-names = "default"; 433 pinctrl-0 = <&pinctrl_dbgu>; 434 status = "disabled"; 435 }; 436 437 ssc0: ssc@f0010000 { 438 compatible = "atmel,at91sam9g45-ssc"; 439 reg = <0xf0010000 0x4000>; 440 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>; 441 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>, 442 <&dma 0 AT91_DMA_CFG_PER_ID(22)>; 443 dma-names = "tx", "rx"; 444 pinctrl-names = "default"; 445 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 446 status = "disabled"; 447 }; 448 449 usart0: serial@f801c000 { 450 compatible = "atmel,at91sam9260-usart"; 451 reg = <0xf801c000 0x4000>; 452 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pinctrl_usart0>; 455 status = "disabled"; 456 }; 457 458 usart1: serial@f8020000 { 459 compatible = "atmel,at91sam9260-usart"; 460 reg = <0xf8020000 0x4000>; 461 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 462 pinctrl-names = "default"; 463 pinctrl-0 = <&pinctrl_usart1>; 464 status = "disabled"; 465 }; 466 467 usart2: serial@f8024000 { 468 compatible = "atmel,at91sam9260-usart"; 469 reg = <0xf8024000 0x4000>; 470 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 471 pinctrl-names = "default"; 472 pinctrl-0 = <&pinctrl_usart2>; 473 status = "disabled"; 474 }; 475 476 usart3: serial@f8028000 { 477 compatible = "atmel,at91sam9260-usart"; 478 reg = <0xf8028000 0x4000>; 479 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 480 pinctrl-names = "default"; 481 pinctrl-0 = <&pinctrl_usart3>; 482 status = "disabled"; 483 }; 484 485 i2c0: i2c@f8010000 { 486 compatible = "atmel,at91sam9x5-i2c"; 487 reg = <0xf8010000 0x100>; 488 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>; 489 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>, 490 <&dma 1 AT91_DMA_CFG_PER_ID(14)>; 491 dma-names = "tx", "rx"; 492 #address-cells = <1>; 493 #size-cells = <0>; 494 pinctrl-names = "default"; 495 pinctrl-0 = <&pinctrl_i2c0>; 496 status = "disabled"; 497 }; 498 499 i2c1: i2c@f8014000 { 500 compatible = "atmel,at91sam9x5-i2c"; 501 reg = <0xf8014000 0x100>; 502 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>; 503 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>, 504 <&dma 1 AT91_DMA_CFG_PER_ID(16)>; 505 dma-names = "tx", "rx"; 506 #address-cells = <1>; 507 #size-cells = <0>; 508 pinctrl-names = "default"; 509 pinctrl-0 = <&pinctrl_i2c1>; 510 status = "disabled"; 511 }; 512 513 spi0: spi@f0000000 { 514 #address-cells = <1>; 515 #size-cells = <0>; 516 compatible = "atmel,at91rm9200-spi"; 517 reg = <0xf0000000 0x100>; 518 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 519 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>, 520 <&dma 1 AT91_DMA_CFG_PER_ID(2)>; 521 dma-names = "tx", "rx"; 522 pinctrl-names = "default"; 523 pinctrl-0 = <&pinctrl_spi0>; 524 status = "disabled"; 525 }; 526 527 spi1: spi@f0004000 { 528 #address-cells = <1>; 529 #size-cells = <0>; 530 compatible = "atmel,at91rm9200-spi"; 531 reg = <0xf0004000 0x100>; 532 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 533 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>, 534 <&dma 1 AT91_DMA_CFG_PER_ID(4)>; 535 dma-names = "tx", "rx"; 536 pinctrl-names = "default"; 537 pinctrl-0 = <&pinctrl_spi1>; 538 status = "disabled"; 539 }; 540 541 watchdog@fffffe40 { 542 compatible = "atmel,at91sam9260-wdt"; 543 reg = <0xfffffe40 0x10>; 544 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 545 atmel,watchdog-type = "hardware"; 546 atmel,reset-type = "all"; 547 atmel,dbg-halt; 548 atmel,idle-halt; 549 status = "disabled"; 550 }; 551 552 pwm0: pwm@f8034000 { 553 compatible = "atmel,at91sam9rl-pwm"; 554 reg = <0xf8034000 0x300>; 555 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>; 556 #pwm-cells = <3>; 557 status = "disabled"; 558 }; 559 }; 560 561 nand0: nand@40000000 { 562 compatible = "atmel,at91rm9200-nand"; 563 #address-cells = <1>; 564 #size-cells = <1>; 565 reg = < 0x40000000 0x10000000 566 0xffffe000 0x00000600 567 0xffffe600 0x00000200 568 0x00108000 0x00018000 569 >; 570 atmel,pmecc-lookup-table-offset = <0x0 0x8000>; 571 atmel,nand-addr-offset = <21>; 572 atmel,nand-cmd-offset = <22>; 573 pinctrl-names = "default"; 574 pinctrl-0 = <&pinctrl_nand>; 575 gpios = <&pioD 5 GPIO_ACTIVE_HIGH 576 &pioD 4 GPIO_ACTIVE_HIGH 577 0 578 >; 579 status = "disabled"; 580 }; 581 582 usb0: ohci@00500000 { 583 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 584 reg = <0x00500000 0x00100000>; 585 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 586 status = "disabled"; 587 }; 588 }; 589 590 i2c@0 { 591 compatible = "i2c-gpio"; 592 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */ 593 &pioA 31 GPIO_ACTIVE_HIGH /* scl */ 594 >; 595 i2c-gpio,sda-open-drain; 596 i2c-gpio,scl-open-drain; 597 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 598 #address-cells = <1>; 599 #size-cells = <0>; 600 status = "disabled"; 601 }; 602}; 603