1/*-
2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include "opt_platform.h"
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD$");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/bus.h>
35#include <sys/reboot.h>
36
37#include <vm/vm.h>
38
39#include <machine/bus.h>
40#include <machine/devmap.h>
41#include <machine/machdep.h>
42
43#include <arm/arm/mpcore_timervar.h>
44#include <arm/freescale/imx/imx6_anatopreg.h>
45#include <arm/freescale/imx/imx6_anatopvar.h>
46#include <arm/freescale/imx/imx_machdep.h>
47
48vm_offset_t
49initarm_lastaddr(void)
50{
51
52	return (arm_devmap_lastaddr());
53}
54
55void
56initarm_early_init(void)
57{
58
59	/* Inform the MPCore timer driver that its clock is variable. */
60	arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES);
61}
62
63void
64initarm_gpio_init(void)
65{
66
67}
68
69void
70initarm_late_init(void)
71{
72
73}
74
75/*
76 * Set up static device mappings.
77 *
78 * This attempts to cover the most-used devices with 1MB section mappings, which
79 * is good for performance (uses fewer TLB entries for device access).
80 *
81 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the
82 * L2 cache controller.  Most of the 1MB range is unused reserved space.
83 *
84 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
85 *
86 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
87 * the memory map.  When we get support for graphics it might make sense to
88 * static map some of that area.  Be careful with other things in that area such
89 * as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
90 */
91int
92initarm_devmap_init(void)
93{
94	const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
95	const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
96	const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
97	const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
98	const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
99	const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
100
101	arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
102	arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
103	arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
104
105	return (0);
106}
107
108void
109cpu_reset(void)
110{
111	const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
112
113	imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
114}
115
116/*
117 * Determine what flavor of imx6 we're running on.
118 *
119 * This code is based on the way u-boot does it.  Information found on the web
120 * indicates that Freescale themselves were the original source of this logic,
121 * including the strange check for number of CPUs in the SCU configuration
122 * register, which is apparently needed on some revisions of the SOLO.
123 *
124 * According to the documentation, there is such a thing as an i.MX6 Dual
125 * (non-lite flavor).  However, Freescale doesn't seem to have assigned it a
126 * number or provided any logic to handle it in their detection code.
127 *
128 * Note that the ANALOG_DIGPROG and SCU configuration registers are not
129 * documented in the chip reference manual.  (SCU configuration is mentioned,
130 * but not mapped out in detail.)  I think the bottom two bits of the scu config
131 * register may be ncpu-1.
132 *
133 * This hasn't been tested yet on a dual[-lite].
134 *
135 * On a solo:
136 *      digprog    = 0x00610001
137 *      hwsoc      = 0x00000062
138 *      scu config = 0x00000500
139 * On a quad:
140 *      digprog    = 0x00630002
141 *      hwsoc      = 0x00000063
142 *      scu config = 0x00005503
143 */
144u_int imx_soc_type()
145{
146	uint32_t digprog, hwsoc;
147	uint32_t *pcr;
148	static u_int soctype;
149	const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
150#define	HWSOC_MX6SL	0x60
151#define	HWSOC_MX6DL	0x61
152#define	HWSOC_MX6SOLO	0x62
153#define	HWSOC_MX6Q	0x63
154
155	if (soctype != 0)
156		return (soctype);
157
158	digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
159	hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
160	    IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
161
162	if (hwsoc != HWSOC_MX6SL) {
163		digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
164		hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
165		    IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
166		/*printf("digprog = 0x%08x\n", digprog);*/
167		if (hwsoc == HWSOC_MX6DL) {
168			pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
169			if (pcr != NULL) {
170				/*printf("scu config = 0x%08x\n", *pcr);*/
171				if ((*pcr & 0x03) == 0) {
172					hwsoc = HWSOC_MX6SOLO;
173				}
174			}
175		}
176	}
177	/* printf("hwsoc 0x%08x\n", hwsoc); */
178
179	switch (hwsoc) {
180	case HWSOC_MX6SL:
181		soctype = IMXSOC_6SL;
182		break;
183	case HWSOC_MX6SOLO:
184		soctype = IMXSOC_6S;
185		break;
186	case HWSOC_MX6DL:
187		soctype = IMXSOC_6DL;
188		break;
189	case HWSOC_MX6Q :
190		soctype = IMXSOC_6Q;
191		break;
192	default:
193		printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
194		    "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
195		soctype = IMXSOC_6Q;
196		break;
197	}
198
199	return (soctype);
200}
201
202/*
203 * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
204 *   option SOCDEV_PA=0x02000000
205 *   option SOCDEV_VA=0x02000000
206 *   option EARLY_PRINTF
207 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It
208 * makes sense now, but if multiple SOCs do that it will make early_putc another
209 * duplicate symbol to be eliminated on the path to a generic kernel.
210 */
211#if 0
212static void
213imx6_early_putc(int c)
214{
215	volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098;
216	volatile uint32_t * UART_TX_REG   = (uint32_t *)0x02020040;
217	const uint32_t      UART_TXRDY    = (1 << 3);
218
219	while ((*UART_STAT_REG & UART_TXRDY) == 0)
220		continue;
221	*UART_TX_REG = c;
222}
223early_putc_t *early_putc = imx6_early_putc;
224#endif
225
226