1/* Target-dependent code for PowerPC systems using the SVR4 ABI 2 for GDB, the GNU debugger. 3 4 Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 2 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 59 Temple Place - Suite 330, 21 Boston, MA 02111-1307, USA. */ 22 23#include "defs.h" 24#include "gdbcore.h" 25#include "inferior.h" 26#include "regcache.h" 27#include "value.h" 28#include "gdb_string.h" 29#include "gdb_assert.h" 30#include "ppc-tdep.h" 31#include "target.h" 32#include "objfiles.h" 33 34/* Pass the arguments in either registers, or in the stack. Using the 35 ppc sysv ABI, the first eight words of the argument list (that might 36 be less than eight parameters if some parameters occupy more than one 37 word) are passed in r3..r10 registers. float and double parameters are 38 passed in fpr's, in addition to that. Rest of the parameters if any 39 are passed in user stack. 40 41 If the function is returning a structure, then the return address is passed 42 in r3, then the first 7 words of the parametes can be passed in registers, 43 starting from r4. */ 44 45CORE_ADDR 46ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, 47 struct regcache *regcache, CORE_ADDR bp_addr, 48 int nargs, struct value **args, CORE_ADDR sp, 49 int struct_return, CORE_ADDR struct_addr) 50{ 51 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 52 const CORE_ADDR saved_sp = read_sp (); 53 int argspace = 0; /* 0 is an initial wrong guess. */ 54 int write_pass; 55 56 /* Go through the argument list twice. 57 58 Pass 1: Figure out how much new stack space is required for 59 arguments and pushed values. Unlike the PowerOpen ABI, the SysV 60 ABI doesn't reserve any extra space for parameters which are put 61 in registers, but does always push structures and then pass their 62 address. 63 64 Pass 2: Replay the same computation but this time also write the 65 values out to the target. */ 66 67 for (write_pass = 0; write_pass < 2; write_pass++) 68 { 69 int argno; 70 /* Next available floating point register for float and double 71 arguments. */ 72 int freg = 1; 73 /* Next available general register for non-float, non-vector 74 arguments. */ 75 int greg = 3; 76 /* Next available vector register for vector arguments. */ 77 int vreg = 2; 78 /* Arguments start above the "LR save word" and "Back chain". */ 79 int argoffset = 2 * tdep->wordsize; 80 /* Structures start after the arguments. */ 81 int structoffset = argoffset + argspace; 82 83 /* If the function is returning a `struct', then the first word 84 (which will be passed in r3) is used for struct return 85 address. In that case we should advance one word and start 86 from r4 register to copy parameters. */ 87 if (struct_return) 88 { 89 if (write_pass) 90 regcache_cooked_write_signed (regcache, 91 tdep->ppc_gp0_regnum + greg, 92 struct_addr); 93 greg++; 94 } 95 96 for (argno = 0; argno < nargs; argno++) 97 { 98 struct value *arg = args[argno]; 99 struct type *type = check_typedef (VALUE_TYPE (arg)); 100 int len = TYPE_LENGTH (type); 101 char *val = VALUE_CONTENTS (arg); 102 103 if (TYPE_CODE (type) == TYPE_CODE_FLT 104 && ppc_floating_point_unit_p (current_gdbarch) && len <= 8) 105 { 106 /* Floating point value converted to "double" then 107 passed in an FP register, when the registers run out, 108 8 byte aligned stack is used. */ 109 if (freg <= 8) 110 { 111 if (write_pass) 112 { 113 /* Always store the floating point value using 114 the register's floating-point format. */ 115 char regval[MAX_REGISTER_SIZE]; 116 struct type *regtype 117 = register_type (gdbarch, FP0_REGNUM + freg); 118 convert_typed_floating (val, type, regval, regtype); 119 regcache_cooked_write (regcache, FP0_REGNUM + freg, 120 regval); 121 } 122 freg++; 123 } 124 else 125 { 126 /* SysV ABI converts floats to doubles before 127 writing them to an 8 byte aligned stack location. */ 128 argoffset = align_up (argoffset, 8); 129 if (write_pass) 130 { 131 char memval[8]; 132 struct type *memtype; 133 switch (TARGET_BYTE_ORDER) 134 { 135 case BFD_ENDIAN_BIG: 136 memtype = builtin_type_ieee_double_big; 137 break; 138 case BFD_ENDIAN_LITTLE: 139 memtype = builtin_type_ieee_double_little; 140 break; 141 default: 142 internal_error (__FILE__, __LINE__, "bad switch"); 143 } 144 convert_typed_floating (val, type, memval, memtype); 145 write_memory (sp + argoffset, val, len); 146 } 147 argoffset += 8; 148 } 149 } 150 else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */ 151 || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */ 152 { 153 /* "long long" or "double" passed in an odd/even 154 register pair with the low addressed word in the odd 155 register and the high addressed word in the even 156 register, or when the registers run out an 8 byte 157 aligned stack location. */ 158 if (greg > 9) 159 { 160 /* Just in case GREG was 10. */ 161 greg = 11; 162 argoffset = align_up (argoffset, 8); 163 if (write_pass) 164 write_memory (sp + argoffset, val, len); 165 argoffset += 8; 166 } 167 else if (tdep->wordsize == 8) 168 { 169 if (write_pass) 170 regcache_cooked_write (regcache, 171 tdep->ppc_gp0_regnum + greg, val); 172 greg += 1; 173 } 174 else 175 { 176 /* Must start on an odd register - r3/r4 etc. */ 177 if ((greg & 1) == 0) 178 greg++; 179 if (write_pass) 180 { 181 regcache_cooked_write (regcache, 182 tdep->ppc_gp0_regnum + greg + 0, 183 val + 0); 184 regcache_cooked_write (regcache, 185 tdep->ppc_gp0_regnum + greg + 1, 186 val + 4); 187 } 188 greg += 2; 189 } 190 } 191 else if (len == 16 192 && TYPE_CODE (type) == TYPE_CODE_ARRAY 193 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0) 194 { 195 /* Vector parameter passed in an Altivec register, or 196 when that runs out, 16 byte aligned stack location. */ 197 if (vreg <= 13) 198 { 199 if (write_pass) 200 regcache_cooked_write (current_regcache, 201 tdep->ppc_vr0_regnum + vreg, val); 202 vreg++; 203 } 204 else 205 { 206 argoffset = align_up (argoffset, 16); 207 if (write_pass) 208 write_memory (sp + argoffset, val, 16); 209 argoffset += 16; 210 } 211 } 212 else if (len == 8 213 && TYPE_CODE (type) == TYPE_CODE_ARRAY 214 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0) 215 { 216 /* Vector parameter passed in an e500 register, or when 217 that runs out, 8 byte aligned stack location. Note 218 that since e500 vector and general purpose registers 219 both map onto the same underlying register set, a 220 "greg" and not a "vreg" is consumed here. A cooked 221 write stores the value in the correct locations 222 within the raw register cache. */ 223 if (greg <= 10) 224 { 225 if (write_pass) 226 regcache_cooked_write (current_regcache, 227 tdep->ppc_ev0_regnum + greg, val); 228 greg++; 229 } 230 else 231 { 232 argoffset = align_up (argoffset, 8); 233 if (write_pass) 234 write_memory (sp + argoffset, val, 8); 235 argoffset += 8; 236 } 237 } 238 else 239 { 240 /* Reduce the parameter down to something that fits in a 241 "word". */ 242 char word[MAX_REGISTER_SIZE]; 243 memset (word, 0, MAX_REGISTER_SIZE); 244 if (len > tdep->wordsize 245 || TYPE_CODE (type) == TYPE_CODE_STRUCT 246 || TYPE_CODE (type) == TYPE_CODE_UNION) 247 { 248 /* Structs and large values are put on an 8 byte 249 aligned stack ... */ 250 structoffset = align_up (structoffset, 8); 251 if (write_pass) 252 write_memory (sp + structoffset, val, len); 253 /* ... and then a "word" pointing to that address is 254 passed as the parameter. */ 255 store_unsigned_integer (word, tdep->wordsize, 256 sp + structoffset); 257 structoffset += len; 258 } 259 else if (TYPE_CODE (type) == TYPE_CODE_INT) 260 /* Sign or zero extend the "int" into a "word". */ 261 store_unsigned_integer (word, tdep->wordsize, 262 unpack_long (type, val)); 263 else 264 /* Always goes in the low address. */ 265 memcpy (word, val, len); 266 /* Store that "word" in a register, or on the stack. 267 The words have "4" byte alignment. */ 268 if (greg <= 10) 269 { 270 if (write_pass) 271 regcache_cooked_write (regcache, 272 tdep->ppc_gp0_regnum + greg, word); 273 greg++; 274 } 275 else 276 { 277 argoffset = align_up (argoffset, tdep->wordsize); 278 if (write_pass) 279 write_memory (sp + argoffset, word, tdep->wordsize); 280 argoffset += tdep->wordsize; 281 } 282 } 283 } 284 285 /* Compute the actual stack space requirements. */ 286 if (!write_pass) 287 { 288 /* Remember the amount of space needed by the arguments. */ 289 argspace = argoffset; 290 /* Allocate space for both the arguments and the structures. */ 291 sp -= (argoffset + structoffset); 292 /* Ensure that the stack is still 16 byte aligned. */ 293 sp = align_down (sp, 16); 294 } 295 } 296 297 /* Update %sp. */ 298 regcache_cooked_write_signed (regcache, SP_REGNUM, sp); 299 300 /* Write the backchain (it occupies WORDSIZED bytes). */ 301 write_memory_signed_integer (sp, tdep->wordsize, saved_sp); 302 303 /* Point the inferior function call's return address at the dummy's 304 breakpoint. */ 305 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); 306 307 return sp; 308} 309 310/* Handle the return-value conventions specified by the SysV 32-bit 311 PowerPC ABI (including all the supplements): 312 313 no floating-point: floating-point values returned using 32-bit 314 general-purpose registers. 315 316 Altivec: 128-bit vectors returned using vector registers. 317 318 e500: 64-bit vectors returned using the full full 64 bit EV 319 register, floating-point values returned using 32-bit 320 general-purpose registers. 321 322 GCC (broken): Small struct values right (instead of left) aligned 323 when returned in general-purpose registers. */ 324 325static enum return_value_convention 326do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type, 327 struct regcache *regcache, void *readbuf, 328 const void *writebuf, int broken_gcc) 329{ 330 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 331 gdb_assert (tdep->wordsize == 4); 332 if (TYPE_CODE (type) == TYPE_CODE_FLT 333 && TYPE_LENGTH (type) <= 8 334 && ppc_floating_point_unit_p (gdbarch)) 335 { 336 if (readbuf) 337 { 338 /* Floats and doubles stored in "f1". Convert the value to 339 the required type. */ 340 char regval[MAX_REGISTER_SIZE]; 341 struct type *regtype = register_type (gdbarch, FP0_REGNUM + 1); 342 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval); 343 convert_typed_floating (regval, regtype, readbuf, type); 344 } 345 if (writebuf) 346 { 347 /* Floats and doubles stored in "f1". Convert the value to 348 the register's "double" type. */ 349 char regval[MAX_REGISTER_SIZE]; 350 struct type *regtype = register_type (gdbarch, FP0_REGNUM); 351 convert_typed_floating (writebuf, type, regval, regtype); 352 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval); 353 } 354 return RETURN_VALUE_REGISTER_CONVENTION; 355 } 356 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8) 357 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)) 358 { 359 if (readbuf) 360 { 361 /* A long long, or a double stored in the 32 bit r3/r4. */ 362 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, 363 (bfd_byte *) readbuf + 0); 364 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, 365 (bfd_byte *) readbuf + 4); 366 } 367 if (writebuf) 368 { 369 /* A long long, or a double stored in the 32 bit r3/r4. */ 370 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, 371 (const bfd_byte *) writebuf + 0); 372 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, 373 (const bfd_byte *) writebuf + 4); 374 } 375 return RETURN_VALUE_REGISTER_CONVENTION; 376 } 377 if (TYPE_CODE (type) == TYPE_CODE_INT 378 && TYPE_LENGTH (type) <= tdep->wordsize) 379 { 380 if (readbuf) 381 { 382 /* Some sort of integer stored in r3. Since TYPE isn't 383 bigger than the register, sign extension isn't a problem 384 - just do everything unsigned. */ 385 ULONGEST regval; 386 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, 387 ®val); 388 store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval); 389 } 390 if (writebuf) 391 { 392 /* Some sort of integer stored in r3. Use unpack_long since 393 that should handle any required sign extension. */ 394 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, 395 unpack_long (type, writebuf)); 396 } 397 return RETURN_VALUE_REGISTER_CONVENTION; 398 } 399 if (TYPE_LENGTH (type) == 16 400 && TYPE_CODE (type) == TYPE_CODE_ARRAY 401 && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0) 402 { 403 if (readbuf) 404 { 405 /* Altivec places the return value in "v2". */ 406 regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); 407 } 408 if (writebuf) 409 { 410 /* Altivec places the return value in "v2". */ 411 regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); 412 } 413 return RETURN_VALUE_REGISTER_CONVENTION; 414 } 415 if (TYPE_LENGTH (type) == 8 416 && TYPE_CODE (type) == TYPE_CODE_ARRAY 417 && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0) 418 { 419 /* The e500 ABI places return values for the 64-bit DSP types 420 (__ev64_opaque__) in r3. However, in GDB-speak, ev3 421 corresponds to the entire r3 value for e500, whereas GDB's r3 422 only corresponds to the least significant 32-bits. So place 423 the 64-bit DSP type's value in ev3. */ 424 if (readbuf) 425 regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf); 426 if (writebuf) 427 regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf); 428 return RETURN_VALUE_REGISTER_CONVENTION; 429 } 430 if (broken_gcc && TYPE_LENGTH (type) <= 8) 431 { 432 if (readbuf) 433 { 434 /* GCC screwed up. The last register isn't "left" aligned. 435 Need to extract the least significant part of each 436 register and then store that. */ 437 /* Transfer any full words. */ 438 int word = 0; 439 while (1) 440 { 441 ULONGEST reg; 442 int len = TYPE_LENGTH (type) - word * tdep->wordsize; 443 if (len <= 0) 444 break; 445 if (len > tdep->wordsize) 446 len = tdep->wordsize; 447 regcache_cooked_read_unsigned (regcache, 448 tdep->ppc_gp0_regnum + 3 + word, 449 ®); 450 store_unsigned_integer (((bfd_byte *) readbuf 451 + word * tdep->wordsize), len, reg); 452 word++; 453 } 454 } 455 if (writebuf) 456 { 457 /* GCC screwed up. The last register isn't "left" aligned. 458 Need to extract the least significant part of each 459 register and then store that. */ 460 /* Transfer any full words. */ 461 int word = 0; 462 while (1) 463 { 464 ULONGEST reg; 465 int len = TYPE_LENGTH (type) - word * tdep->wordsize; 466 if (len <= 0) 467 break; 468 if (len > tdep->wordsize) 469 len = tdep->wordsize; 470 reg = extract_unsigned_integer (((const bfd_byte *) writebuf 471 + word * tdep->wordsize), len); 472 regcache_cooked_write_unsigned (regcache, 473 tdep->ppc_gp0_regnum + 3 + word, 474 reg); 475 word++; 476 } 477 } 478 return RETURN_VALUE_REGISTER_CONVENTION; 479 } 480 if (TYPE_LENGTH (type) <= 8) 481 { 482 if (readbuf) 483 { 484 /* This matches SVr4 PPC, it does not match GCC. */ 485 /* The value is right-padded to 8 bytes and then loaded, as 486 two "words", into r3/r4. */ 487 char regvals[MAX_REGISTER_SIZE * 2]; 488 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, 489 regvals + 0 * tdep->wordsize); 490 if (TYPE_LENGTH (type) > tdep->wordsize) 491 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, 492 regvals + 1 * tdep->wordsize); 493 memcpy (readbuf, regvals, TYPE_LENGTH (type)); 494 } 495 if (writebuf) 496 { 497 /* This matches SVr4 PPC, it does not match GCC. */ 498 /* The value is padded out to 8 bytes and then loaded, as 499 two "words" into r3/r4. */ 500 char regvals[MAX_REGISTER_SIZE * 2]; 501 memset (regvals, 0, sizeof regvals); 502 memcpy (regvals, writebuf, TYPE_LENGTH (type)); 503 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, 504 regvals + 0 * tdep->wordsize); 505 if (TYPE_LENGTH (type) > tdep->wordsize) 506 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, 507 regvals + 1 * tdep->wordsize); 508 } 509 return RETURN_VALUE_REGISTER_CONVENTION; 510 } 511 return RETURN_VALUE_STRUCT_CONVENTION; 512} 513 514enum return_value_convention 515ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, 516 struct regcache *regcache, void *readbuf, 517 const void *writebuf) 518{ 519 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, 520 writebuf, 0); 521} 522 523enum return_value_convention 524ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, 525 struct type *valtype, 526 struct regcache *regcache, 527 void *readbuf, const void *writebuf) 528{ 529 return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, 530 writebuf, 1); 531} 532 533/* Pass the arguments in either registers, or in the stack. Using the 534 ppc 64 bit SysV ABI. 535 536 This implements a dumbed down version of the ABI. It always writes 537 values to memory, GPR and FPR, even when not necessary. Doing this 538 greatly simplifies the logic. */ 539 540CORE_ADDR 541ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, 542 struct regcache *regcache, CORE_ADDR bp_addr, 543 int nargs, struct value **args, CORE_ADDR sp, 544 int struct_return, CORE_ADDR struct_addr) 545{ 546 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 547 /* By this stage in the proceedings, SP has been decremented by "red 548 zone size" + "struct return size". Fetch the stack-pointer from 549 before this and use that as the BACK_CHAIN. */ 550 const CORE_ADDR back_chain = read_sp (); 551 /* See for-loop comment below. */ 552 int write_pass; 553 /* Size of the Altivec's vector parameter region, the final value is 554 computed in the for-loop below. */ 555 LONGEST vparam_size = 0; 556 /* Size of the general parameter region, the final value is computed 557 in the for-loop below. */ 558 LONGEST gparam_size = 0; 559 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the 560 calls to align_up(), align_down(), etc. because this makes it 561 easier to reuse this code (in a copy/paste sense) in the future, 562 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes 563 at some point makes it easier to verify that this function is 564 correct without having to do a non-local analysis to figure out 565 the possible values of tdep->wordsize. */ 566 gdb_assert (tdep->wordsize == 8); 567 568 /* Go through the argument list twice. 569 570 Pass 1: Compute the function call's stack space and register 571 requirements. 572 573 Pass 2: Replay the same computation but this time also write the 574 values out to the target. */ 575 576 for (write_pass = 0; write_pass < 2; write_pass++) 577 { 578 int argno; 579 /* Next available floating point register for float and double 580 arguments. */ 581 int freg = 1; 582 /* Next available general register for non-vector (but possibly 583 float) arguments. */ 584 int greg = 3; 585 /* Next available vector register for vector arguments. */ 586 int vreg = 2; 587 /* The address, at which the next general purpose parameter 588 (integer, struct, float, ...) should be saved. */ 589 CORE_ADDR gparam; 590 /* Address, at which the next Altivec vector parameter should be 591 saved. */ 592 CORE_ADDR vparam; 593 594 if (!write_pass) 595 { 596 /* During the first pass, GPARAM and VPARAM are more like 597 offsets (start address zero) than addresses. That way 598 the accumulate the total stack space each region 599 requires. */ 600 gparam = 0; 601 vparam = 0; 602 } 603 else 604 { 605 /* Decrement the stack pointer making space for the Altivec 606 and general on-stack parameters. Set vparam and gparam 607 to their corresponding regions. */ 608 vparam = align_down (sp - vparam_size, 16); 609 gparam = align_down (vparam - gparam_size, 16); 610 /* Add in space for the TOC, link editor double word, 611 compiler double word, LR save area, CR save area. */ 612 sp = align_down (gparam - 48, 16); 613 } 614 615 /* If the function is returning a `struct', then there is an 616 extra hidden parameter (which will be passed in r3) 617 containing the address of that struct.. In that case we 618 should advance one word and start from r4 register to copy 619 parameters. This also consumes one on-stack parameter slot. */ 620 if (struct_return) 621 { 622 if (write_pass) 623 regcache_cooked_write_signed (regcache, 624 tdep->ppc_gp0_regnum + greg, 625 struct_addr); 626 greg++; 627 gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); 628 } 629 630 for (argno = 0; argno < nargs; argno++) 631 { 632 struct value *arg = args[argno]; 633 struct type *type = check_typedef (VALUE_TYPE (arg)); 634 char *val = VALUE_CONTENTS (arg); 635 if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) 636 { 637 /* Floats and Doubles go in f1 .. f13. They also 638 consume a left aligned GREG,, and can end up in 639 memory. */ 640 if (write_pass) 641 { 642 if (ppc_floating_point_unit_p (current_gdbarch) 643 && freg <= 13) 644 { 645 char regval[MAX_REGISTER_SIZE]; 646 struct type *regtype = register_type (gdbarch, 647 FP0_REGNUM); 648 convert_typed_floating (val, type, regval, regtype); 649 regcache_cooked_write (regcache, FP0_REGNUM + freg, 650 regval); 651 } 652 if (greg <= 10) 653 { 654 /* The ABI states "Single precision floating 655 point values are mapped to the first word in 656 a single doubleword" and "... floating point 657 values mapped to the first eight doublewords 658 of the parameter save area are also passed in 659 general registers"). 660 661 This code interprets that to mean: store it, 662 left aligned, in the general register. */ 663 char regval[MAX_REGISTER_SIZE]; 664 memset (regval, 0, sizeof regval); 665 memcpy (regval, val, TYPE_LENGTH (type)); 666 regcache_cooked_write (regcache, 667 tdep->ppc_gp0_regnum + greg, 668 regval); 669 } 670 write_memory (gparam, val, TYPE_LENGTH (type)); 671 } 672 /* Always consume parameter stack space. */ 673 freg++; 674 greg++; 675 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); 676 } 677 else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) 678 && TYPE_CODE (type) == TYPE_CODE_ARRAY 679 && tdep->ppc_vr0_regnum >= 0) 680 { 681 /* In the Altivec ABI, vectors go in the vector 682 registers v2 .. v13, or when that runs out, a vector 683 annex which goes above all the normal parameters. 684 NOTE: cagney/2003-09-21: This is a guess based on the 685 PowerOpen Altivec ABI. */ 686 if (vreg <= 13) 687 { 688 if (write_pass) 689 regcache_cooked_write (regcache, 690 tdep->ppc_vr0_regnum + vreg, val); 691 vreg++; 692 } 693 else 694 { 695 if (write_pass) 696 write_memory (vparam, val, TYPE_LENGTH (type)); 697 vparam = align_up (vparam + TYPE_LENGTH (type), 16); 698 } 699 } 700 else if ((TYPE_CODE (type) == TYPE_CODE_INT 701 || TYPE_CODE (type) == TYPE_CODE_ENUM) 702 && TYPE_LENGTH (type) <= 8) 703 { 704 /* Scalars get sign[un]extended and go in gpr3 .. gpr10. 705 They can also end up in memory. */ 706 if (write_pass) 707 { 708 /* Sign extend the value, then store it unsigned. */ 709 ULONGEST word = unpack_long (type, val); 710 if (greg <= 10) 711 regcache_cooked_write_unsigned (regcache, 712 tdep->ppc_gp0_regnum + 713 greg, word); 714 write_memory_unsigned_integer (gparam, tdep->wordsize, 715 word); 716 } 717 greg++; 718 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); 719 } 720 else 721 { 722 int byte; 723 for (byte = 0; byte < TYPE_LENGTH (type); 724 byte += tdep->wordsize) 725 { 726 if (write_pass && greg <= 10) 727 { 728 char regval[MAX_REGISTER_SIZE]; 729 int len = TYPE_LENGTH (type) - byte; 730 if (len > tdep->wordsize) 731 len = tdep->wordsize; 732 memset (regval, 0, sizeof regval); 733 /* WARNING: cagney/2003-09-21: As best I can 734 tell, the ABI specifies that the value should 735 be left aligned. Unfortunately, GCC doesn't 736 do this - it instead right aligns even sized 737 values and puts odd sized values on the 738 stack. Work around that by putting both a 739 left and right aligned value into the 740 register (hopefully no one notices :-^). 741 Arrrgh! */ 742 /* Left aligned (8 byte values such as pointers 743 fill the buffer). */ 744 memcpy (regval, val + byte, len); 745 /* Right aligned (but only if even). */ 746 if (len == 1 || len == 2 || len == 4) 747 memcpy (regval + tdep->wordsize - len, 748 val + byte, len); 749 regcache_cooked_write (regcache, greg, regval); 750 } 751 greg++; 752 } 753 if (write_pass) 754 /* WARNING: cagney/2003-09-21: Strictly speaking, this 755 isn't necessary, unfortunately, GCC appears to get 756 "struct convention" parameter passing wrong putting 757 odd sized structures in memory instead of in a 758 register. Work around this by always writing the 759 value to memory. Fortunately, doing this 760 simplifies the code. */ 761 write_memory (gparam, val, TYPE_LENGTH (type)); 762 /* Always consume parameter stack space. */ 763 gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); 764 } 765 } 766 767 if (!write_pass) 768 { 769 /* Save the true region sizes ready for the second pass. */ 770 vparam_size = vparam; 771 /* Make certain that the general parameter save area is at 772 least the minimum 8 registers (or doublewords) in size. */ 773 if (greg < 8) 774 gparam_size = 8 * tdep->wordsize; 775 else 776 gparam_size = gparam; 777 } 778 } 779 780 /* Update %sp. */ 781 regcache_cooked_write_signed (regcache, SP_REGNUM, sp); 782 783 /* Write the backchain (it occupies WORDSIZED bytes). */ 784 write_memory_signed_integer (sp, tdep->wordsize, back_chain); 785 786 /* Point the inferior function call's return address at the dummy's 787 breakpoint. */ 788 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); 789 790 /* Find a value for the TOC register. Every symbol should have both 791 ".FN" and "FN" in the minimal symbol table. "FN" points at the 792 FN's descriptor, while ".FN" points at the entry point (which 793 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the 794 FN's descriptor address (while at the same time being careful to 795 find "FN" in the same object file as ".FN"). */ 796 { 797 /* Find the minimal symbol that corresponds to FUNC_ADDR (should 798 have the name ".FN"). */ 799 struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr); 800 if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.') 801 { 802 /* Get the section that contains FUNC_ADR. Need this for the 803 "objfile" that it contains. */ 804 struct obj_section *dot_fn_section = find_pc_section (func_addr); 805 if (dot_fn_section != NULL && dot_fn_section->objfile != NULL) 806 { 807 /* Now find the corresponding "FN" (dropping ".") minimal 808 symbol's address. Only look for the minimal symbol in 809 ".FN"'s object file - avoids problems when two object 810 files (i.e., shared libraries) contain a minimal symbol 811 with the same name. */ 812 struct minimal_symbol *fn = 813 lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL, 814 dot_fn_section->objfile); 815 if (fn != NULL) 816 { 817 /* Got the address of that descriptor. The TOC is the 818 second double word. */ 819 CORE_ADDR toc = 820 read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn) 821 + tdep->wordsize, 822 tdep->wordsize); 823 regcache_cooked_write_unsigned (regcache, 824 tdep->ppc_gp0_regnum + 2, toc); 825 } 826 } 827 } 828 } 829 830 return sp; 831} 832 833 834/* The 64 bit ABI retun value convention. 835 836 Return non-zero if the return-value is stored in a register, return 837 0 if the return-value is instead stored on the stack (a.k.a., 838 struct return convention). 839 840 For a return-value stored in a register: when WRITEBUF is non-NULL, 841 copy the buffer to the corresponding register return-value location 842 location; when READBUF is non-NULL, fill the buffer from the 843 corresponding register return-value location. */ 844enum return_value_convention 845ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, 846 struct regcache *regcache, void *readbuf, 847 const void *writebuf) 848{ 849 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); 850 /* Floats and doubles in F1. */ 851 if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8) 852 { 853 char regval[MAX_REGISTER_SIZE]; 854 struct type *regtype = register_type (gdbarch, FP0_REGNUM); 855 if (writebuf != NULL) 856 { 857 convert_typed_floating (writebuf, valtype, regval, regtype); 858 regcache_cooked_write (regcache, FP0_REGNUM + 1, regval); 859 } 860 if (readbuf != NULL) 861 { 862 regcache_cooked_read (regcache, FP0_REGNUM + 1, regval); 863 convert_typed_floating (regval, regtype, readbuf, valtype); 864 } 865 return RETURN_VALUE_REGISTER_CONVENTION; 866 } 867 if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8) 868 { 869 /* Integers in r3. */ 870 if (writebuf != NULL) 871 { 872 /* Be careful to sign extend the value. */ 873 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, 874 unpack_long (valtype, writebuf)); 875 } 876 if (readbuf != NULL) 877 { 878 /* Extract the integer from r3. Since this is truncating the 879 value, there isn't a sign extension problem. */ 880 ULONGEST regval; 881 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, 882 ®val); 883 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); 884 } 885 return RETURN_VALUE_REGISTER_CONVENTION; 886 } 887 /* All pointers live in r3. */ 888 if (TYPE_CODE (valtype) == TYPE_CODE_PTR) 889 { 890 /* All pointers live in r3. */ 891 if (writebuf != NULL) 892 regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); 893 if (readbuf != NULL) 894 regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); 895 return RETURN_VALUE_REGISTER_CONVENTION; 896 } 897 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY 898 && TYPE_LENGTH (valtype) <= 8 899 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT 900 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1) 901 { 902 /* Small character arrays are returned, right justified, in r3. */ 903 int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3) 904 - TYPE_LENGTH (valtype)); 905 if (writebuf != NULL) 906 regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3, 907 offset, TYPE_LENGTH (valtype), writebuf); 908 if (readbuf != NULL) 909 regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3, 910 offset, TYPE_LENGTH (valtype), readbuf); 911 return RETURN_VALUE_REGISTER_CONVENTION; 912 } 913 /* Big floating point values get stored in adjacent floating 914 point registers. */ 915 if (TYPE_CODE (valtype) == TYPE_CODE_FLT 916 && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32)) 917 { 918 if (writebuf || readbuf != NULL) 919 { 920 int i; 921 for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++) 922 { 923 if (writebuf != NULL) 924 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, 925 (const bfd_byte *) writebuf + i * 8); 926 if (readbuf != NULL) 927 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, 928 (bfd_byte *) readbuf + i * 8); 929 } 930 } 931 return RETURN_VALUE_REGISTER_CONVENTION; 932 } 933 /* Complex values get returned in f1:f2, need to convert. */ 934 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX 935 && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16)) 936 { 937 if (regcache != NULL) 938 { 939 int i; 940 for (i = 0; i < 2; i++) 941 { 942 char regval[MAX_REGISTER_SIZE]; 943 struct type *regtype = 944 register_type (current_gdbarch, FP0_REGNUM); 945 if (writebuf != NULL) 946 { 947 convert_typed_floating ((const bfd_byte *) writebuf + 948 i * (TYPE_LENGTH (valtype) / 2), 949 valtype, regval, regtype); 950 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, 951 regval); 952 } 953 if (readbuf != NULL) 954 { 955 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, regval); 956 convert_typed_floating (regval, regtype, 957 (bfd_byte *) readbuf + 958 i * (TYPE_LENGTH (valtype) / 2), 959 valtype); 960 } 961 } 962 } 963 return RETURN_VALUE_REGISTER_CONVENTION; 964 } 965 /* Big complex values get stored in f1:f4. */ 966 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32) 967 { 968 if (regcache != NULL) 969 { 970 int i; 971 for (i = 0; i < 4; i++) 972 { 973 if (writebuf != NULL) 974 regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, 975 (const bfd_byte *) writebuf + i * 8); 976 if (readbuf != NULL) 977 regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, 978 (bfd_byte *) readbuf + i * 8); 979 } 980 } 981 return RETURN_VALUE_REGISTER_CONVENTION; 982 } 983 return RETURN_VALUE_STRUCT_CONVENTION; 984} 985 986CORE_ADDR 987ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, 988 CORE_ADDR bpaddr) 989{ 990 /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at 991 a function-descriptor while the corresponding minimal-symbol 992 ".FN" should point at the entry point. Consequently, a command 993 like "break FN" applied to an object file with only minimal 994 symbols, will insert the breakpoint into the descriptor at "FN" 995 and not the function at ".FN". Avoid this confusion by adjusting 996 any attempt to set a descriptor breakpoint into a corresponding 997 function breakpoint. Note that GDB warns the user when this 998 adjustment is applied - that's ok as otherwise the user will have 999 no way of knowing why their breakpoint at "FN" resulted in the 1000 program stopping at ".FN". */ 1001 return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target); 1002} 1003