1/*- 2 * Copyright (c) 2012 3 * Ben Gray <bgray@freebsd.org>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD$"); 29 30/* 31 * SMSC LAN9xxx devices (http://www.smsc.com/) 32 * 33 * The LAN9500 & LAN9500A devices are stand-alone USB to Ethernet chips that 34 * support USB 2.0 and 10/100 Mbps Ethernet. 35 * 36 * The LAN951x devices are an integrated USB hub and USB to Ethernet adapter. 37 * The driver only covers the Ethernet part, the standard USB hub driver 38 * supports the hub part. 39 * 40 * This driver is closely modelled on the Linux driver written and copyrighted 41 * by SMSC. 42 * 43 * 44 * 45 * 46 * H/W TCP & UDP Checksum Offloading 47 * --------------------------------- 48 * The chip supports both tx and rx offloading of UDP & TCP checksums, this 49 * feature can be dynamically enabled/disabled. 50 * 51 * RX checksuming is performed across bytes after the IPv4 header to the end of 52 * the Ethernet frame, this means if the frame is padded with non-zero values 53 * the H/W checksum will be incorrect, however the rx code compensates for this. 54 * 55 * TX checksuming is more complicated, the device requires a special header to 56 * be prefixed onto the start of the frame which indicates the start and end 57 * positions of the UDP or TCP frame. This requires the driver to manually 58 * go through the packet data and decode the headers prior to sending. 59 * On Linux they generally provide cues to the location of the csum and the 60 * area to calculate it over, on FreeBSD we seem to have to do it all ourselves, 61 * hence this is not as optimal and therefore h/w tX checksum is currently not 62 * implemented. 63 * 64 */ 65#include <sys/stdint.h> 66#include <sys/stddef.h> 67#include <sys/param.h> 68#include <sys/queue.h> 69#include <sys/types.h> 70#include <sys/systm.h> 71#include <sys/kernel.h> 72#include <sys/bus.h> 73#include <sys/module.h> 74#include <sys/lock.h> 75#include <sys/mutex.h> 76#include <sys/condvar.h> 77#include <sys/sysctl.h> 78#include <sys/sx.h> 79#include <sys/unistd.h> 80#include <sys/callout.h> 81#include <sys/malloc.h> 82#include <sys/priv.h> 83#include <sys/random.h> 84 85#include "opt_platform.h" 86 87#ifdef FDT 88#include <dev/fdt/fdt_common.h> 89#include <dev/ofw/ofw_bus.h> 90#include <dev/ofw/ofw_bus_subr.h> 91#endif 92 93#include <dev/usb/usb.h> 94#include <dev/usb/usbdi.h> 95#include <dev/usb/usbdi_util.h> 96#include "usbdevs.h" 97 98#define USB_DEBUG_VAR smsc_debug 99#include <dev/usb/usb_debug.h> 100#include <dev/usb/usb_process.h> 101 102#include <dev/usb/net/usb_ethernet.h> 103 104#include <dev/usb/net/if_smscreg.h> 105 106#ifdef USB_DEBUG 107static int smsc_debug = 0; 108 109SYSCTL_NODE(_hw_usb, OID_AUTO, smsc, CTLFLAG_RW, 0, "USB smsc"); 110SYSCTL_INT(_hw_usb_smsc, OID_AUTO, debug, CTLFLAG_RW, &smsc_debug, 0, 111 "Debug level"); 112#endif 113 114/* 115 * Various supported device vendors/products. 116 */ 117static const struct usb_device_id smsc_devs[] = { 118#define SMSC_DEV(p,i) { USB_VPI(USB_VENDOR_SMC2, USB_PRODUCT_SMC2_##p, i) } 119 SMSC_DEV(LAN9514_ETH, 0), 120#undef SMSC_DEV 121}; 122 123 124#ifdef USB_DEBUG 125#define smsc_dbg_printf(sc, fmt, args...) \ 126 do { \ 127 if (smsc_debug > 0) \ 128 device_printf((sc)->sc_ue.ue_dev, "debug: " fmt, ##args); \ 129 } while(0) 130#else 131#define smsc_dbg_printf(sc, fmt, args...) 132#endif 133 134#define smsc_warn_printf(sc, fmt, args...) \ 135 device_printf((sc)->sc_ue.ue_dev, "warning: " fmt, ##args) 136 137#define smsc_err_printf(sc, fmt, args...) \ 138 device_printf((sc)->sc_ue.ue_dev, "error: " fmt, ##args) 139 140 141#define ETHER_IS_ZERO(addr) \ 142 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5])) 143 144#define ETHER_IS_VALID(addr) \ 145 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr)) 146 147static device_probe_t smsc_probe; 148static device_attach_t smsc_attach; 149static device_detach_t smsc_detach; 150 151static usb_callback_t smsc_bulk_read_callback; 152static usb_callback_t smsc_bulk_write_callback; 153 154static miibus_readreg_t smsc_miibus_readreg; 155static miibus_writereg_t smsc_miibus_writereg; 156static miibus_statchg_t smsc_miibus_statchg; 157 158#if __FreeBSD_version > 1000000 159static int smsc_attach_post_sub(struct usb_ether *ue); 160#endif 161static uether_fn_t smsc_attach_post; 162static uether_fn_t smsc_init; 163static uether_fn_t smsc_stop; 164static uether_fn_t smsc_start; 165static uether_fn_t smsc_tick; 166static uether_fn_t smsc_setmulti; 167static uether_fn_t smsc_setpromisc; 168 169static int smsc_ifmedia_upd(struct ifnet *); 170static void smsc_ifmedia_sts(struct ifnet *, struct ifmediareq *); 171 172static int smsc_chip_init(struct smsc_softc *sc); 173static int smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data); 174 175static const struct usb_config smsc_config[SMSC_N_TRANSFER] = { 176 177 [SMSC_BULK_DT_WR] = { 178 .type = UE_BULK, 179 .endpoint = UE_ADDR_ANY, 180 .direction = UE_DIR_OUT, 181 .frames = 16, 182 .bufsize = 16 * (MCLBYTES + 16), 183 .flags = {.pipe_bof = 1,.force_short_xfer = 1,}, 184 .callback = smsc_bulk_write_callback, 185 .timeout = 10000, /* 10 seconds */ 186 }, 187 188 [SMSC_BULK_DT_RD] = { 189 .type = UE_BULK, 190 .endpoint = UE_ADDR_ANY, 191 .direction = UE_DIR_IN, 192 .bufsize = 20480, /* bytes */ 193 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 194 .callback = smsc_bulk_read_callback, 195 .timeout = 0, /* no timeout */ 196 }, 197 198 /* The SMSC chip supports an interrupt endpoints, however they aren't 199 * needed as we poll on the MII status. 200 */ 201}; 202 203static const struct usb_ether_methods smsc_ue_methods = { 204 .ue_attach_post = smsc_attach_post, 205#if __FreeBSD_version > 1000000 206 .ue_attach_post_sub = smsc_attach_post_sub, 207#endif 208 .ue_start = smsc_start, 209 .ue_ioctl = smsc_ioctl, 210 .ue_init = smsc_init, 211 .ue_stop = smsc_stop, 212 .ue_tick = smsc_tick, 213 .ue_setmulti = smsc_setmulti, 214 .ue_setpromisc = smsc_setpromisc, 215 .ue_mii_upd = smsc_ifmedia_upd, 216 .ue_mii_sts = smsc_ifmedia_sts, 217}; 218 219/** 220 * smsc_read_reg - Reads a 32-bit register on the device 221 * @sc: driver soft context 222 * @off: offset of the register 223 * @data: pointer a value that will be populated with the register value 224 * 225 * LOCKING: 226 * The device lock must be held before calling this function. 227 * 228 * RETURNS: 229 * 0 on success, a USB_ERR_?? error code on failure. 230 */ 231static int 232smsc_read_reg(struct smsc_softc *sc, uint32_t off, uint32_t *data) 233{ 234 struct usb_device_request req; 235 uint32_t buf; 236 usb_error_t err; 237 238 SMSC_LOCK_ASSERT(sc, MA_OWNED); 239 240 req.bmRequestType = UT_READ_VENDOR_DEVICE; 241 req.bRequest = SMSC_UR_READ_REG; 242 USETW(req.wValue, 0); 243 USETW(req.wIndex, off); 244 USETW(req.wLength, 4); 245 246 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 247 if (err != 0) 248 smsc_warn_printf(sc, "Failed to read register 0x%0x\n", off); 249 250 *data = le32toh(buf); 251 252 return (err); 253} 254 255/** 256 * smsc_write_reg - Writes a 32-bit register on the device 257 * @sc: driver soft context 258 * @off: offset of the register 259 * @data: the 32-bit value to write into the register 260 * 261 * LOCKING: 262 * The device lock must be held before calling this function. 263 * 264 * RETURNS: 265 * 0 on success, a USB_ERR_?? error code on failure. 266 */ 267static int 268smsc_write_reg(struct smsc_softc *sc, uint32_t off, uint32_t data) 269{ 270 struct usb_device_request req; 271 uint32_t buf; 272 usb_error_t err; 273 274 SMSC_LOCK_ASSERT(sc, MA_OWNED); 275 276 buf = htole32(data); 277 278 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 279 req.bRequest = SMSC_UR_WRITE_REG; 280 USETW(req.wValue, 0); 281 USETW(req.wIndex, off); 282 USETW(req.wLength, 4); 283 284 err = uether_do_request(&sc->sc_ue, &req, &buf, 1000); 285 if (err != 0) 286 smsc_warn_printf(sc, "Failed to write register 0x%0x\n", off); 287 288 return (err); 289} 290 291/** 292 * smsc_wait_for_bits - Polls on a register value until bits are cleared 293 * @sc: soft context 294 * @reg: offset of the register 295 * @bits: if the bits are clear the function returns 296 * 297 * LOCKING: 298 * The device lock must be held before calling this function. 299 * 300 * RETURNS: 301 * 0 on success, or a USB_ERR_?? error code on failure. 302 */ 303static int 304smsc_wait_for_bits(struct smsc_softc *sc, uint32_t reg, uint32_t bits) 305{ 306 usb_ticks_t start_ticks; 307 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 308 uint32_t val; 309 int err; 310 311 SMSC_LOCK_ASSERT(sc, MA_OWNED); 312 313 start_ticks = (usb_ticks_t)ticks; 314 do { 315 if ((err = smsc_read_reg(sc, reg, &val)) != 0) 316 return (err); 317 if (!(val & bits)) 318 return (0); 319 320 uether_pause(&sc->sc_ue, hz / 100); 321 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 322 323 return (USB_ERR_TIMEOUT); 324} 325 326/** 327 * smsc_eeprom_read - Reads the attached EEPROM 328 * @sc: soft context 329 * @off: the eeprom address offset 330 * @buf: stores the bytes 331 * @buflen: the number of bytes to read 332 * 333 * Simply reads bytes from an attached eeprom. 334 * 335 * LOCKING: 336 * The function takes and releases the device lock if it is not already held. 337 * 338 * RETURNS: 339 * 0 on success, or a USB_ERR_?? error code on failure. 340 */ 341static int 342smsc_eeprom_read(struct smsc_softc *sc, uint16_t off, uint8_t *buf, uint16_t buflen) 343{ 344 usb_ticks_t start_ticks; 345 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 346 int err; 347 int locked; 348 uint32_t val; 349 uint16_t i; 350 351 locked = mtx_owned(&sc->sc_mtx); 352 if (!locked) 353 SMSC_LOCK(sc); 354 355 err = smsc_wait_for_bits(sc, SMSC_EEPROM_CMD, SMSC_EEPROM_CMD_BUSY); 356 if (err != 0) { 357 smsc_warn_printf(sc, "eeprom busy, failed to read data\n"); 358 goto done; 359 } 360 361 /* start reading the bytes, one at a time */ 362 for (i = 0; i < buflen; i++) { 363 364 val = SMSC_EEPROM_CMD_BUSY | (SMSC_EEPROM_CMD_ADDR_MASK & (off + i)); 365 if ((err = smsc_write_reg(sc, SMSC_EEPROM_CMD, val)) != 0) 366 goto done; 367 368 start_ticks = (usb_ticks_t)ticks; 369 do { 370 if ((err = smsc_read_reg(sc, SMSC_EEPROM_CMD, &val)) != 0) 371 goto done; 372 if (!(val & SMSC_EEPROM_CMD_BUSY) || (val & SMSC_EEPROM_CMD_TIMEOUT)) 373 break; 374 375 uether_pause(&sc->sc_ue, hz / 100); 376 } while (((usb_ticks_t)(ticks - start_ticks)) < max_ticks); 377 378 if (val & (SMSC_EEPROM_CMD_BUSY | SMSC_EEPROM_CMD_TIMEOUT)) { 379 smsc_warn_printf(sc, "eeprom command failed\n"); 380 err = USB_ERR_IOERROR; 381 break; 382 } 383 384 if ((err = smsc_read_reg(sc, SMSC_EEPROM_DATA, &val)) != 0) 385 goto done; 386 387 buf[i] = (val & 0xff); 388 } 389 390done: 391 if (!locked) 392 SMSC_UNLOCK(sc); 393 394 return (err); 395} 396 397/** 398 * smsc_miibus_readreg - Reads a MII/MDIO register 399 * @dev: usb ether device 400 * @phy: the number of phy reading from 401 * @reg: the register address 402 * 403 * Attempts to read a phy register over the MII bus. 404 * 405 * LOCKING: 406 * Takes and releases the device mutex lock if not already held. 407 * 408 * RETURNS: 409 * Returns the 16-bits read from the MII register, if this function fails 0 410 * is returned. 411 */ 412static int 413smsc_miibus_readreg(device_t dev, int phy, int reg) 414{ 415 struct smsc_softc *sc = device_get_softc(dev); 416 int locked; 417 uint32_t addr; 418 uint32_t val = 0; 419 420 locked = mtx_owned(&sc->sc_mtx); 421 if (!locked) 422 SMSC_LOCK(sc); 423 424 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 425 smsc_warn_printf(sc, "MII is busy\n"); 426 goto done; 427 } 428 429 addr = (phy << 11) | (reg << 6) | SMSC_MII_READ; 430 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 431 432 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 433 smsc_warn_printf(sc, "MII read timeout\n"); 434 435 smsc_read_reg(sc, SMSC_MII_DATA, &val); 436 val = le32toh(val); 437 438done: 439 if (!locked) 440 SMSC_UNLOCK(sc); 441 442 return (val & 0xFFFF); 443} 444 445/** 446 * smsc_miibus_writereg - Writes a MII/MDIO register 447 * @dev: usb ether device 448 * @phy: the number of phy writing to 449 * @reg: the register address 450 * @val: the value to write 451 * 452 * Attempts to write a phy register over the MII bus. 453 * 454 * LOCKING: 455 * Takes and releases the device mutex lock if not already held. 456 * 457 * RETURNS: 458 * Always returns 0 regardless of success or failure. 459 */ 460static int 461smsc_miibus_writereg(device_t dev, int phy, int reg, int val) 462{ 463 struct smsc_softc *sc = device_get_softc(dev); 464 int locked; 465 uint32_t addr; 466 467 if (sc->sc_phyno != phy) 468 return (0); 469 470 locked = mtx_owned(&sc->sc_mtx); 471 if (!locked) 472 SMSC_LOCK(sc); 473 474 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) { 475 smsc_warn_printf(sc, "MII is busy\n"); 476 goto done; 477 } 478 479 val = htole32(val); 480 smsc_write_reg(sc, SMSC_MII_DATA, val); 481 482 addr = (phy << 11) | (reg << 6) | SMSC_MII_WRITE; 483 smsc_write_reg(sc, SMSC_MII_ADDR, addr); 484 485 if (smsc_wait_for_bits(sc, SMSC_MII_ADDR, SMSC_MII_BUSY) != 0) 486 smsc_warn_printf(sc, "MII write timeout\n"); 487 488done: 489 if (!locked) 490 SMSC_UNLOCK(sc); 491 return (0); 492} 493 494 495 496/** 497 * smsc_miibus_statchg - Called to detect phy status change 498 * @dev: usb ether device 499 * 500 * This function is called periodically by the system to poll for status 501 * changes of the link. 502 * 503 * LOCKING: 504 * Takes and releases the device mutex lock if not already held. 505 */ 506static void 507smsc_miibus_statchg(device_t dev) 508{ 509 struct smsc_softc *sc = device_get_softc(dev); 510 struct mii_data *mii = uether_getmii(&sc->sc_ue); 511 struct ifnet *ifp; 512 int locked; 513 int err; 514 uint32_t flow; 515 uint32_t afc_cfg; 516 517 locked = mtx_owned(&sc->sc_mtx); 518 if (!locked) 519 SMSC_LOCK(sc); 520 521 ifp = uether_getifp(&sc->sc_ue); 522 if (mii == NULL || ifp == NULL || 523 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 524 goto done; 525 526 /* Use the MII status to determine link status */ 527 sc->sc_flags &= ~SMSC_FLAG_LINK; 528 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) == 529 (IFM_ACTIVE | IFM_AVALID)) { 530 switch (IFM_SUBTYPE(mii->mii_media_active)) { 531 case IFM_10_T: 532 case IFM_100_TX: 533 sc->sc_flags |= SMSC_FLAG_LINK; 534 break; 535 case IFM_1000_T: 536 /* Gigabit ethernet not supported by chipset */ 537 break; 538 default: 539 break; 540 } 541 } 542 543 /* Lost link, do nothing. */ 544 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 545 smsc_dbg_printf(sc, "link flag not set\n"); 546 goto done; 547 } 548 549 err = smsc_read_reg(sc, SMSC_AFC_CFG, &afc_cfg); 550 if (err) { 551 smsc_warn_printf(sc, "failed to read initial AFC_CFG, error %d\n", err); 552 goto done; 553 } 554 555 /* Enable/disable full duplex operation and TX/RX pause */ 556 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0) { 557 smsc_dbg_printf(sc, "full duplex operation\n"); 558 sc->sc_mac_csr &= ~SMSC_MAC_CSR_RCVOWN; 559 sc->sc_mac_csr |= SMSC_MAC_CSR_FDPX; 560 561 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE) != 0) 562 flow = 0xffff0002; 563 else 564 flow = 0; 565 566 if ((IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE) != 0) 567 afc_cfg |= 0xf; 568 else 569 afc_cfg &= ~0xf; 570 571 } else { 572 smsc_dbg_printf(sc, "half duplex operation\n"); 573 sc->sc_mac_csr &= ~SMSC_MAC_CSR_FDPX; 574 sc->sc_mac_csr |= SMSC_MAC_CSR_RCVOWN; 575 576 flow = 0; 577 afc_cfg |= 0xf; 578 } 579 580 err = smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 581 err += smsc_write_reg(sc, SMSC_FLOW, flow); 582 err += smsc_write_reg(sc, SMSC_AFC_CFG, afc_cfg); 583 if (err) 584 smsc_warn_printf(sc, "media change failed, error %d\n", err); 585 586done: 587 if (!locked) 588 SMSC_UNLOCK(sc); 589} 590 591/** 592 * smsc_ifmedia_upd - Set media options 593 * @ifp: interface pointer 594 * 595 * Basically boilerplate code that simply calls the mii functions to set the 596 * media options. 597 * 598 * LOCKING: 599 * The device lock must be held before this function is called. 600 * 601 * RETURNS: 602 * Returns 0 on success or a negative error code. 603 */ 604static int 605smsc_ifmedia_upd(struct ifnet *ifp) 606{ 607 struct smsc_softc *sc = ifp->if_softc; 608 struct mii_data *mii = uether_getmii(&sc->sc_ue); 609 struct mii_softc *miisc; 610 int err; 611 612 SMSC_LOCK_ASSERT(sc, MA_OWNED); 613 614 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) 615 PHY_RESET(miisc); 616 err = mii_mediachg(mii); 617 return (err); 618} 619 620/** 621 * smsc_ifmedia_sts - Report current media status 622 * @ifp: inet interface pointer 623 * @ifmr: interface media request 624 * 625 * Basically boilerplate code that simply calls the mii functions to get the 626 * media status. 627 * 628 * LOCKING: 629 * Internally takes and releases the device lock. 630 */ 631static void 632smsc_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 633{ 634 struct smsc_softc *sc = ifp->if_softc; 635 struct mii_data *mii = uether_getmii(&sc->sc_ue); 636 637 SMSC_LOCK(sc); 638 mii_pollstat(mii); 639 ifmr->ifm_active = mii->mii_media_active; 640 ifmr->ifm_status = mii->mii_media_status; 641 SMSC_UNLOCK(sc); 642} 643 644/** 645 * smsc_hash - Calculate the hash of a mac address 646 * @addr: The mac address to calculate the hash on 647 * 648 * This function is used when configuring a range of m'cast mac addresses to 649 * filter on. The hash of the mac address is put in the device's mac hash 650 * table. 651 * 652 * RETURNS: 653 * Returns a value from 0-63 value which is the hash of the mac address. 654 */ 655static inline uint32_t 656smsc_hash(uint8_t addr[ETHER_ADDR_LEN]) 657{ 658 return (ether_crc32_be(addr, ETHER_ADDR_LEN) >> 26) & 0x3f; 659} 660 661/** 662 * smsc_setmulti - Setup multicast 663 * @ue: usb ethernet device context 664 * 665 * Tells the device to either accept frames with a multicast mac address, a 666 * select group of m'cast mac addresses or just the devices mac address. 667 * 668 * LOCKING: 669 * Should be called with the SMSC lock held. 670 */ 671static void 672smsc_setmulti(struct usb_ether *ue) 673{ 674 struct smsc_softc *sc = uether_getsc(ue); 675 struct ifnet *ifp = uether_getifp(ue); 676 struct ifmultiaddr *ifma; 677 uint32_t hashtbl[2] = { 0, 0 }; 678 uint32_t hash; 679 680 SMSC_LOCK_ASSERT(sc, MA_OWNED); 681 682 if (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC)) { 683 smsc_dbg_printf(sc, "receive all multicast enabled\n"); 684 sc->sc_mac_csr |= SMSC_MAC_CSR_MCPAS; 685 sc->sc_mac_csr &= ~SMSC_MAC_CSR_HPFILT; 686 687 } else { 688 /* Take the lock of the mac address list before hashing each of them */ 689 if_maddr_rlock(ifp); 690 691 if (!TAILQ_EMPTY(&ifp->if_multiaddrs)) { 692 /* We are filtering on a set of address so calculate hashes of each 693 * of the address and set the corresponding bits in the register. 694 */ 695 sc->sc_mac_csr |= SMSC_MAC_CSR_HPFILT; 696 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_PRMS | SMSC_MAC_CSR_MCPAS); 697 698 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 699 if (ifma->ifma_addr->sa_family != AF_LINK) 700 continue; 701 702 hash = smsc_hash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 703 hashtbl[hash >> 5] |= 1 << (hash & 0x1F); 704 } 705 } else { 706 /* Only receive packets with destination set to our mac address */ 707 sc->sc_mac_csr &= ~(SMSC_MAC_CSR_MCPAS | SMSC_MAC_CSR_HPFILT); 708 } 709 710 if_maddr_runlock(ifp); 711 712 /* Debug */ 713 if (sc->sc_mac_csr & SMSC_MAC_CSR_HPFILT) 714 smsc_dbg_printf(sc, "receive select group of macs\n"); 715 else 716 smsc_dbg_printf(sc, "receive own packets only\n"); 717 } 718 719 /* Write the hash table and mac control registers */ 720 smsc_write_reg(sc, SMSC_HASHH, hashtbl[1]); 721 smsc_write_reg(sc, SMSC_HASHL, hashtbl[0]); 722 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 723} 724 725 726/** 727 * smsc_setpromisc - Enables/disables promiscuous mode 728 * @ue: usb ethernet device context 729 * 730 * LOCKING: 731 * Should be called with the SMSC lock held. 732 */ 733static void 734smsc_setpromisc(struct usb_ether *ue) 735{ 736 struct smsc_softc *sc = uether_getsc(ue); 737 struct ifnet *ifp = uether_getifp(ue); 738 739 smsc_dbg_printf(sc, "promiscuous mode %sabled\n", 740 (ifp->if_flags & IFF_PROMISC) ? "en" : "dis"); 741 742 SMSC_LOCK_ASSERT(sc, MA_OWNED); 743 744 if (ifp->if_flags & IFF_PROMISC) 745 sc->sc_mac_csr |= SMSC_MAC_CSR_PRMS; 746 else 747 sc->sc_mac_csr &= ~SMSC_MAC_CSR_PRMS; 748 749 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 750} 751 752 753/** 754 * smsc_sethwcsum - Enable or disable H/W UDP and TCP checksumming 755 * @sc: driver soft context 756 * 757 * LOCKING: 758 * Should be called with the SMSC lock held. 759 * 760 * RETURNS: 761 * Returns 0 on success or a negative error code. 762 */ 763static int smsc_sethwcsum(struct smsc_softc *sc) 764{ 765 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 766 uint32_t val; 767 int err; 768 769 if (!ifp) 770 return (-EIO); 771 772 SMSC_LOCK_ASSERT(sc, MA_OWNED); 773 774 err = smsc_read_reg(sc, SMSC_COE_CTRL, &val); 775 if (err != 0) { 776 smsc_warn_printf(sc, "failed to read SMSC_COE_CTRL (err=%d)\n", err); 777 return (err); 778 } 779 780 /* Enable/disable the Rx checksum */ 781 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_RXCSUM) 782 val |= SMSC_COE_CTRL_RX_EN; 783 else 784 val &= ~SMSC_COE_CTRL_RX_EN; 785 786 /* Enable/disable the Tx checksum (currently not supported) */ 787 if ((ifp->if_capabilities & ifp->if_capenable) & IFCAP_TXCSUM) 788 val |= SMSC_COE_CTRL_TX_EN; 789 else 790 val &= ~SMSC_COE_CTRL_TX_EN; 791 792 err = smsc_write_reg(sc, SMSC_COE_CTRL, val); 793 if (err != 0) { 794 smsc_warn_printf(sc, "failed to write SMSC_COE_CTRL (err=%d)\n", err); 795 return (err); 796 } 797 798 return (0); 799} 800 801 802/** 803 * smsc_setmacaddress - Sets the mac address in the device 804 * @sc: driver soft context 805 * @addr: pointer to array contain at least 6 bytes of the mac 806 * 807 * Writes the MAC address into the device, usually the MAC is programmed with 808 * values from the EEPROM. 809 * 810 * LOCKING: 811 * Should be called with the SMSC lock held. 812 * 813 * RETURNS: 814 * Returns 0 on success or a negative error code. 815 */ 816static int 817smsc_setmacaddress(struct smsc_softc *sc, const uint8_t *addr) 818{ 819 int err; 820 uint32_t val; 821 822 smsc_dbg_printf(sc, "setting mac address to %02x:%02x:%02x:%02x:%02x:%02x\n", 823 addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); 824 825 SMSC_LOCK_ASSERT(sc, MA_OWNED); 826 827 val = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; 828 if ((err = smsc_write_reg(sc, SMSC_MAC_ADDRL, val)) != 0) 829 goto done; 830 831 val = (addr[5] << 8) | addr[4]; 832 err = smsc_write_reg(sc, SMSC_MAC_ADDRH, val); 833 834done: 835 return (err); 836} 837 838/** 839 * smsc_reset - Reset the SMSC chip 840 * @sc: device soft context 841 * 842 * LOCKING: 843 * Should be called with the SMSC lock held. 844 */ 845static void 846smsc_reset(struct smsc_softc *sc) 847{ 848 struct usb_config_descriptor *cd; 849 usb_error_t err; 850 851 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev); 852 853 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx, 854 cd->bConfigurationValue); 855 if (err) 856 smsc_warn_printf(sc, "reset failed (ignored)\n"); 857 858 /* Wait a little while for the chip to get its brains in order. */ 859 uether_pause(&sc->sc_ue, hz / 100); 860 861 /* Reinitialize controller to achieve full reset. */ 862 smsc_chip_init(sc); 863} 864 865 866/** 867 * smsc_init - Initialises the LAN95xx chip 868 * @ue: USB ether interface 869 * 870 * Called when the interface is brought up (i.e. ifconfig ue0 up), this 871 * initialise the interface and the rx/tx pipes. 872 * 873 * LOCKING: 874 * Should be called with the SMSC lock held. 875 */ 876static void 877smsc_init(struct usb_ether *ue) 878{ 879 struct smsc_softc *sc = uether_getsc(ue); 880 struct ifnet *ifp = uether_getifp(ue); 881 882 SMSC_LOCK_ASSERT(sc, MA_OWNED); 883 884 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) 885 return; 886 887 /* Cancel pending I/O */ 888 smsc_stop(ue); 889 890#if __FreeBSD_version <= 1000000 891 /* On earlier versions this was the first place we could tell the system 892 * that we supported h/w csuming, however this is only called after the 893 * the interface has been brought up - not ideal. 894 */ 895 if (!(ifp->if_capabilities & IFCAP_RXCSUM)) { 896 ifp->if_capabilities |= IFCAP_RXCSUM; 897 ifp->if_capenable |= IFCAP_RXCSUM; 898 ifp->if_hwassist = 0; 899 } 900 901 /* TX checksuming is disabled for now 902 ifp->if_capabilities |= IFCAP_TXCSUM; 903 ifp->if_capenable |= IFCAP_TXCSUM; 904 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 905 */ 906#endif 907 908 /* Reset the ethernet interface. */ 909 smsc_reset(sc); 910 911 /* Load the multicast filter. */ 912 smsc_setmulti(ue); 913 914 /* TCP/UDP checksum offload engines. */ 915 smsc_sethwcsum(sc); 916 917 usbd_xfer_set_stall(sc->sc_xfer[SMSC_BULK_DT_WR]); 918 919 /* Indicate we are up and running. */ 920 ifp->if_drv_flags |= IFF_DRV_RUNNING; 921 922 /* Switch to selected media. */ 923 smsc_ifmedia_upd(ifp); 924 smsc_start(ue); 925} 926 927/** 928 * smsc_bulk_read_callback - Read callback used to process the USB URB 929 * @xfer: the USB transfer 930 * @error: 931 * 932 * Reads the URB data which can contain one or more ethernet frames, the 933 * frames are copyed into a mbuf and given to the system. 934 * 935 * LOCKING: 936 * No locking required, doesn't access internal driver settings. 937 */ 938static void 939smsc_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error) 940{ 941 struct smsc_softc *sc = usbd_xfer_softc(xfer); 942 struct usb_ether *ue = &sc->sc_ue; 943 struct ifnet *ifp = uether_getifp(ue); 944 struct mbuf *m; 945 struct usb_page_cache *pc; 946 uint32_t rxhdr; 947 uint16_t pktlen; 948 int off; 949 int actlen; 950 951 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 952 smsc_dbg_printf(sc, "rx : actlen %d\n", actlen); 953 954 switch (USB_GET_STATE(xfer)) { 955 case USB_ST_TRANSFERRED: 956 957 /* There is always a zero length frame after bringing the IF up */ 958 if (actlen < (sizeof(rxhdr) + ETHER_CRC_LEN)) 959 goto tr_setup; 960 961 /* There maybe multiple packets in the USB frame, each will have a 962 * header and each needs to have it's own mbuf allocated and populated 963 * for it. 964 */ 965 pc = usbd_xfer_get_frame(xfer, 0); 966 off = 0; 967 968 while (off < actlen) { 969 970 /* The frame header is always aligned on a 4 byte boundary */ 971 off = ((off + 0x3) & ~0x3); 972 973 usbd_copy_out(pc, off, &rxhdr, sizeof(rxhdr)); 974 off += (sizeof(rxhdr) + ETHER_ALIGN); 975 rxhdr = le32toh(rxhdr); 976 977 pktlen = (uint16_t)SMSC_RX_STAT_FRM_LENGTH(rxhdr); 978 979 smsc_dbg_printf(sc, "rx : rxhdr 0x%08x : pktlen %d : actlen %d : " 980 "off %d\n", rxhdr, pktlen, actlen, off); 981 982 983 if (rxhdr & SMSC_RX_STAT_ERROR) { 984 smsc_dbg_printf(sc, "rx error (hdr 0x%08x)\n", rxhdr); 985 ifp->if_ierrors++; 986 if (rxhdr & SMSC_RX_STAT_COLLISION) 987 ifp->if_collisions++; 988 } else { 989 990 /* Check if the ethernet frame is too big or too small */ 991 if ((pktlen < ETHER_HDR_LEN) || (pktlen > (actlen - off))) 992 goto tr_setup; 993 994 /* Create a new mbuf to store the packet in */ 995 m = uether_newbuf(); 996 if (m == NULL) { 997 smsc_warn_printf(sc, "failed to create new mbuf\n"); 998 ifp->if_iqdrops++; 999 goto tr_setup; 1000 } 1001 1002 usbd_copy_out(pc, off, mtod(m, uint8_t *), pktlen); 1003 1004 /* Check if RX TCP/UDP checksumming is being offloaded */ 1005 if ((ifp->if_capenable & IFCAP_RXCSUM) != 0) { 1006 1007 struct ether_header *eh; 1008 1009 eh = mtod(m, struct ether_header *); 1010 1011 /* Remove the extra 2 bytes of the csum */ 1012 pktlen -= 2; 1013 1014 /* The checksum appears to be simplistically calculated 1015 * over the udp/tcp header and data up to the end of the 1016 * eth frame. Which means if the eth frame is padded 1017 * the csum calculation is incorrectly performed over 1018 * the padding bytes as well. Therefore to be safe we 1019 * ignore the H/W csum on frames less than or equal to 1020 * 64 bytes. 1021 * 1022 * Ignore H/W csum for non-IPv4 packets. 1023 */ 1024 if (be16toh(eh->ether_type) == ETHERTYPE_IP && pktlen > ETHER_MIN_LEN) { 1025 1026 /* Indicate the UDP/TCP csum has been calculated */ 1027 m->m_pkthdr.csum_flags |= CSUM_DATA_VALID; 1028 1029 /* Copy the TCP/UDP checksum from the last 2 bytes 1030 * of the transfer and put in the csum_data field. 1031 */ 1032 usbd_copy_out(pc, (off + pktlen), 1033 &m->m_pkthdr.csum_data, 2); 1034 1035 /* The data is copied in network order, but the 1036 * csum algorithm in the kernel expects it to be 1037 * in host network order. 1038 */ 1039 m->m_pkthdr.csum_data = ntohs(m->m_pkthdr.csum_data); 1040 1041 smsc_dbg_printf(sc, "RX checksum offloaded (0x%04x)\n", 1042 m->m_pkthdr.csum_data); 1043 } 1044 1045 /* Need to adjust the offset as well or we'll be off 1046 * by 2 because the csum is removed from the packet 1047 * length. 1048 */ 1049 off += 2; 1050 } 1051 1052 /* Finally enqueue the mbuf on the receive queue */ 1053 /* Remove 4 trailing bytes */ 1054 if (pktlen < (4 + ETHER_HDR_LEN)) { 1055 m_freem(m); 1056 goto tr_setup; 1057 } 1058 uether_rxmbuf(ue, m, pktlen - 4); 1059 } 1060 1061 /* Update the offset to move to the next potential packet */ 1062 off += pktlen; 1063 } 1064 1065 /* FALLTHROUGH */ 1066 1067 case USB_ST_SETUP: 1068tr_setup: 1069 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 1070 usbd_transfer_submit(xfer); 1071 uether_rxflush(ue); 1072 return; 1073 1074 default: 1075 if (error != USB_ERR_CANCELLED) { 1076 smsc_warn_printf(sc, "bulk read error, %s\n", usbd_errstr(error)); 1077 usbd_xfer_set_stall(xfer); 1078 goto tr_setup; 1079 } 1080 return; 1081 } 1082} 1083 1084/** 1085 * smsc_bulk_write_callback - Write callback used to send ethernet frame(s) 1086 * @xfer: the USB transfer 1087 * @error: error code if the transfers is in an errored state 1088 * 1089 * The main write function that pulls ethernet frames off the queue and sends 1090 * them out. 1091 * 1092 * LOCKING: 1093 * 1094 */ 1095static void 1096smsc_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error) 1097{ 1098 struct smsc_softc *sc = usbd_xfer_softc(xfer); 1099 struct ifnet *ifp = uether_getifp(&sc->sc_ue); 1100 struct usb_page_cache *pc; 1101 struct mbuf *m; 1102 uint32_t txhdr; 1103 uint32_t frm_len = 0; 1104 int nframes; 1105 1106 switch (USB_GET_STATE(xfer)) { 1107 case USB_ST_TRANSFERRED: 1108 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1109 /* FALLTHROUGH */ 1110 1111 case USB_ST_SETUP: 1112tr_setup: 1113 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0 || 1114 (ifp->if_drv_flags & IFF_DRV_OACTIVE) != 0) { 1115 /* Don't send anything if there is no link or controller is busy. */ 1116 return; 1117 } 1118 1119 for (nframes = 0; nframes < 16 && 1120 !IFQ_DRV_IS_EMPTY(&ifp->if_snd); nframes++) { 1121 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1122 if (m == NULL) 1123 break; 1124 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, 1125 nframes); 1126 frm_len = 0; 1127 pc = usbd_xfer_get_frame(xfer, nframes); 1128 1129 /* Each frame is prefixed with two 32-bit values describing the 1130 * length of the packet and buffer. 1131 */ 1132 txhdr = SMSC_TX_CTRL_0_BUF_SIZE(m->m_pkthdr.len) | 1133 SMSC_TX_CTRL_0_FIRST_SEG | SMSC_TX_CTRL_0_LAST_SEG; 1134 txhdr = htole32(txhdr); 1135 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr)); 1136 1137 txhdr = SMSC_TX_CTRL_1_PKT_LENGTH(m->m_pkthdr.len); 1138 txhdr = htole32(txhdr); 1139 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr)); 1140 1141 frm_len += 8; 1142 1143 /* Next copy in the actual packet */ 1144 usbd_m_copy_in(pc, frm_len, m, 0, m->m_pkthdr.len); 1145 frm_len += m->m_pkthdr.len; 1146 1147 ifp->if_opackets++; 1148 1149 /* If there's a BPF listener, bounce a copy of this frame to him */ 1150 BPF_MTAP(ifp, m); 1151 1152 m_freem(m); 1153 1154 /* Set frame length. */ 1155 usbd_xfer_set_frame_len(xfer, nframes, frm_len); 1156 } 1157 if (nframes != 0) { 1158 usbd_xfer_set_frames(xfer, nframes); 1159 usbd_transfer_submit(xfer); 1160 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1161 } 1162 return; 1163 1164 default: 1165 ifp->if_oerrors++; 1166 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1167 1168 if (error != USB_ERR_CANCELLED) { 1169 smsc_err_printf(sc, "usb error on tx: %s\n", usbd_errstr(error)); 1170 usbd_xfer_set_stall(xfer); 1171 goto tr_setup; 1172 } 1173 return; 1174 } 1175} 1176 1177/** 1178 * smsc_tick - Called periodically to monitor the state of the LAN95xx chip 1179 * @ue: USB ether interface 1180 * 1181 * Simply calls the mii status functions to check the state of the link. 1182 * 1183 * LOCKING: 1184 * Should be called with the SMSC lock held. 1185 */ 1186static void 1187smsc_tick(struct usb_ether *ue) 1188{ 1189 struct smsc_softc *sc = uether_getsc(ue); 1190 struct mii_data *mii = uether_getmii(&sc->sc_ue); 1191 1192 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1193 1194 mii_tick(mii); 1195 if ((sc->sc_flags & SMSC_FLAG_LINK) == 0) { 1196 smsc_miibus_statchg(ue->ue_dev); 1197 if ((sc->sc_flags & SMSC_FLAG_LINK) != 0) 1198 smsc_start(ue); 1199 } 1200} 1201 1202/** 1203 * smsc_start - Starts communication with the LAN95xx chip 1204 * @ue: USB ether interface 1205 * 1206 * 1207 * 1208 */ 1209static void 1210smsc_start(struct usb_ether *ue) 1211{ 1212 struct smsc_softc *sc = uether_getsc(ue); 1213 1214 /* 1215 * start the USB transfers, if not already started: 1216 */ 1217 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_RD]); 1218 usbd_transfer_start(sc->sc_xfer[SMSC_BULK_DT_WR]); 1219} 1220 1221/** 1222 * smsc_stop - Stops communication with the LAN95xx chip 1223 * @ue: USB ether interface 1224 * 1225 * 1226 * 1227 */ 1228static void 1229smsc_stop(struct usb_ether *ue) 1230{ 1231 struct smsc_softc *sc = uether_getsc(ue); 1232 struct ifnet *ifp = uether_getifp(ue); 1233 1234 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1235 1236 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1237 sc->sc_flags &= ~SMSC_FLAG_LINK; 1238 1239 /* 1240 * stop all the transfers, if not already stopped: 1241 */ 1242 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_WR]); 1243 usbd_transfer_stop(sc->sc_xfer[SMSC_BULK_DT_RD]); 1244} 1245 1246/** 1247 * smsc_phy_init - Initialises the in-built SMSC phy 1248 * @sc: driver soft context 1249 * 1250 * Resets the PHY part of the chip and then initialises it to default 1251 * values. The 'link down' and 'auto-negotiation complete' interrupts 1252 * from the PHY are also enabled, however we don't monitor the interrupt 1253 * endpoints for the moment. 1254 * 1255 * RETURNS: 1256 * Returns 0 on success or EIO if failed to reset the PHY. 1257 */ 1258static int 1259smsc_phy_init(struct smsc_softc *sc) 1260{ 1261 int bmcr; 1262 usb_ticks_t start_ticks; 1263 const usb_ticks_t max_ticks = USB_MS_TO_TICKS(1000); 1264 1265 SMSC_LOCK_ASSERT(sc, MA_OWNED); 1266 1267 /* Reset phy and wait for reset to complete */ 1268 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, BMCR_RESET); 1269 1270 start_ticks = ticks; 1271 do { 1272 uether_pause(&sc->sc_ue, hz / 100); 1273 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1274 } while ((bmcr & MII_BMCR) && ((ticks - start_ticks) < max_ticks)); 1275 1276 if (((usb_ticks_t)(ticks - start_ticks)) >= max_ticks) { 1277 smsc_err_printf(sc, "PHY reset timed-out"); 1278 return (EIO); 1279 } 1280 1281 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_ANAR, 1282 ANAR_10 | ANAR_10_FD | ANAR_TX | ANAR_TX_FD | /* all modes */ 1283 ANAR_CSMA | 1284 ANAR_FC | 1285 ANAR_PAUSE_ASYM); 1286 1287 /* Setup the phy to interrupt when the link goes down or autoneg completes */ 1288 smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_STAT); 1289 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, SMSC_PHY_INTR_MASK, 1290 (SMSC_PHY_INTR_ANEG_COMP | SMSC_PHY_INTR_LINK_DOWN)); 1291 1292 /* Restart auto-negotation */ 1293 bmcr = smsc_miibus_readreg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR); 1294 bmcr |= BMCR_STARTNEG; 1295 smsc_miibus_writereg(sc->sc_ue.ue_dev, sc->sc_phyno, MII_BMCR, bmcr); 1296 1297 return (0); 1298} 1299 1300 1301/** 1302 * smsc_chip_init - Initialises the chip after power on 1303 * @sc: driver soft context 1304 * 1305 * This initialisation sequence is modelled on the procedure in the Linux 1306 * driver. 1307 * 1308 * RETURNS: 1309 * Returns 0 on success or an error code on failure. 1310 */ 1311static int 1312smsc_chip_init(struct smsc_softc *sc) 1313{ 1314 int err; 1315 int locked; 1316 uint32_t reg_val; 1317 int burst_cap; 1318 1319 locked = mtx_owned(&sc->sc_mtx); 1320 if (!locked) 1321 SMSC_LOCK(sc); 1322 1323 /* Enter H/W config mode */ 1324 smsc_write_reg(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST); 1325 1326 if ((err = smsc_wait_for_bits(sc, SMSC_HW_CFG, SMSC_HW_CFG_LRST)) != 0) { 1327 smsc_warn_printf(sc, "timed-out waiting for reset to complete\n"); 1328 goto init_failed; 1329 } 1330 1331 /* Reset the PHY */ 1332 smsc_write_reg(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST); 1333 1334 if ((err = smsc_wait_for_bits(sc, SMSC_PM_CTRL, SMSC_PM_CTRL_PHY_RST) != 0)) { 1335 smsc_warn_printf(sc, "timed-out waiting for phy reset to complete\n"); 1336 goto init_failed; 1337 } 1338 1339 /* Set the mac address */ 1340 if ((err = smsc_setmacaddress(sc, sc->sc_ue.ue_eaddr)) != 0) { 1341 smsc_warn_printf(sc, "failed to set the MAC address\n"); 1342 goto init_failed; 1343 } 1344 1345 /* Don't know what the HW_CFG_BIR bit is, but following the reset sequence 1346 * as used in the Linux driver. 1347 */ 1348 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) != 0) { 1349 smsc_warn_printf(sc, "failed to read HW_CFG: %d\n", err); 1350 goto init_failed; 1351 } 1352 reg_val |= SMSC_HW_CFG_BIR; 1353 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1354 1355 /* There is a so called 'turbo mode' that the linux driver supports, it 1356 * seems to allow you to jam multiple frames per Rx transaction. By default 1357 * this driver supports that and therefore allows multiple frames per URB. 1358 * 1359 * The xfer buffer size needs to reflect this as well, therefore based on 1360 * the calculations in the Linux driver the RX bufsize is set to 18944, 1361 * bufsz = (16 * 1024 + 5 * 512) 1362 * 1363 * Burst capability is the number of URBs that can be in a burst of data/ 1364 * ethernet frames. 1365 */ 1366 if (usbd_get_speed(sc->sc_ue.ue_udev) == USB_SPEED_HIGH) 1367 burst_cap = 37; 1368 else 1369 burst_cap = 128; 1370 1371 smsc_write_reg(sc, SMSC_BURST_CAP, burst_cap); 1372 1373 /* Set the default bulk in delay (magic value from Linux driver) */ 1374 smsc_write_reg(sc, SMSC_BULK_IN_DLY, 0x00002000); 1375 1376 1377 1378 /* 1379 * Initialise the RX interface 1380 */ 1381 if ((err = smsc_read_reg(sc, SMSC_HW_CFG, ®_val)) < 0) { 1382 smsc_warn_printf(sc, "failed to read HW_CFG: (err = %d)\n", err); 1383 goto init_failed; 1384 } 1385 1386 /* Adjust the packet offset in the buffer (designed to try and align IP 1387 * header on 4 byte boundary) 1388 */ 1389 reg_val &= ~SMSC_HW_CFG_RXDOFF; 1390 reg_val |= (ETHER_ALIGN << 9) & SMSC_HW_CFG_RXDOFF; 1391 1392 /* The following setings are used for 'turbo mode', a.k.a multiple frames 1393 * per Rx transaction (again info taken form Linux driver). 1394 */ 1395 reg_val |= (SMSC_HW_CFG_MEF | SMSC_HW_CFG_BCE); 1396 1397 smsc_write_reg(sc, SMSC_HW_CFG, reg_val); 1398 1399 /* Clear the status register ? */ 1400 smsc_write_reg(sc, SMSC_INTR_STATUS, 0xffffffff); 1401 1402 /* Read and display the revision register */ 1403 if ((err = smsc_read_reg(sc, SMSC_ID_REV, &sc->sc_rev_id)) < 0) { 1404 smsc_warn_printf(sc, "failed to read ID_REV (err = %d)\n", err); 1405 goto init_failed; 1406 } 1407 1408 device_printf(sc->sc_ue.ue_dev, "chip 0x%04lx, rev. %04lx\n", 1409 (sc->sc_rev_id & SMSC_ID_REV_CHIP_ID_MASK) >> 16, 1410 (sc->sc_rev_id & SMSC_ID_REV_CHIP_REV_MASK)); 1411 1412 /* GPIO/LED setup */ 1413 reg_val = SMSC_LED_GPIO_CFG_SPD_LED | SMSC_LED_GPIO_CFG_LNK_LED | 1414 SMSC_LED_GPIO_CFG_FDX_LED; 1415 smsc_write_reg(sc, SMSC_LED_GPIO_CFG, reg_val); 1416 1417 /* 1418 * Initialise the TX interface 1419 */ 1420 smsc_write_reg(sc, SMSC_FLOW, 0); 1421 1422 smsc_write_reg(sc, SMSC_AFC_CFG, AFC_CFG_DEFAULT); 1423 1424 /* Read the current MAC configuration */ 1425 if ((err = smsc_read_reg(sc, SMSC_MAC_CSR, &sc->sc_mac_csr)) < 0) { 1426 smsc_warn_printf(sc, "failed to read MAC_CSR (err=%d)\n", err); 1427 goto init_failed; 1428 } 1429 1430 /* Vlan */ 1431 smsc_write_reg(sc, SMSC_VLAN1, (uint32_t)ETHERTYPE_VLAN); 1432 1433 /* 1434 * Initialise the PHY 1435 */ 1436 if ((err = smsc_phy_init(sc)) != 0) 1437 goto init_failed; 1438 1439 1440 /* 1441 * Start TX 1442 */ 1443 sc->sc_mac_csr |= SMSC_MAC_CSR_TXEN; 1444 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1445 smsc_write_reg(sc, SMSC_TX_CFG, SMSC_TX_CFG_ON); 1446 1447 /* 1448 * Start RX 1449 */ 1450 sc->sc_mac_csr |= SMSC_MAC_CSR_RXEN; 1451 smsc_write_reg(sc, SMSC_MAC_CSR, sc->sc_mac_csr); 1452 1453 if (!locked) 1454 SMSC_UNLOCK(sc); 1455 1456 return (0); 1457 1458init_failed: 1459 if (!locked) 1460 SMSC_UNLOCK(sc); 1461 1462 smsc_err_printf(sc, "smsc_chip_init failed (err=%d)\n", err); 1463 return (err); 1464} 1465 1466 1467/** 1468 * smsc_ioctl - ioctl function for the device 1469 * @ifp: interface pointer 1470 * @cmd: the ioctl command 1471 * @data: data passed in the ioctl call, typically a pointer to struct ifreq. 1472 * 1473 * The ioctl routine is overridden to detect change requests for the H/W 1474 * checksum capabilities. 1475 * 1476 * RETURNS: 1477 * 0 on success and an error code on failure. 1478 */ 1479static int 1480smsc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1481{ 1482 struct usb_ether *ue = ifp->if_softc; 1483 struct smsc_softc *sc; 1484 struct ifreq *ifr; 1485 int rc; 1486 int mask; 1487 int reinit; 1488 1489 if (cmd == SIOCSIFCAP) { 1490 1491 sc = uether_getsc(ue); 1492 ifr = (struct ifreq *)data; 1493 1494 SMSC_LOCK(sc); 1495 1496 rc = 0; 1497 reinit = 0; 1498 1499 mask = ifr->ifr_reqcap ^ ifp->if_capenable; 1500 1501 /* Modify the RX CSUM enable bits */ 1502 if ((mask & IFCAP_RXCSUM) != 0 && 1503 (ifp->if_capabilities & IFCAP_RXCSUM) != 0) { 1504 ifp->if_capenable ^= IFCAP_RXCSUM; 1505 1506 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1507 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1508 reinit = 1; 1509 } 1510 } 1511 1512 SMSC_UNLOCK(sc); 1513 if (reinit) 1514#if __FreeBSD_version > 1000000 1515 uether_init(ue); 1516#else 1517 ifp->if_init(ue); 1518#endif 1519 1520 } else { 1521 rc = uether_ioctl(ifp, cmd, data); 1522 } 1523 1524 return (rc); 1525} 1526 1527#ifdef FDT 1528/** 1529 * Get MAC address from FDT blob. Firmware or loader should fill 1530 * mac-address or local-mac-address property Returns 0 if MAC address 1531 * obtained, error code otherwise 1532 */ 1533static int 1534smsc_fdt_find_mac(unsigned char *mac) 1535{ 1536 phandle_t child, parent, root; 1537 int len; 1538 1539 root = OF_finddevice("/"); 1540 len = 0; 1541 parent = root; 1542 1543 /* Traverse through entire tree to find nodes usb ethernet nodes */ 1544 for (child = OF_child(parent); child != 0; child = OF_peer(child)) { 1545 1546 /* Find a 'leaf'. Start the search from this node. */ 1547 while (OF_child(child)) { 1548 parent = child; 1549 child = OF_child(child); 1550 } 1551 1552 if (fdt_is_compatible(child, "net,ethernet") && 1553 fdt_is_compatible(child, "usb,device")) { 1554 1555 /* Check if there is property */ 1556 if ((len = OF_getproplen(child, "local-mac-address")) > 0) { 1557 if (len != ETHER_ADDR_LEN) 1558 return (EINVAL); 1559 1560 OF_getprop(child, "local-mac-address", mac, 1561 ETHER_ADDR_LEN); 1562 return (0); 1563 } 1564 1565 if ((len = OF_getproplen(child, "mac-address")) > 0) { 1566 if (len != ETHER_ADDR_LEN) 1567 return (EINVAL); 1568 1569 OF_getprop(child, "mac-address", mac, 1570 ETHER_ADDR_LEN); 1571 return (0); 1572 } 1573 } 1574 1575 if (OF_peer(child) == 0) { 1576 /* No more siblings. */ 1577 child = parent; 1578 parent = OF_parent(child); 1579 } 1580 } 1581 1582 return (ENXIO); 1583} 1584#endif 1585 1586/** 1587 * smsc_attach_post - Called after the driver attached to the USB interface 1588 * @ue: the USB ethernet device 1589 * 1590 * This is where the chip is intialised for the first time. This is different 1591 * from the smsc_init() function in that that one is designed to setup the 1592 * H/W to match the UE settings and can be called after a reset. 1593 * 1594 * 1595 */ 1596static void 1597smsc_attach_post(struct usb_ether *ue) 1598{ 1599 struct smsc_softc *sc = uether_getsc(ue); 1600 uint32_t mac_h, mac_l; 1601 int err; 1602 1603 smsc_dbg_printf(sc, "smsc_attach_post\n"); 1604 1605 /* Setup some of the basics */ 1606 sc->sc_phyno = 1; 1607 1608 1609 /* Attempt to get the mac address, if an EEPROM is not attached this 1610 * will just return FF:FF:FF:FF:FF:FF, so in such cases we invent a MAC 1611 * address based on urandom. 1612 */ 1613 memset(sc->sc_ue.ue_eaddr, 0xff, ETHER_ADDR_LEN); 1614 1615 /* Check if there is already a MAC address in the register */ 1616 if ((smsc_read_reg(sc, SMSC_MAC_ADDRL, &mac_l) == 0) && 1617 (smsc_read_reg(sc, SMSC_MAC_ADDRH, &mac_h) == 0)) { 1618 sc->sc_ue.ue_eaddr[5] = (uint8_t)((mac_h >> 8) & 0xff); 1619 sc->sc_ue.ue_eaddr[4] = (uint8_t)((mac_h) & 0xff); 1620 sc->sc_ue.ue_eaddr[3] = (uint8_t)((mac_l >> 24) & 0xff); 1621 sc->sc_ue.ue_eaddr[2] = (uint8_t)((mac_l >> 16) & 0xff); 1622 sc->sc_ue.ue_eaddr[1] = (uint8_t)((mac_l >> 8) & 0xff); 1623 sc->sc_ue.ue_eaddr[0] = (uint8_t)((mac_l) & 0xff); 1624 } 1625 1626 /* MAC address is not set so try to read from EEPROM, if that fails generate 1627 * a random MAC address. 1628 */ 1629 if (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr)) { 1630 1631 err = smsc_eeprom_read(sc, 0x01, sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1632#ifdef FDT 1633 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) 1634 err = smsc_fdt_find_mac(sc->sc_ue.ue_eaddr); 1635#endif 1636 if ((err != 0) || (!ETHER_IS_VALID(sc->sc_ue.ue_eaddr))) { 1637 read_random(sc->sc_ue.ue_eaddr, ETHER_ADDR_LEN); 1638 sc->sc_ue.ue_eaddr[0] &= ~0x01; /* unicast */ 1639 sc->sc_ue.ue_eaddr[0] |= 0x02; /* locally administered */ 1640 } 1641 } 1642 1643 /* Initialise the chip for the first time */ 1644 smsc_chip_init(sc); 1645} 1646 1647 1648/** 1649 * smsc_attach_post_sub - Called after the driver attached to the USB interface 1650 * @ue: the USB ethernet device 1651 * 1652 * Most of this is boilerplate code and copied from the base USB ethernet 1653 * driver. It has been overriden so that we can indicate to the system that 1654 * the chip supports H/W checksumming. 1655 * 1656 * RETURNS: 1657 * Returns 0 on success or a negative error code. 1658 */ 1659#if __FreeBSD_version > 1000000 1660static int 1661smsc_attach_post_sub(struct usb_ether *ue) 1662{ 1663 struct smsc_softc *sc; 1664 struct ifnet *ifp; 1665 int error; 1666 1667 sc = uether_getsc(ue); 1668 ifp = ue->ue_ifp; 1669 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 1670 ifp->if_start = uether_start; 1671 ifp->if_ioctl = smsc_ioctl; 1672 ifp->if_init = uether_init; 1673 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 1674 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 1675 IFQ_SET_READY(&ifp->if_snd); 1676 1677 /* The chip supports TCP/UDP checksum offloading on TX and RX paths, however 1678 * currently only RX checksum is supported in the driver (see top of file). 1679 */ 1680 ifp->if_capabilities |= IFCAP_RXCSUM; 1681 ifp->if_hwassist = 0; 1682 1683 /* TX checksuming is disabled (for now?) 1684 ifp->if_capabilities |= IFCAP_TXCSUM; 1685 ifp->if_capenable |= IFCAP_TXCSUM; 1686 ifp->if_hwassist = CSUM_TCP | CSUM_UDP; 1687 */ 1688 1689 ifp->if_capenable = ifp->if_capabilities; 1690 1691 mtx_lock(&Giant); 1692 error = mii_attach(ue->ue_dev, &ue->ue_miibus, ifp, 1693 uether_ifmedia_upd, ue->ue_methods->ue_mii_sts, 1694 BMSR_DEFCAPMASK, sc->sc_phyno, MII_OFFSET_ANY, 0); 1695 mtx_unlock(&Giant); 1696 1697 return (error); 1698} 1699#endif /* __FreeBSD_version > 1000000 */ 1700 1701 1702/** 1703 * smsc_probe - Probe the interface. 1704 * @dev: smsc device handle 1705 * 1706 * Checks if the device is a match for this driver. 1707 * 1708 * RETURNS: 1709 * Returns 0 on success or an error code on failure. 1710 */ 1711static int 1712smsc_probe(device_t dev) 1713{ 1714 struct usb_attach_arg *uaa = device_get_ivars(dev); 1715 1716 if (uaa->usb_mode != USB_MODE_HOST) 1717 return (ENXIO); 1718 if (uaa->info.bConfigIndex != SMSC_CONFIG_INDEX) 1719 return (ENXIO); 1720 if (uaa->info.bIfaceIndex != SMSC_IFACE_IDX) 1721 return (ENXIO); 1722 1723 return (usbd_lookup_id_by_uaa(smsc_devs, sizeof(smsc_devs), uaa)); 1724} 1725 1726 1727/** 1728 * smsc_attach - Attach the interface. 1729 * @dev: smsc device handle 1730 * 1731 * Allocate softc structures, do ifmedia setup and ethernet/BPF attach. 1732 * 1733 * RETURNS: 1734 * Returns 0 on success or a negative error code. 1735 */ 1736static int 1737smsc_attach(device_t dev) 1738{ 1739 struct usb_attach_arg *uaa = device_get_ivars(dev); 1740 struct smsc_softc *sc = device_get_softc(dev); 1741 struct usb_ether *ue = &sc->sc_ue; 1742 uint8_t iface_index; 1743 int err; 1744 1745 sc->sc_flags = USB_GET_DRIVER_INFO(uaa); 1746 1747 device_set_usb_desc(dev); 1748 1749 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); 1750 1751 /* Setup the endpoints for the SMSC LAN95xx device(s) */ 1752 iface_index = SMSC_IFACE_IDX; 1753 err = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 1754 smsc_config, SMSC_N_TRANSFER, sc, &sc->sc_mtx); 1755 if (err) { 1756 device_printf(dev, "error: allocating USB transfers failed\n"); 1757 goto detach; 1758 } 1759 1760 ue->ue_sc = sc; 1761 ue->ue_dev = dev; 1762 ue->ue_udev = uaa->device; 1763 ue->ue_mtx = &sc->sc_mtx; 1764 ue->ue_methods = &smsc_ue_methods; 1765 1766 err = uether_ifattach(ue); 1767 if (err) { 1768 device_printf(dev, "error: could not attach interface\n"); 1769 goto detach; 1770 } 1771 return (0); /* success */ 1772 1773detach: 1774 smsc_detach(dev); 1775 return (ENXIO); /* failure */ 1776} 1777 1778/** 1779 * smsc_detach - Detach the interface. 1780 * @dev: smsc device handle 1781 * 1782 * RETURNS: 1783 * Returns 0. 1784 */ 1785static int 1786smsc_detach(device_t dev) 1787{ 1788 struct smsc_softc *sc = device_get_softc(dev); 1789 struct usb_ether *ue = &sc->sc_ue; 1790 1791 usbd_transfer_unsetup(sc->sc_xfer, SMSC_N_TRANSFER); 1792 uether_ifdetach(ue); 1793 mtx_destroy(&sc->sc_mtx); 1794 1795 return (0); 1796} 1797 1798static device_method_t smsc_methods[] = { 1799 /* Device interface */ 1800 DEVMETHOD(device_probe, smsc_probe), 1801 DEVMETHOD(device_attach, smsc_attach), 1802 DEVMETHOD(device_detach, smsc_detach), 1803 1804 /* bus interface */ 1805 DEVMETHOD(bus_print_child, bus_generic_print_child), 1806 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 1807 1808 /* MII interface */ 1809 DEVMETHOD(miibus_readreg, smsc_miibus_readreg), 1810 DEVMETHOD(miibus_writereg, smsc_miibus_writereg), 1811 DEVMETHOD(miibus_statchg, smsc_miibus_statchg), 1812 1813 DEVMETHOD_END 1814}; 1815 1816static driver_t smsc_driver = { 1817 .name = "smsc", 1818 .methods = smsc_methods, 1819 .size = sizeof(struct smsc_softc), 1820}; 1821 1822static devclass_t smsc_devclass; 1823 1824DRIVER_MODULE(smsc, uhub, smsc_driver, smsc_devclass, NULL, 0); 1825DRIVER_MODULE(miibus, smsc, miibus_driver, miibus_devclass, 0, 0); 1826MODULE_DEPEND(smsc, uether, 1, 1, 1); 1827MODULE_DEPEND(smsc, usb, 1, 1, 1); 1828MODULE_DEPEND(smsc, ether, 1, 1, 1); 1829MODULE_DEPEND(smsc, miibus, 1, 1, 1); 1830MODULE_VERSION(smsc, 1); 1831