1/* $FreeBSD$ */ 2 3/*- 4 * Copyright (c) 2010,2011 Aleksandr Rybalko. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#ifndef _DWC_OTGREG_H_ 29#define _DWC_OTGREG_H_ 30 31#define DOTG_GOTGCTL 0x0000 32#define DOTG_GOTGINT 0x0004 33#define DOTG_GAHBCFG 0x0008 34#define DOTG_GUSBCFG 0x000C 35#define DOTG_GRSTCTL 0x0010 36#define DOTG_GINTSTS 0x0014 37#define DOTG_GINTMSK 0x0018 38#define DOTG_GRXSTSRD 0x001C 39#define DOTG_GRXSTSRH 0x001C 40#define DOTG_GRXSTSPD 0x0020 41#define DOTG_GRXSTSPH 0x0020 42#define DOTG_GRXFSIZ 0x0024 43#define DOTG_GNPTXFSIZ 0x0028 44#define DOTG_GNPTXSTS 0x002C 45#define DOTG_GI2CCTL 0x0030 46#define DOTG_GPVNDCTL 0x0034 47#define DOTG_GGPIO 0x0038 48#define DOTG_GUID 0x003C 49#define DOTG_GSNPSID 0x0040 50#define DOTG_GHWCFG1 0x0044 51#define DOTG_GHWCFG2 0x0048 52#define DOTG_GHWCFG3 0x004C 53#define DOTG_GHWCFG4 0x0050 54#define DOTG_GLPMCFG 0x0054 55#define DOTG_GPWRDN 0x0058 56#define DOTG_GDFIFOCFG 0x005C 57#define DOTG_GADPCTL 0x0060 58 59#define DOTG_HPTXFSIZ 0x0100 60/* start from 0x104, but fifo0 not exists */ 61#define DOTG_DPTXFSIZ(fifo) (0x0100 + (4*(fifo))) 62#define DOTG_DIEPTXF(fifo) (0x0100 + (4*(fifo))) 63 64#define DOTG_HCFG 0x0400 65#define DOTG_HFIR 0x0404 66#define DOTG_HFNUM 0x0408 67#define DOTG_HPTXSTS 0x0410 68#define DOTG_HAINT 0x0414 69#define DOTG_HAINTMSK 0x0418 70#define DOTG_HPRT 0x0440 71 72#define DOTG_HCCHAR(ch) (0x0500 + (32*(ch))) 73#define DOTG_HCSPLT(ch) (0x0504 + (32*(ch))) 74#define DOTG_HCINT(ch) (0x0508 + (32*(ch))) 75#define DOTG_HCINTMSK(ch) (0x050C + (32*(ch))) 76#define DOTG_HCTSIZ(ch) (0x0510 + (32*(ch))) 77#define DOTG_HCDMA(ch) (0x0514 + (32*(ch))) 78#define DOTG_HCDMAI(ch) (0x0514 + (32*(ch))) 79#define DOTG_HCDMAO(ch) (0x0514 + (32*(ch))) 80#define DOTG_HCDMAB(ch) (0x051C + (32*(ch))) 81 82/* Device Mode */ 83#define DOTG_DCFG 0x0800 84#define DOTG_DCTL 0x0804 85#define DOTG_DSTS 0x0808 86#define DOTG_DIEPMSK 0x0810 87#define DOTG_DOEPMSK 0x0814 88#define DOTG_DAINT 0x0818 89#define DOTG_DAINTMSK 0x081C 90#define DOTG_DTKNQR1 0x0820 91#define DOTG_DTKNQR2 0x0824 92#define DOTG_DVBUSDIS 0x0828 93#define DOTG_DVBUSPULSE 0x082C 94#define DOTG_DTHRCTL 0x0830 95#define DOTG_DTKNQR4 0x0834 96#define DOTG_DIEPEMPMSK 0x0834 97#define DOTG_DEACHINT 0x0838 98#define DOTG_DEACHINTMSK 0x083C 99#define DOTG_DIEPEACHINTMSK(ch) (0x0840 + (4*(ch))) 100#define DOTG_DOEPEACHINTMSK(ch) (0x0880 + (4*(ch))) 101 102#define DOTG_DIEPCTL(ep) (0x0900 + (32*(ep))) 103#define DOTG_DIEPINT(ep) (0x0908 + (32*(ep))) 104#define DOTG_DIEPTSIZ(ep) (0x0910 + (32*(ep))) 105#define DOTG_DIEPDMA(ep) (0x0914 + (32*(ep))) 106#define DOTG_DTXFSTS(ep) (0x0918 + (32*(ep))) 107#define DOTG_DIEPDMAB(ep) (0x091c + (32*(ep))) 108 109#define DOTG_DOEPCTL(ep) (0x0B00 + (32*(ep))) 110#define DOTG_DOEPFN(ep) (0x0B04 + (32*(ep))) 111#define DOTG_DOEPINT(ep) (0x0B08 + (32*(ep))) 112#define DOTG_DOEPTSIZ(ep) (0x0B10 + (32*(ep))) 113#define DOTG_DOEPDMA(ep) (0x0B14 + (32*(ep))) 114#define DOTG_DOEPDMAB(ep) (0x0B1c + (32*(ep))) 115/* End Device Mode */ 116 117/* Host Mode 118#define DOTG_CTL_STATUS 0x0800 119#define DOTG_DMA0_INB_CHN0 0x0818 120#define DOTG_DMA0_INB_CHN1 0x0820 121#define DOTG_DMA0_INB_CHN2 0x0828 122#define DOTG_DVBUSDIS 0x0828 123#define DOTG_DVBUSPULSE 0x082c 124#define DOTG_DMA0_INB_CHN3 0x0830 125#define DOTG_DMA0_INB_CHN4 0x0838 126#define DOTG_DMA0_INB_CHN5 0x0840 127#define DOTG_DMA0_INB_CHN6 0x0848 128#define DOTG_DMA0_INB_CHN7 0x0850 129#define DOTG_DMA0_OUTB_CHN0 0x0858 130#define DOTG_DMA0_OUTB_CHN1 0x0860 131#define DOTG_DMA0_OUTB_CHN2 0x0868 132#define DOTG_DMA0_OUTB_CHN3 0x0870 133#define DOTG_DMA0_OUTB_CHN4 0x0878 134#define DOTG_DMA0_OUTB_CHN5 0x0880 135#define DOTG_DMA0_OUTB_CHN6 0x0888 136#define DOTG_DMA0_OUTB_CHN7 0x0890 137 End Host Mode */ 138 139/* Power and clock gating CSR */ 140 141#define DOTG_PCGCCTL 0x0E00 142 143/* FIFO access registers (PIO-mode) */ 144 145#define DOTG_DFIFO(n) (0x1000 + (0x1000 * (n))) 146 147#define GOTGCTL_CHIRP_ON (1<<27) 148#define GOTGCTL_BSESVLD (1<<19) 149#define GOTGCTL_ASESVLD (1<<18) 150#define GOTGCTL_DBNCTIME (1<<17) 151#define GOTGCTL_CONIDSTS (1<<16) 152#define GOTGCTL_DEVHNPEN (1<<11) 153#define GOTGCTL_HSTSETHNPEN (1<<10) 154#define GOTGCTL_HNPREQ (1<<9) 155#define GOTGCTL_HSTNEGSCS (1<<8) 156#define GOTGCTL_SESREQ (1<<1) 157#define GOTGCTL_SESREQSCS (1<<0) 158 159#define GOTGCTL_DBNCEDONE (1<<19) 160#define GOTGCTL_ADEVTOUTCHG (1<<18) 161#define GOTGCTL_HSTNEGDET (1<<17) 162#define GOTGCTL_HSTNEGSUCSTSCHG (1<<9) 163#define GOTGCTL_SESREQSUCSTSCHG (1<<8) 164#define GOTGCTL_SESENDDET (1<<2) 165 166#define GAHBCFG_PTXFEMPLVL (1<<8) 167#define GAHBCFG_NPTXFEMPLVL (1<<7) 168#define GAHBCFG_DMAEN (1<<5) 169#define GAHBCFG_HBSTLEN_MASK 0x0000001e 170#define GAHBCFG_HBSTLEN_SHIFT 1 171#define GAHBCFG_GLBLINTRMSK (1<<0) 172 173#define GUSBCFG_CORRUPTTXPACKET (1<<31) 174#define GUSBCFG_FORCEDEVMODE (1<<30) 175#define GUSBCFG_FORCEHOSTMODE (1<<29) 176#define GUSBCFG_NO_PULLUP (1<<27) 177#define GUSBCFG_IC_USB_CAP (1<<26) 178#define GUSBCFG_TERMSELDLPULSE (1<<22) 179#define GUSBCFG_ULPIEXTVBUSINDICATOR (1<<21) 180#define GUSBCFG_ULPIEXTVBUSDRV (1<<20) 181#define GUSBCFG_ULPICLKSUSM (1<<19) 182#define GUSBCFG_ULPIAUTORES (1<<18) 183#define GUSBCFG_ULPIFSLS (1<<17) 184#define GUSBCFG_OTGI2CSEL (1<<16) 185#define GUSBCFG_PHYLPWRCLKSEL (1<<15) 186#define GUSBCFG_USBTRDTIM_MASK 0x00003c00 187#define GUSBCFG_USBTRDTIM_SHIFT 10 188#define GUSBCFG_TRD_TIM_SET(x) (((x) & 15) << 10) 189#define GUSBCFG_HNPCAP (1<<9) 190#define GUSBCFG_SRPCAP (1<<8) 191#define GUSBCFG_DDRSEL (1<<7) 192#define GUSBCFG_PHYSEL (1<<6) 193#define GUSBCFG_FSINTF (1<<5) 194#define GUSBCFG_ULPI_UTMI_SEL (1<<4) 195#define GUSBCFG_PHYIF (1<<3) 196#define GUSBCFG_TOUTCAL_MASK 0x00000007 197#define GUSBCFG_TOUTCAL_SHIFT 0 198 199#define GRSTCTL_AHBIDLE (1<<31) 200#define GRSTCTL_DMAREQ (1<<30) 201#define GRSTCTL_TXFNUM_MASK 0x000007c0 202#define GRSTCTL_TXFNUM_SHIFT 6 203#define GRSTCTL_TXFIFO(n) (((n) & 31) << 6) 204#define GRSTCTL_TXFFLSH (1<<5) 205#define GRSTCTL_RXFFLSH (1<<4) 206#define GRSTCTL_INTKNQFLSH (1<<3) 207#define GRSTCTL_FRMCNTRRST (1<<2) 208#define GRSTCTL_HSFTRST (1<<1) 209#define GRSTCTL_CSFTRST (1<<0) 210 211#define GINTSTS_WKUPINT (1<<31) 212#define GINTSTS_SESSREQINT (1<<30) 213#define GINTSTS_DISCONNINT (1<<29) 214#define GINTSTS_CONIDSTSCHNG (1<<28) 215#define GINTSTS_LPM (1<<27) 216#define GINTSTS_PTXFEMP (1<<26) 217#define GINTSTS_HCHINT (1<<25) 218#define GINTSTS_PRTINT (1<<24) 219#define GINTSTS_RESETDET (1<<23) 220#define GINTSTS_FETSUSP (1<<22) 221#define GINTSTS_INCOMPLP (1<<21) 222#define GINTSTS_INCOMPISOIN (1<<20) 223#define GINTSTS_OEPINT (1<<19) 224#define GINTSTS_IEPINT (1<<18) 225#define GINTSTS_EPMIS (1<<17) 226#define GINTSTS_RESTORE_DONE (1<<16) 227#define GINTSTS_EOPF (1<<15) 228#define GINTSTS_ISOOUTDROP (1<<14) 229#define GINTSTS_ENUMDONE (1<<13) 230#define GINTSTS_USBRST (1<<12) 231#define GINTSTS_USBSUSP (1<<11) 232#define GINTSTS_ERLYSUSP (1<<10) 233#define GINTSTS_I2CINT (1<<9) 234#define GINTSTS_ULPICKINT (1<<8) 235#define GINTSTS_GOUTNAKEFF (1<<7) 236#define GINTSTS_GINNAKEFF (1<<6) 237#define GINTSTS_NPTXFEMP (1<<5) 238#define GINTSTS_RXFLVL (1<<4) 239#define GINTSTS_SOF (1<<3) 240#define GINTSTS_OTGINT (1<<2) 241#define GINTSTS_MODEMIS (1<<1) 242#define GINTSTS_CURMOD (1<<0) 243 244#define GINTMSK_WKUPINTMSK (1<<31) 245#define GINTMSK_SESSREQINTMSK (1<<30) 246#define GINTMSK_DISCONNINTMSK (1<<29) 247#define GINTMSK_CONIDSTSCHNGMSK (1<<28) 248#define GINTMSK_PTXFEMPMSK (1<<26) 249#define GINTMSK_HCHINTMSK (1<<25) 250#define GINTMSK_PRTINTMSK (1<<24) 251#define GINTMSK_FETSUSPMSK (1<<22) 252#define GINTMSK_INCOMPLPMSK (1<<21) 253#define GINTMSK_INCOMPISOINMSK (1<<20) 254#define GINTMSK_OEPINTMSK (1<<19) 255#define GINTMSK_IEPINTMSK (1<<18) 256#define GINTMSK_EPMISMSK (1<<17) 257#define GINTMSK_EOPFMSK (1<<15) 258#define GINTMSK_ISOOUTDROPMSK (1<<14) 259#define GINTMSK_ENUMDONEMSK (1<<13) 260#define GINTMSK_USBRSTMSK (1<<12) 261#define GINTMSK_USBSUSPMSK (1<<11) 262#define GINTMSK_ERLYSUSPMSK (1<<10) 263#define GINTMSK_I2CINTMSK (1<<9) 264#define GINTMSK_ULPICKINTMSK (1<<8) 265#define GINTMSK_GOUTNAKEFFMSK (1<<7) 266#define GINTMSK_GINNAKEFFMSK (1<<6) 267#define GINTMSK_NPTXFEMPMSK (1<<5) 268#define GINTMSK_RXFLVLMSK (1<<4) 269#define GINTMSK_SOFMSK (1<<3) 270#define GINTMSK_OTGINTMSK (1<<2) 271#define GINTMSK_MODEMISMSK (1<<1) 272#define GINTMSK_CURMODMSK (1<<0) 273 274#define GRXSTSRH_PKTSTS_MASK 0x001e0000 275#define GRXSTSRH_PKTSTS_SHIFT 17 276#define GRXSTSRH_DPID_MASK 0x00018000 277#define GRXSTSRH_DPID_SHIFT 15 278#define GRXSTSRH_BCNT_MASK 0x00007ff0 279#define GRXSTSRH_BCNT_SHIFT 4 280#define GRXSTSRH_CHNUM_MASK 0x0000000f 281#define GRXSTSRH_CHNUM_SHIFT 0 282 283#define GRXSTSRD_FN_MASK 0x01e00000 284#define GRXSTSRD_FN_GET(x) (((x) >> 21) & 15) 285#define GRXSTSRD_FN_SHIFT 21 286#define GRXSTSRD_PKTSTS_MASK 0x001e0000 287#define GRXSTSRD_PKTSTS_SHIFT 17 288#define GRXSTSRH_IN_DATA (2<<17) 289#define GRXSTSRH_IN_COMPLETE (3<<17) 290#define GRXSTSRH_DT_ERROR (5<<17) 291#define GRXSTSRH_HALTED (7<<17) 292#define GRXSTSRD_GLOB_OUT_NAK (1<<17) 293#define GRXSTSRD_OUT_DATA (2<<17) 294#define GRXSTSRD_OUT_COMPLETE (3<<17) 295#define GRXSTSRD_STP_COMPLETE (4<<17) 296#define GRXSTSRD_STP_DATA (6<<17) 297#define GRXSTSRD_DPID_MASK 0x00018000 298#define GRXSTSRD_DPID_SHIFT 15 299#define GRXSTSRD_DPID_DATA0 (0<<15) 300#define GRXSTSRD_DPID_DATA1 (2<<15) 301#define GRXSTSRD_DPID_DATA2 (1<<15) 302#define GRXSTSRD_DPID_MDATA (3<<15) 303#define GRXSTSRD_BCNT_MASK 0x00007ff0 304#define GRXSTSRD_BCNT_GET(x) (((x) >> 4) & 0x7FF) 305#define GRXSTSRD_BCNT_SHIFT 4 306#define GRXSTSRD_CHNUM_MASK 0x0000000f 307#define GRXSTSRD_CHNUM_GET(x) ((x) & 15) 308#define GRXSTSRD_CHNUM_SHIFT 0 309 310#define GRXFSIZ_RXFDEP_MASK 0x0000ffff 311#define GRXFSIZ_RXFDEP_SHIFT 0 312 313#define GNPTXFSIZ_NPTXFDEP_MASK 0xffff0000 314#define GNPTXFSIZ_NPTXFDEP_SHIFT 0 315#define GNPTXFSIZ_NPTXFSTADDR_MASK 0x0000ffff 316#define GNPTXFSIZ_NPTXFSTADDR_SHIFT 16 317 318#define GNPTXSTS_NPTXQTOP_SHIFT 24 319#define GNPTXSTS_NPTXQTOP_MASK 0x7f000000 320#define GNPTXSTS_NPTXQSPCAVAIL_SHIFT 16 321#define GNPTXSTS_NPTXQSPCAVAIL_MASK 0x00ff0000 322#define GNPTXSTS_NPTXFSPCAVAIL_SHIFT 0 323#define GNPTXSTS_NPTXFSPCAVAIL_MASK 0x0000ffff 324 325#define GI2CCTL_BSYDNE_SC (1<<31) 326#define GI2CCTL_RW (1<<30) 327#define GI2CCTL_I2CDATSE0 (1<<28) 328#define GI2CCTL_I2CDEVADR_SHIFT 26 329#define GI2CCTL_I2CDEVADR_MASK 0x0c000000 330#define GI2CCTL_I2CSUSPCTL (1<<25) 331#define GI2CCTL_ACK (1<<24) 332#define GI2CCTL_I2CEN (1<<23) 333#define GI2CCTL_ADDR_SHIFT 16 334#define GI2CCTL_ADDR_MASK 0x007f0000 335#define GI2CCTL_REGADDR_SHIFT 8 336#define GI2CCTL_REGADDR_MASK 0x0000ff00 337#define GI2CCTL_RWDATA_SHIFT 0 338#define GI2CCTL_RWDATA_MASK 0x000000ff 339 340#define GPVNDCTL_DISULPIDRVR (1<<31) 341#define GPVNDCTL_VSTSDONE (1<<27) 342#define GPVNDCTL_VSTSBSY (1<<26) 343#define GPVNDCTL_NEWREGREQ (1<<25) 344#define GPVNDCTL_REGWR (1<<22) 345#define GPVNDCTL_REGADDR_SHIFT 16 346#define GPVNDCTL_REGADDR_MASK 0x003f0000 347#define GPVNDCTL_VCTRL_SHIFT 8 348#define GPVNDCTL_VCTRL_MASK 0x0000ff00 349#define GPVNDCTL_REGDATA_SHIFT 0 350#define GPVNDCTL_REGDATA_MASK 0x000000ff 351 352#define GGPIO_GPO_SHIFT 16 353#define GGPIO_GPO_MASK 0xffff0000 354#define GGPIO_GPI_SHIFT 0 355#define GGPIO_GPI_MASK 0x0000ffff 356 357#define GHWCFG1_GET_DIR(x, n) (((x) >> (2 * (n))) & 3) 358#define GHWCFG1_BIDIR 0 359#define GHWCFG1_IN 1 360#define GHWCFG1_OUT 2 361 362#define GHWCFG2_TKNQDEPTH_SHIFT 26 363#define GHWCFG2_TKNQDEPTH_MASK 0x7c000000 364#define GHWCFG2_PTXQDEPTH_SHIFT 24 365#define GHWCFG2_PTXQDEPTH_MASK 0x03000000 366#define GHWCFG2_NPTXQDEPTH_SHIFT 22 367#define GHWCFG2_NPTXQDEPTH_MASK 0x00c00000 368#define GHWCFG2_MPI (1<<20) 369#define GHWCFG2_DYNFIFOSIZING (1<<19) 370#define GHWCFG2_PERIOSUPPORT (1<<18) 371#define GHWCFG2_NUMHSTCHNL_SHIFT 14 372#define GHWCFG2_NUMHSTCHNL_MASK 0x0003c000 373#define GHWCFG2_NUMHSTCHNL_GET(x) ((((x) >> 14) & 15) + 1) 374#define GHWCFG2_NUMDEVEPS_SHIFT 10 375#define GHWCFG2_NUMDEVEPS_MASK 0x00003c00 376#define GHWCFG2_NUMDEVEPS_GET(x) ((((x) >> 10) & 15) + 1) 377#define GHWCFG2_FSPHYTYPE_SHIFT 8 378#define GHWCFG2_FSPHYTYPE_MASK 0x00000300 379#define GHWCFG2_HSPHYTYPE_SHIFT 6 380#define GHWCFG2_HSPHYTYPE_MASK 0x000000c0 381#define GHWCFG2_SINGPNT (1<<5) 382#define GHWCFG2_OTGARCH_SHIFT 3 383#define GHWCFG2_OTGARCH_MASK 0x00000018 384#define GHWCFG2_OTGMODE_SHIFT 0 385#define GHWCFG2_OTGMODE_MASK 0x00000007 386 387#define GHWCFG3_DFIFODEPTH_SHIFT 16 388#define GHWCFG3_DFIFODEPTH_MASK 0xffff0000 389#define GHWCFG3_DFIFODEPTH_GET(x) ((x) >> 16) 390#define GHWCFG3_RSTTYPE (1<<11) 391#define GHWCFG3_OPTFEATURE (1<<10) 392#define GHWCFG3_VNDCTLSUPT (1<<9) 393#define GHWCFG3_I2CINTSEL (1<<8) 394#define GHWCFG3_OTGEN (1<<7) 395#define GHWCFG3_PKTSIZEWIDTH_SHIFT 4 396#define GHWCFG3_PKTSIZEWIDTH_MASK 0x00000070 397#define GHWCFG3_PKTSIZE_GET(x) (0x10<<(((x) >> 4) & 7)) 398#define GHWCFG3_XFERSIZEWIDTH_SHIFT 0 399#define GHWCFG3_XFERSIZEWIDTH_MASK 0x0000000f 400#define GHWCFG3_XFRRSIZE_GET(x) (0x400<<(((x) >> 0) & 15)) 401 402#define GHWCFG4_NUM_IN_EP_GET(x) ((((x) >> 26) & 15) + 1) 403#define GHWCFG4_SESSENDFLTR (1<<24) 404#define GHWCFG4_BVALIDFLTR (1<<23) 405#define GHWCFG4_AVALIDFLTR (1<<22) 406#define GHWCFG4_VBUSVALIDFLTR (1<<21) 407#define GHWCFG4_IDDGFLTR (1<<20) 408#define GHWCFG4_NUMCTLEPS_SHIFT 16 409#define GHWCFG4_NUMCTLEPS_MASK 0x000f0000 410#define GHWCFG4_NUMCTLEPS_GET(x) (((x) >> 16) & 15) 411#define GHWCFG4_PHYDATAWIDTH_SHIFT 14 412#define GHWCFG4_PHYDATAWIDTH_MASK 0x0000c000 413#define GHWCFG4_AHBFREQ (1<<5) 414#define GHWCFG4_ENABLEPWROPT (1<<4) 415#define GHWCFG4_NUMDEVPERIOEPS_SHIFT 0 416#define GHWCFG4_NUMDEVPERIOEPS_MASK 0x0000000f 417#define GHWCFG4_NUMDEVPERIOEPS_GET(x) (((x) >> 0) & 15) 418 419#define GLPMCFG_HSIC_CONN (1<<30) 420 421#define GPWRDN_BVALID (1<<22) 422#define GPWRDN_IDDIG (1<<21) 423#define GPWRDN_CONNDET_INT (1<<14) 424#define GPWRDN_CONNDET (1<<13) 425#define GPWRDN_DISCONN_INT (1<<12) 426#define GPWRDN_DISCONN (1<<11) 427#define GPWRDN_RESETDET_INT (1<<10) 428#define GPWRDN_RESETDET (1<<9) 429#define GPWRDN_LINESTATE_INT (1<<8) 430#define GPWRDN_LINESTATE (1<<7) 431#define GPWRDN_DISABLE_VBUS (1<<6) 432#define GPWRDN_POWER_DOWN (1<<5) 433#define GPWRDN_POWER_DOWN_RST (1<<4) 434#define GPWRDN_POWER_DOWN_CLAMP (1<<3) 435#define GPWRDN_RESTORE (1<<2) 436#define GPWRDN_PMU_ACTIVE (1<<1) 437#define GPWRDN_PMU_IRQ_SEL (1<<0) 438 439#define HPTXFSIZ_PTXFSIZE_SHIFT 16 440#define HPTXFSIZ_PTXFSIZE_MASK 0xffff0000 441#define HPTXFSIZ_PTXFSTADDR_SHIFT 0 442#define HPTXFSIZ_PTXFSTADDR_MASK 0x0000ffff 443 444#define DPTXFSIZN_DPTXFSIZE_SHIFT 16 445#define DPTXFSIZN_DPTXFSIZE_MASK 0xffff0000 446#define DPTXFSIZN_PTXFSTADDR_SHIFT 0 447#define DPTXFSIZN_PTXFSTADDR_MASK 0x0000ffff 448 449#define DIEPTXFN_INEPNTXFDEP_SHIFT 16 450#define DIEPTXFN_INEPNTXFDEP_MASK 0xffff0000 451#define DIEPTXFN_INEPNTXFSTADDR_SHIFT 0 452#define DIEPTXFN_INEPNTXFSTADDR_MASK 0x0000ffff 453 454#define HCFG_MODECHANGERDY (1<<31) 455#define HCFG_PERSCHEDENABLE (1<<26) 456#define HCFG_FLENTRIES_SHIFT 24 457#define HCFG_FLENTRIES_MASK 0x03000000 458#define HCFG_FLENTRIES_8 (0) 459#define HCFG_FLENTRIES_16 (1) 460#define HCFG_FLENTRIES_32 (2) 461#define HCFG_FLENTRIES_64 (3) 462#define HCFG_MULTISEGDMA (1<<23) 463#define HCFG_32KHZSUSPEND (1<<7) 464#define HCFG_FSLSSUPP (1<<2) 465#define HCFG_FSLSPCLKSEL_SHIFT 0 466#define HCFG_FSLSPCLKSEL_MASK 0x00000003 467 468#define HFIR_RELOADCTRL (1<<16) 469#define HFIR_FRINT_SHIFT 0 470#define HFIR_FRINT_MASK 0x0000ffff 471 472#define HFNUM_FRREM_SHIFT 16 473#define HFNUM_FRREM_MASK 0xffff0000 474#define HFNUM_FRNUM_SHIFT 0 475#define HFNUM_FRNUM_MASK 0x0000ffff 476 477#define HPTXSTS_ODD (1<<31) 478#define HPTXSTS_CHAN_SHIFT 27 479#define HPTXSTS_CHAN_MASK 0x78000000 480#define HPTXSTS_TOKEN_SHIFT 25 481#define HPTXSTS_TOKEN_MASK 0x06000000 482#define HPTXSTS_TOKEN_ZL 0 483#define HPTXSTS_TOKEN_PING 1 484#define HPTXSTS_TOKEN_DISABLE 2 485#define HPTXSTS_TERMINATE (1<<24) 486#define HPTXSTS_PTXQSPCAVAIL_SHIFT 16 487#define HPTXSTS_PTXQSPCAVAIL_MASK 0x00ff0000 488#define HPTXSTS_PTXFSPCAVAIL_SHIFT 0 489#define HPTXSTS_PTXFSPCAVAIL_MASK 0x0000ffff 490 491#define HAINT_HAINT_SHIFT 0 492#define HAINT_HAINT_MASK 0x0000ffff 493#define HAINTMSK_HAINTMSK_SHIFT 0 494#define HAINTMSK_HAINTMSK_MASK 0x0000ffff 495 496#define HPRT_PRTSPD_SHIFT 17 497#define HPRT_PRTSPD_MASK 0x00060000 498#define HPRT_PRTSPD_HIGH 0 499#define HPRT_PRTSPD_FULL 1 500#define HPRT_PRTSPD_LOW 2 501#define HPRT_PRTSPD_MASK 0x00060000 502#define HPRT_PRTTSTCTL_SHIFT 13 503#define HPRT_PRTTSTCTL_MASK 0x0001e000 504#define HPRT_PRTPWR (1<<12) 505#define HPRT_PRTLNSTS_SHIFT 10 506#define HPRT_PRTLNSTS_MASK 0x00000c00 507#define HPRT_PRTRST (1<<8) 508#define HPRT_PRTSUSP (1<<7) 509#define HPRT_PRTRES (1<<6) 510#define HPRT_PRTOVRCURRCHNG (1<<5) 511#define HPRT_PRTOVRCURRACT (1<<4) 512#define HPRT_PRTENCHNG (1<<3) 513#define HPRT_PRTENA (1<<2) 514#define HPRT_PRTCONNDET (1<<1) 515#define HPRT_PRTCONNSTS (1<<0) 516 517#define HCCHAR_CHENA (1<<31) 518#define HCCHAR_CHDIS (1<<30) 519#define HCCHAR_ODDFRM (1<<29) 520#define HCCHAR_DEVADDR_SHIFT 22 521#define HCCHAR_DEVADDR_MASK 0x1fc00000 522#define HCCHAR_MC_SHIFT 20 523#define HCCHAR_MC_MASK 0x00300000 524#define HCCHAR_EPTYPE_SHIFT 18 525#define HCCHAR_EPTYPE_MASK 0x000c0000 526#define HCCHAR_LSPDDEV (1<<17) 527#define HCCHAR_EPDIR (1<<15) 528#define HCCHAR_EPDIR_IN (1<<15) 529#define HCCHAR_EPDIR_OUT 0 530#define HCCHAR_EPNUM_SHIFT 11 531#define HCCHAR_EPNUM_MASK 0x00007800 532#define HCCHAR_MPS_SHIFT 0 533#define HCCHAR_MPS_MASK 0x000007ff 534 535#define HCSPLT_SPLTENA (1<<31) 536#define HCSPLT_COMPSPLT (1<<16) 537#define HCSPLT_XACTPOS_SHIFT 14 538#define HCSPLT_XACTPOS_MASK 0x0000c000 539#define HCSPLT_HUBADDR_SHIFT 7 540#define HCSPLT_HUBADDR_MASK 0x00003f80 541#define HCSPLT_PRTADDR_SHIFT 0 542#define HCSPLT_PRTADDR_MASK 0x0000007f 543 544#define HCINT_ERRORS \ 545 (HCINT_BBLERR | HCINT_XACTERR) 546#define HCINT_RETRY \ 547 (HCINT_DATATGLERR | HCINT_FRMOVRUN | HCINT_NAK) 548 549#define HCINT_SOFTWARE_ONLY (1<<20) /* BSD only */ 550#define HCINT_DATATGLERR (1<<10) 551#define HCINT_FRMOVRUN (1<<9) 552#define HCINT_BBLERR (1<<8) 553#define HCINT_XACTERR (1<<7) 554#define HCINT_NYET (1<<6) 555#define HCINT_ACK (1<<5) 556#define HCINT_NAK (1<<4) 557#define HCINT_STALL (1<<3) 558#define HCINT_AHBERR (1<<2) 559#define HCINT_CHHLTD (1<<1) 560#define HCINT_XFERCOMPL (1<<0) 561 562#define HCINTMSK_DATATGLERRMSK (1<<10) 563#define HCINTMSK_FRMOVRUNMSK (1<<9) 564#define HCINTMSK_BBLERRMSK (1<<8) 565#define HCINTMSK_XACTERRMSK (1<<7) 566#define HCINTMSK_NYETMSK (1<<6) 567#define HCINTMSK_ACKMSK (1<<5) 568#define HCINTMSK_NAKMSK (1<<4) 569#define HCINTMSK_STALLMSK (1<<3) 570#define HCINTMSK_AHBERRMSK (1<<2) 571#define HCINTMSK_CHHLTDMSK (1<<1) 572#define HCINTMSK_XFERCOMPLMSK (1<<0) 573 574#define HCTSIZ_DOPNG (1<<31) 575#define HCTSIZ_PID_SHIFT 29 576#define HCTSIZ_PID_MASK 0x60000000 577#define HCTSIZ_PID_DATA0 0 578#define HCTSIZ_PID_DATA2 1 579#define HCTSIZ_PID_DATA1 2 580#define HCTSIZ_PID_MDATA 3 581#define HCTSIZ_PID_SETUP 3 582#define HCTSIZ_PKTCNT_SHIFT 19 583#define HCTSIZ_PKTCNT_MASK 0x1ff80000 584#define HCTSIZ_XFERSIZE_SHIFT 0 585#define HCTSIZ_XFERSIZE_MASK 0x0007ffff 586 587#define DCFG_EPMISCNT_SHIFT 18 588#define DCFG_EPMISCNT_MASK 0x007c0000 589#define DCFG_PERFRINT_SHIFT 11 590#define DCFG_PERFRINT_MASK 0x00001800 591#define DCFG_DEVADDR_SHIFT 4 592#define DCFG_DEVADDR_MASK 0x000007f0 593#define DCFG_DEVADDR_SET(x) (((x) & 0x7F) << 4) 594#define DCFG_NZSTSOUTHSHK (1<<2) 595#define DCFG_DEVSPD_SHIFT 0 596#define DCFG_DEVSPD_MASK 0x00000003 597#define DCFG_DEVSPD_SET(x) ((x) & 0x3) 598#define DCFG_DEVSPD_HI 0 599#define DCFG_DEVSPD_FULL20 1 600#define DCFG_DEVSPD_FULL10 3 601 602#define DCTL_PWRONPRGDONE (1<<11) 603#define DCTL_CGOUTNAK (1<<10) 604#define DCTL_SGOUTNAK (1<<9) 605#define DCTL_CGNPINNAK (1<<8) 606#define DCTL_SGNPINNAK (1<<7) 607#define DCTL_TSTCTL_SHIFT 4 608#define DCTL_TSTCTL_MASK 0x00000070 609#define DCTL_GOUTNAKSTS (1<<3) 610#define DCTL_GNPINNAKSTS (1<<2) 611#define DCTL_SFTDISCON (1<<1) 612#define DCTL_RMTWKUPSIG (1<<0) 613 614#define DSTS_SOFFN_SHIFT 8 615#define DSTS_SOFFN_MASK 0x003fff00 616#define DSTS_SOFFN_GET(x) (((x) >> 8) & 0x3FFF) 617#define DSTS_ERRTICERR (1<<3) 618#define DSTS_ENUMSPD_SHIFT 1 619#define DSTS_ENUMSPD_MASK 0x00000006 620#define DSTS_ENUMSPD_GET(x) (((x) >> 1) & 3) 621#define DSTS_ENUMSPD_HI 0 622#define DSTS_ENUMSPD_FULL20 1 623#define DSTS_ENUMSPD_LOW10 2 624#define DSTS_ENUMSPD_FULL10 3 625#define DSTS_SUSPSTS (1<<0) 626 627#define DIEPMSK_TXFIFOUNDRNMSK (1<<8) 628#define DIEPMSK_INEPNAKEFFMSK (1<<6) 629#define DIEPMSK_INTKNEPMISMSK (1<<5) 630#define DIEPMSK_INTKNTXFEMPMSK (1<<4) 631#define DIEPMSK_FIFOEMPTY (1<<4) 632#define DIEPMSK_TIMEOUTMSK (1<<3) 633#define DIEPMSK_AHBERRMSK (1<<2) 634#define DIEPMSK_EPDISBLDMSK (1<<1) 635#define DIEPMSK_XFERCOMPLMSK (1<<0) 636 637#define DOEPMSK_OUTPKTERRMSK (1<<8) 638#define DOEPMSK_BACK2BACKSETUP (1<<6) 639#define DOEPMSK_OUTTKNEPDISMSK (1<<4) 640#define DOEPMSK_FIFOEMPTY (1<<4) 641#define DOEPMSK_SETUPMSK (1<<3) 642#define DOEPMSK_AHBERRMSK (1<<2) 643#define DOEPMSK_EPDISBLDMSK (1<<1) 644#define DOEPMSK_XFERCOMPLMSK (1<<0) 645 646#define DIEPINT_TXFIFOUNDRN (1<<8) 647#define DIEPINT_INEPNAKEFF (1<<6) 648#define DIEPINT_INTKNEPMIS (1<<5) 649#define DIEPINT_INTKNTXFEMP (1<<4) 650#define DIEPINT_TIMEOUT (1<<3) 651#define DIEPINT_AHBERR (1<<2) 652#define DIEPINT_EPDISBLD (1<<1) 653#define DIEPINT_XFERCOMPL (1<<0) 654 655#define DOEPINT_OUTPKTERR (1<<8) 656#define DOEPINT_BACK2BACKSETUP (1<<6) 657#define DOEPINT_OUTTKNEPDIS (1<<4) 658#define DOEPINT_SETUP (1<<3) 659#define DOEPINT_AHBERR (1<<2) 660#define DOEPINT_EPDISBLD (1<<1) 661#define DOEPINT_XFERCOMPL (1<<0) 662 663#define DAINT_INEPINT_MASK 0xffff0000 664#define DAINT_INEPINT_SHIFT 0 665#define DAINT_OUTEPINT_MASK 0x0000ffff 666#define DAINT_OUTEPINT_SHIFT 16 667 668#define DAINTMSK_INEPINT_MASK 0xffff0000 669#define DAINTMSK_INEPINT_SHIFT 0 670#define DAINTMSK_OUTEPINT_MASK 0x0000ffff 671#define DAINTMSK_OUTEPINT_SHIFT 16 672 673#define DTKNQR1_EPTKN_SHIFT 8 674#define DTKNQR1_EPTKN_MASK 0xffffff00 675#define DTKNQR1_WRAPBIT (1<<7) 676#define DTKNQR1_INTKNWPTR_SHIFT 0 677#define DTKNQR1_INTKNWPTR_MASK 0x0000001f 678 679#define DVBUSDIS_DVBUSDIS_SHIFT 0 680#define DVBUSDIS_DVBUSDIS_MASK 0x0000ffff 681 682#define DVBUSPULSE_DVBUSPULSE_SHIFT 0 683#define DVBUSPULSE_DVBUSPULSE_MASK 0x00000fff 684 685#define DTHRCTL_ARBPRKEN (1<<27) 686#define DTHRCTL_RXTHRLEN_SHIFT 17 687#define DTHRCTL_RXTHRLEN_MASK 0x03fe0000 688#define DTHRCTL_RXTHREN (1<<16) 689#define DTHRCTL_TXTHRLEN_SHIFT 2 690#define DTHRCTL_TXTHRLEN_MASK 0x000007fc 691#define DTHRCTL_ISOTHREN (1<<1) 692#define DTHRCTL_NONISOTHREN (1<<0) 693 694#define DIEPEMPMSK_INEPTXFEMPMSK_SHIFT 0 695#define DIEPEMPMSK_INEPTXFEMPMSK_MASK 0x0000ffff 696 697#define DIEPCTL_EPENA (1<<31) 698#define DIEPCTL_EPDIS (1<<30) 699#define DIEPCTL_SETD1PID (1<<29) 700#define DIEPCTL_SETD0PID (1<<28) 701#define DIEPCTL_SNAK (1<<27) 702#define DIEPCTL_CNAK (1<<26) 703#define DIEPCTL_TXFNUM_SHIFT 22 704#define DIEPCTL_TXFNUM_MASK 0x03c00000 705#define DIEPCTL_TXFNUM_SET(n) (((n) & 15) << 22) 706#define DIEPCTL_STALL (1<<21) 707#define DIEPCTL_EPTYPE_SHIFT 18 708#define DIEPCTL_EPTYPE_MASK 0x000c0000 709#define DIEPCTL_EPTYPE_SET(n) (((n) & 3) << 18) 710#define DIEPCTL_EPTYPE_CONTROL 0 711#define DIEPCTL_EPTYPE_ISOC 1 712#define DIEPCTL_EPTYPE_BULK 2 713#define DIEPCTL_EPTYPE_INTERRUPT 3 714#define DIEPCTL_NAKSTS (1<<17) 715#define DIEPCTL_USBACTEP (1<<15) 716#define DIEPCTL_NEXTEP_SHIFT 11 717#define DIEPCTL_NEXTEP_MASK 0x00007800 718#define DIEPCTL_MPS_SHIFT 0 719#define DIEPCTL_MPS_MASK 0x000007ff 720#define DIEPCTL_MPS_SET(n) ((n) & 0x7FF) 721#define DIEPCTL_MPS_64 (0<<0) 722#define DIEPCTL_MPS_32 (1<<0) 723#define DIEPCTL_MPS_16 (2<<0) 724#define DIEPCTL_MPS_8 (3<<0) 725 726#define DOEPCTL_EPENA (1<<31) 727#define DOEPCTL_EPDIS (1<<30) 728#define DOEPCTL_SETD1PID (1<<29) 729#define DOEPCTL_SETD0PID (1<<28) 730#define DOEPCTL_SNAK (1<<27) 731#define DOEPCTL_CNAK (1<<26) 732#define DOEPCTL_FNUM_SET(n) (((n) & 15) << 22) 733#define DOEPCTL_STALL (1<<21) 734#define DOEPCTL_EPTYPE_SHIFT 18 735#define DOEPCTL_EPTYPE_MASK 0x000c0000 736#define DOEPCTL_EPTYPE_SET(n) (((n) & 3) << 18) 737#define DOEPCTL_NAKSTS (1<<17) 738#define DOEPCTL_USBACTEP (1<<15) 739#define DOEPCTL_MPS_SHIFT 0 740#define DOEPCTL_MPS_MASK 0x000007ff 741#define DOEPCTL_MPS_SET(n) ((n) & 0x7FF) 742#define DOEPCTL_MPS_64 (0<<0) 743#define DOEPCTL_MPS_32 (1<<0) 744#define DOEPCTL_MPS_16 (2<<0) 745#define DOEPCTL_MPS_8 (3<<0) 746 747/* common bits */ 748#define DXEPINT_TXFEMP (1<<7) 749#define DXEPINT_SETUP (1<<3) 750#define DXEPINT_XFER_COMPL (1<<0) 751 752#define DIEPTSIZ_XFERSIZE_MASK 0x0007ffff 753#define DIEPTSIZ_XFERSIZE_SHIFT 0 754#define DIEPTSIZ_PKTCNT_MASK 0x1ff80000 755#define DIEPTSIZ_PKTCNT_SHIFT 19 756#define DIEPTSIZ_MC_MASK 0x60000000 757#define DIEPTSIZ_MC_SHIFT 29 758 759#define DOEPTSIZ_XFERSIZE_MASK 0x0007ffff 760#define DOEPTSIZ_XFERSIZE_SHIFT 0 761#define DOEPTSIZ_PKTCNT_MASK 0x1ff80000 762#define DOEPTSIZ_PKTCNT_SHIFT 19 763#define DOEPTSIZ_MC_MASK 0x60000000 764#define DOEPTSIZ_MC_SHIFT 29 765 766/* common bits */ 767#define DXEPTSIZ_SET_MULTI(n) (((n) & 3) << 29) 768#define DXEPTSIZ_SET_NPKT(n) (((n) & 0x3FF) << 19) 769#define DXEPTSIZ_GET_NPKT(n) (((n) >> 19) & 0x3FF) 770#define DXEPTSIZ_SET_NBYTES(n) (((n) & 0x7FFFFF) << 0) 771#define DXEPTSIZ_GET_NBYTES(n) (((n) >> 0) & 0x7FFFFF) 772 773/* generic endpoint mask */ 774 775#define ENDPOINT_MASK(x,in) \ 776 ((in) ? (1U << ((x) & 15U)) : \ 777 (0x10000U << ((x) & 15U))) 778 779#endif /* _DWC_OTGREG_H_ */ 780