vibes.c revision 74797
1/* 2 * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * This card has the annoying habit of "clicking" when attached and 27 * detached, haven't been able to remedy this with any combination of 28 * muting. 29 * 30 * $FreeBSD: head/sys/dev/sound/pci/vibes.c 74797 2001-03-25 21:43:24Z cg $ */ 31 32#include <dev/sound/pcm/sound.h> 33#include <dev/sound/pci/vibes.h> 34 35#include <pci/pcireg.h> 36#include <pci/pcivar.h> 37 38#include "mixer_if.h" 39 40/* ------------------------------------------------------------------------- */ 41/* Constants */ 42 43#define SV_PCI_ID 0xca005333 44#define SV_MAX_BUFFER 8192 45#define SV_MIN_BUFFER 128 46#define SV_INTR_PER_BUFFER 2 47 48#ifndef DEB 49#define DEB(x) /* (x) */ 50#endif 51 52/* ------------------------------------------------------------------------- */ 53/* Structures */ 54 55struct sc_info; 56 57struct sc_chinfo { 58 struct sc_info *parent; 59 struct pcm_channel *channel; 60 struct snd_dbuf *buffer; 61 u_int32_t fmt, spd; 62 int dir; 63 int dma_active, dma_was_active; 64}; 65 66struct sc_info { 67 device_t dev; 68 69 /* DMA buffer allocator */ 70 bus_dma_tag_t parent_dmat; 71 72 /* Enhanced register resources */ 73 struct resource *enh_reg; 74 bus_space_tag_t enh_st; 75 bus_space_handle_t enh_sh; 76 int enh_type; 77 int enh_rid; 78 79 /* DMA configuration */ 80 struct resource *dmaa_reg, *dmac_reg; 81 bus_space_tag_t dmaa_st, dmac_st; 82 bus_space_handle_t dmaa_sh, dmac_sh; 83 int dmaa_type, dmac_type; 84 int dmaa_rid, dmac_rid; 85 86 /* Interrupt resources */ 87 struct resource *irq; 88 int irqid; 89 void *ih; 90 91 struct sc_chinfo rch, pch; 92 u_int8_t rev; 93}; 94 95static u_int32_t sc_fmt[] = { 96 AFMT_U8, 97 AFMT_U8 | AFMT_STEREO, 98 AFMT_S16_LE, 99 AFMT_S16_LE | AFMT_STEREO, 100 0 101}; 102 103static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0}; 104 105/* ------------------------------------------------------------------------- */ 106/* Register Manipulations */ 107 108#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__) 109 110static u_int8_t 111sv_direct_get(struct sc_info *sc, u_int8_t reg) 112{ 113 return bus_space_read_1(sc->enh_st, sc->enh_sh, reg); 114} 115 116static void 117_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 118{ 119 u_int8_t n; 120 bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val); 121 122 n = sv_direct_get(sc, reg); 123 if (n != val) { 124 device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line); 125 } 126} 127 128static u_int8_t 129sv_indirect_get(struct sc_info *sc, u_int8_t reg) 130{ 131 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 132 reg |= SV_CM_INDEX_MCE; 133 134 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 135 return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA); 136} 137 138#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__) 139 140static void 141_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 142{ 143 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 144 reg |= SV_CM_INDEX_MCE; 145 146 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 147 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val); 148 149 reg &= ~SV_CM_INDEX_MCE; 150 if (reg != SV_REG_ADC_PLLM) { 151 u_int8_t n; 152 n = sv_indirect_get(sc, reg); 153 if (n != val) { 154 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line); 155 } 156 } 157} 158 159static void 160sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh, 161 u_int32_t base, u_int32_t count, u_int8_t mode) 162{ 163 bus_space_write_4(st, sh, SV_DMA_ADDR, base); 164 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff); 165 bus_space_write_1(st, sh, SV_DMA_MODE, mode); 166 167 DEB(printf("base 0x%08x count %5d mode 0x%02x\n", 168 base, count, mode)); 169} 170 171static u_int32_t 172sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh) 173{ 174 return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff; 175} 176 177/* ------------------------------------------------------------------------- */ 178/* Play / Record Common Interface */ 179 180static void * 181svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 182{ 183 struct sc_info *sc = devinfo; 184 struct sc_chinfo *ch; 185 ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; 186 187 ch->parent = sc; 188 ch->channel = c; 189 ch->dir = dir; 190 191 if (sndbuf_alloc(b, sc->parent_dmat, SV_MAX_BUFFER) != 0) { 192 DEB(printf("svchan_init failed\n")); 193 return NULL; 194 } 195 ch->buffer = b; 196 ch->fmt = AFMT_U8; 197 ch->spd = DSP_DEFAULT_SPEED; 198 ch->dma_active = ch->dma_was_active = 0; 199 200 return ch; 201} 202 203static struct pcmchan_caps * 204svchan_getcaps(kobj_t obj, void *data) 205{ 206 return &sc_caps; 207} 208 209static int 210svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 211{ 212 struct sc_chinfo *ch = data; 213 214 /* user has requested interrupts every blocksize bytes */ 215 RANGE(blocksize, SV_MIN_BUFFER, SV_MAX_BUFFER / SV_INTR_PER_BUFFER); 216 sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize); 217 DEB(printf("svchan_setblocksize: %d\n", blocksize)); 218 return sndbuf_getsize(ch->buffer); 219} 220 221static int 222svchan_setformat(kobj_t obj, void *data, u_int32_t format) 223{ 224 struct sc_chinfo *ch = data; 225 /* NB Just note format here as setting format register 226 * generates noise if dma channel is inactive. */ 227 ch->fmt = (format & AFMT_STEREO) ? SV_AFMT_STEREO : SV_AFMT_MONO; 228 ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8; 229 return 0; 230} 231 232static int 233svchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 234{ 235 struct sc_chinfo *ch = data; 236 RANGE(speed, 8000, 48000); 237 ch->spd = speed; 238 return speed; 239} 240 241/* ------------------------------------------------------------------------- */ 242/* Recording interface */ 243 244static int 245sv_set_recspeed(struct sc_info *sc, u_int32_t speed) 246{ 247 u_int32_t f_out, f_actual; 248 u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0; 249 int32_t m, best_m = 0, ms, me, err, min_err; 250 251 /* This algorithm is a variant described in sonicvibes.pdf 252 * appendix A. This search is marginally more extensive and 253 * results in (nominally) better sample rate matching. */ 254 255 f_out = SV_F_SCALE * speed; 256 min_err = 0x7fffffff; 257 258 /* Find bounds of r to examine, rs <= r <= re */ 259 t = 80000000 / f_out; 260 for (rs = 1; (1 << rs) < t; rs++); 261 262 t = 150000000 / f_out; 263 for (re = 1; (2 << re) < t; re++); 264 if (re > 7) re = 7; 265 266 /* Search over r, n, m */ 267 for (r = rs; r <= re; r++) { 268 r2 = (1 << r); 269 for (n = 3; n < 34; n++) { 270 m = f_out * n / (SV_F_REF / r2); 271 ms = (m > 3) ? (m - 1) : 3; 272 me = (m < 129) ? (m + 1) : 129; 273 for (m = ms; m <= me; m++) { 274 f_actual = m * SV_F_REF / (n * r2); 275 if (f_actual > f_out) { 276 err = f_actual - f_out; 277 } else { 278 err = f_out - f_actual; 279 } 280 if (err < min_err) { 281 best_r = r; 282 best_m = m - 2; 283 best_n = n - 2; 284 min_err = err; 285 if (err == 0) break; 286 } 287 } 288 } 289 } 290 291 sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m); 292 sv_indirect_set(sc, SV_REG_ADC_PLLN, 293 SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r)); 294 DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n", 295 speed, 296 sv_indirect_get(sc, SV_REG_ADC_PLLM), 297 sv_indirect_get(sc, SV_REG_ADC_PLLN))); 298 return 0; 299} 300 301static int 302svrchan_trigger(kobj_t obj, void *data, int go) 303{ 304 struct sc_chinfo *ch = data; 305 struct sc_info *sc = ch->parent; 306 u_int32_t count, enable; 307 u_int8_t v; 308 309 switch(go) { 310 case PCMTRIG_START: 311 /* Set speed */ 312 sv_set_recspeed(sc, ch->spd); 313 314 /* Set format */ 315 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK; 316 v |= SV_AFMT_DMAC(ch->fmt); 317 sv_indirect_set(sc, SV_REG_FORMAT, v); 318 319 /* Program DMA */ 320 count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */ 321 sv_dma_set_config(sc->dmac_st, sc->dmac_sh, 322 vtophys(sndbuf_getbuf(ch->buffer)), 323 count - 1, 324 SV_DMA_MODE_AUTO | SV_DMA_MODE_RD); 325 count = count / SV_INTR_PER_BUFFER - 1; 326 sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8); 327 sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff); 328 329 /* Enable DMA */ 330 enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE; 331 sv_indirect_set(sc, SV_REG_ENABLE, enable); 332 ch->dma_active = 1; 333 break; 334 case PCMTRIG_ABORT: 335 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE; 336 sv_indirect_set(sc, SV_REG_ENABLE, enable); 337 ch->dma_active = 0; 338 break; 339 } 340 341 return 0; 342} 343 344static int 345svrchan_getptr(kobj_t obj, void *data) 346{ 347 struct sc_chinfo *ch = data; 348 struct sc_info *sc = ch->parent; 349 u_int32_t sz, remain; 350 351 sz = sndbuf_getsize(ch->buffer); 352 /* DMAC uses words */ 353 remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2; 354 return sz - remain; 355} 356 357static kobj_method_t svrchan_methods[] = { 358 KOBJMETHOD(channel_init, svchan_init), 359 KOBJMETHOD(channel_setformat, svchan_setformat), 360 KOBJMETHOD(channel_setspeed, svchan_setspeed), 361 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 362 KOBJMETHOD(channel_trigger, svrchan_trigger), 363 KOBJMETHOD(channel_getptr, svrchan_getptr), 364 KOBJMETHOD(channel_getcaps, svchan_getcaps), 365 { 0, 0 } 366}; 367CHANNEL_DECLARE(svrchan); 368 369/* ------------------------------------------------------------------------- */ 370/* Playback interface */ 371 372static int 373svpchan_trigger(kobj_t obj, void *data, int go) 374{ 375 struct sc_chinfo *ch = data; 376 struct sc_info *sc = ch->parent; 377 u_int32_t count, enable, speed; 378 u_int8_t v; 379 380 switch(go) { 381 case PCMTRIG_START: 382 /* Set speed */ 383 speed = (ch->spd * 65536) / 48000; 384 if (speed > 65535) 385 speed = 65535; 386 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8); 387 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff); 388 389 /* Set format */ 390 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK; 391 v |= SV_AFMT_DMAA(ch->fmt); 392 sv_indirect_set(sc, SV_REG_FORMAT, v); 393 394 /* Program DMA */ 395 count = sndbuf_getsize(ch->buffer); 396 sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh, 397 vtophys(sndbuf_getbuf(ch->buffer)), 398 count - 1, 399 SV_DMA_MODE_AUTO | SV_DMA_MODE_WR); 400 count = count / SV_INTR_PER_BUFFER - 1; 401 sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8); 402 sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff); 403 404 /* Enable DMA */ 405 enable = sv_indirect_get(sc, SV_REG_ENABLE); 406 enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE; 407 sv_indirect_set(sc, SV_REG_ENABLE, enable); 408 ch->dma_active = 1; 409 break; 410 case PCMTRIG_ABORT: 411 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE; 412 sv_indirect_set(sc, SV_REG_ENABLE, enable); 413 ch->dma_active = 0; 414 break; 415 } 416 417 return 0; 418} 419 420static int 421svpchan_getptr(kobj_t obj, void *data) 422{ 423 struct sc_chinfo *ch = data; 424 struct sc_info *sc = ch->parent; 425 u_int32_t sz, remain; 426 427 sz = sndbuf_getsize(ch->buffer); 428 /* DMAA uses bytes */ 429 remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1; 430 return (sz - remain); 431} 432 433static kobj_method_t svpchan_methods[] = { 434 KOBJMETHOD(channel_init, svchan_init), 435 KOBJMETHOD(channel_setformat, svchan_setformat), 436 KOBJMETHOD(channel_setspeed, svchan_setspeed), 437 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 438 KOBJMETHOD(channel_trigger, svpchan_trigger), 439 KOBJMETHOD(channel_getptr, svpchan_getptr), 440 KOBJMETHOD(channel_getcaps, svchan_getcaps), 441 { 0, 0 } 442}; 443CHANNEL_DECLARE(svpchan); 444 445/* ------------------------------------------------------------------------- */ 446/* Mixer support */ 447 448struct sv_mix_props { 449 u_int8_t reg; /* Register */ 450 u_int8_t stereo:1; /* Supports 2 channels */ 451 u_int8_t mute:1; /* Supports muting */ 452 u_int8_t neg:1; /* Negative gain */ 453 u_int8_t max; /* Max gain */ 454 u_int8_t iselect; /* Input selector */ 455} static const mt [SOUND_MIXER_NRDEVICES] = { 456 [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1}, 457 [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD}, 458 [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE}, 459 [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC}, 460 [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0}, 461 [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2}, 462 [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0}, 463 [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0}, 464 [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0}, 465}; 466 467static void 468sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel) 469{ 470 u_int8_t v; 471 int32_t g; 472 473 g = mt[dev].max * gain / 100; 474 if (mt[dev].neg) 475 g = mt[dev].max - g; 476 v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max; 477 v |= g; 478 479 if (mt[dev].mute) { 480 if (gain == 0) { 481 v |= SV_MUTE; 482 } else { 483 v &= ~SV_MUTE; 484 } 485 } 486 sv_indirect_set(sc, mt[dev].reg + channel, v); 487} 488 489static int 490sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right) 491{ 492 sv_channel_gain(sc, dev, left, 0); 493 if (mt[dev].stereo) 494 sv_channel_gain(sc, dev, right, 1); 495 return 0; 496} 497 498static void 499sv_mix_mute_all(struct sc_info *sc) 500{ 501 int32_t i; 502 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 503 if (mt[i].reg) sv_gain(sc, i, 0, 0); 504 } 505} 506 507static int 508sv_mix_init(struct snd_mixer *m) 509{ 510 u_int32_t i, v; 511 512 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 513 if (mt[i].max) v |= (1 << i); 514 } 515 mix_setdevs(m, v); 516 517 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 518 if (mt[i].iselect) v |= (1 << i); 519 } 520 mix_setrecdevs(m, v); 521 522 return 0; 523} 524 525static int 526sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right) 527{ 528 struct sc_info *sc = mix_getdevinfo(m); 529 return sv_gain(sc, dev, left, right); 530} 531 532static int 533sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask) 534{ 535 struct sc_info *sc = mix_getdevinfo(m); 536 u_int32_t i, v; 537 538 v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK; 539 for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 540 if ((1 << i) & mask) { 541 v |= mt[i].iselect; 542 } 543 } 544 DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v)); 545 return mask; 546} 547 548static kobj_method_t sv_mixer_methods[] = { 549 KOBJMETHOD(mixer_init, sv_mix_init), 550 KOBJMETHOD(mixer_set, sv_mix_set), 551 KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc), 552 { 0, 0 } 553}; 554MIXER_DECLARE(sv_mixer); 555 556/* ------------------------------------------------------------------------- */ 557/* Power management and reset */ 558 559static void 560sv_power(struct sc_info *sc, int state) 561{ 562 u_int8_t v; 563 564 switch (state) { 565 case 0: 566 /* power on */ 567 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF; 568 v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL; 569 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 570 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF; 571 v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP; 572 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v); 573 break; 574 default: 575 /* power off */ 576 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF; 577 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 578 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF; 579 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF); 580 break; 581 } 582 DEB(printf("Power state %d\n", state)); 583} 584 585static int 586sv_init(struct sc_info *sc) 587{ 588 u_int8_t v; 589 590 /* Effect reset */ 591 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED; 592 v |= SV_CM_CONTROL_RESET; 593 sv_direct_set(sc, SV_CM_CONTROL, v); 594 DELAY(50); 595 596 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET; 597 sv_direct_set(sc, SV_CM_CONTROL, v); 598 DELAY(50); 599 600 /* Set in enhanced mode */ 601 v = sv_direct_get(sc, SV_CM_CONTROL); 602 v |= SV_CM_CONTROL_ENHANCED; 603 sv_direct_set(sc, SV_CM_CONTROL, v); 604 605 /* Enable interrupts (UDM and MIDM are superfluous) */ 606 v = sv_direct_get(sc, SV_CM_IMR); 607 v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK); 608 sv_direct_set(sc, SV_CM_IMR, v); 609 610 /* Select ADC PLL for ADC clock */ 611 v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE; 612 sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v); 613 614 /* Disable loopback - binds ADC and DAC rates */ 615 v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE; 616 sv_indirect_set(sc, SV_REG_LOOPBACK, v); 617 618 /* Disable SRS */ 619 v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED; 620 sv_indirect_set(sc, SV_REG_SRS_SPACE, v); 621 622 /* Get revision */ 623 sc->rev = sv_indirect_get(sc, SV_REG_REVISION); 624 625 return 0; 626} 627 628static int 629sv_suspend(device_t dev) 630{ 631 struct sc_info *sc = pcm_getdevinfo(dev); 632 633 sc->rch.dma_was_active = sc->rch.dma_active; 634 svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT); 635 636 sc->pch.dma_was_active = sc->pch.dma_active; 637 svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT); 638 639 sv_mix_mute_all(sc); 640 sv_power(sc, 3); 641 642 return 0; 643} 644 645static int 646sv_resume(device_t dev) 647{ 648 struct sc_info *sc = pcm_getdevinfo(dev); 649 650 sv_mix_mute_all(sc); 651 sv_power(sc, 0); 652 if (sv_init(sc) == -1) { 653 device_printf(dev, "unable to reinitialize the card\n"); 654 return ENXIO; 655 } 656 657 if (mixer_reinit(dev) == -1) { 658 device_printf(dev, "unable to reinitialize the mixer\n"); 659 return ENXIO; 660 } 661 662 if (sc->rch.dma_was_active) { 663 svrchan_trigger(0, &sc->rch, PCMTRIG_START); 664 } 665 666 if (sc->pch.dma_was_active) { 667 svpchan_trigger(0, &sc->pch, PCMTRIG_START); 668 } 669 670 return 0; 671} 672 673/* ------------------------------------------------------------------------- */ 674/* Resource related */ 675 676static void 677sv_intr(void *data) 678{ 679 struct sc_info *sc = data; 680 u_int8_t status; 681 682 status = sv_direct_get(sc, SV_CM_STATUS); 683 if (status & SV_CM_STATUS_AINT) 684 chn_intr(sc->pch.channel); 685 686 if (status & SV_CM_STATUS_CINT) 687 chn_intr(sc->rch.channel); 688 689 status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT); 690 DEB(if (status) printf("intr 0x%02x ?\n", status)); 691 692 return; 693} 694 695static int 696sv_probe(device_t dev) 697{ 698 switch(pci_get_devid(dev)) { 699 case SV_PCI_ID: 700 device_set_desc(dev, "S3 Sonicvibes"); 701 return 0; 702 default: 703 return ENXIO; 704 } 705} 706 707static int 708sv_attach(device_t dev) { 709 struct snddev_info *d; 710 struct sc_info *sc; 711 u_int32_t data; 712 char status[SND_STATUSLEN]; 713 u_long midi_start, games_start, count, sdmaa, sdmac; 714 715 d = device_get_softc(dev); 716 717 sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT); 718 if (sc == NULL) { 719 device_printf(dev, "cannot allocate softc"); 720 return ENXIO; 721 } 722 bzero(sc, sizeof(sc)); 723 sc->dev = dev; 724 725 data = pci_read_config(dev, PCIR_COMMAND, 2); 726 data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN); 727 pci_write_config(dev, PCIR_COMMAND, data, 2); 728 data = pci_read_config(dev, PCIR_COMMAND, 2); 729 730#if __FreeBSD_version > 500000 731 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 732 device_printf(dev, "chip is in D%d power mode " 733 "-- setting to D0\n", pci_get_powerstate(dev)); 734 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 735 } 736#endif 737 sc->enh_rid = SV_PCI_ENHANCED; 738 sc->enh_type = SYS_RES_IOPORT; 739 sc->enh_reg = bus_alloc_resource(dev, sc->enh_type, 740 &sc->enh_rid, 0, ~0, 741 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 742 if (sc->enh_reg == NULL) { 743 device_printf(dev, "sv_attach: cannot allocate enh\n"); 744 return ENXIO; 745 } 746 sc->enh_st = rman_get_bustag(sc->enh_reg); 747 sc->enh_sh = rman_get_bushandle(sc->enh_reg); 748 749 data = pci_read_config(dev, SV_PCI_DMAA, 4); 750 DEB(printf("sv_attach: initial dmaa 0x%08x\n", data)); 751 data = pci_read_config(dev, SV_PCI_DMAC, 4); 752 DEB(printf("sv_attach: initial dmac 0x%08x\n", data)); 753 754 /* Initialize DMA_A and DMA_C */ 755 pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4); 756 pci_write_config(dev, SV_PCI_DMAC, 0, 4); 757 758 /* Register IRQ handler */ 759 sc->irqid = 0; 760 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 761 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 762 if (!sc->irq || 763 bus_setup_intr(dev, sc->irq, INTR_TYPE_TTY, sv_intr, sc, &sc->ih)) { 764 device_printf(dev, "sv_attach: Unable to map interrupt\n"); 765 goto fail; 766 } 767 768 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0, 769 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, 770 /*highaddr*/BUS_SPACE_MAXADDR, 771 /*filter*/NULL, /*filterarg*/NULL, 772 /*maxsize*/SV_MAX_BUFFER, /*nsegments*/1, 773 /*maxsegz*/0x3ffff, /*flags*/0, 774 &sc->parent_dmat) != 0) { 775 device_printf(dev, "sv_attach: Unable to create dma tag\n"); 776 goto fail; 777 } 778 779 /* Power up and initialize */ 780 sv_mix_mute_all(sc); 781 sv_power(sc, 0); 782 sv_init(sc); 783 784 if (mixer_init(dev, &sv_mixer_class, sc) != 0) { 785 device_printf(dev, "sv_attach: Mixer failed to initialize\n"); 786 goto fail; 787 } 788 789 /* XXX This is a hack, and it's ugly. Okay, the deal is this 790 * card has two more io regions that available for automatic 791 * configuration by the pci code. These need to be allocated 792 * to used as control registers for the DMA engines. 793 * Unfortunately FBSD has no bus_space_foo() functions so we 794 * have to grab port space in region of existing resources. Go 795 * for space between midi and game ports. 796 */ 797 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count); 798 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count); 799 800 /* Check assumptions about space availability and alignment. */ 801 if ((midi_start - games_start != 0x200) || midi_start & 0xff) { 802 device_printf(dev, "sv_attach: resource assumptions not met\n"); 803 goto fail; 804 } 805 806 sdmaa = games_start + 0x40; 807 sdmac = sdmaa + 0x40; 808 809 /* Add resources to list of pci resources for this device - from here on 810 * they look like normal pci resources. */ 811 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE); 812 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE); 813 814 /* Cache resource short-cuts for dma_a */ 815 sc->dmaa_rid = SV_PCI_DMAA; 816 sc->dmaa_type = SYS_RES_IOPORT; 817 sc->dmaa_reg = bus_alloc_resource(dev, sc->dmaa_type, 818 &sc->dmaa_rid, 0, ~0, 819 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 820 if (sc->dmaa_reg == NULL) { 821 device_printf(dev, "sv_attach: cannot allocate dmaa\n"); 822 goto fail; 823 } 824 sc->dmaa_st = rman_get_bustag(sc->dmaa_reg); 825 sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg); 826 827 /* Poke port into dma_a configuration, nb bit flags to enable dma */ 828 data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 829 data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f); 830 pci_write_config(dev, SV_PCI_DMAA, data, 4); 831 DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4))); 832 833 /* Cache resource short-cuts for dma_c */ 834 sc->dmac_rid = SV_PCI_DMAC; 835 sc->dmac_type = SYS_RES_IOPORT; 836 sc->dmac_reg = bus_alloc_resource(dev, sc->dmac_type, 837 &sc->dmac_rid, 0, ~0, 838 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 839 if (sc->dmac_reg == NULL) { 840 device_printf(dev, "sv_attach: cannot allocate dmac\n"); 841 goto fail; 842 } 843 sc->dmac_st = rman_get_bustag(sc->dmac_reg); 844 sc->dmac_sh = rman_get_bushandle(sc->dmac_reg); 845 846 /* Poke port into dma_c configuration, nb bit flags to enable dma */ 847 data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 848 data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f); 849 pci_write_config(dev, SV_PCI_DMAC, data, 4); 850 DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4))); 851 852 if (bootverbose) 853 printf("Sonicvibes: revision %d.\n", sc->rev); 854 855 if (pcm_register(dev, sc, 1, 1)) { 856 device_printf(dev, "sv_attach: pcm_register fail\n"); 857 goto fail; 858 } 859 860 pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc); 861 pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc); 862 863 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld", 864 rman_get_start(sc->enh_reg), rman_get_start(sc->irq)); 865 pcm_setstatus(dev, status); 866 867 DEB(printf("sv_attach: succeeded\n")); 868 869 return 0; 870 871 fail: 872 if (sc->parent_dmat) 873 bus_dma_tag_destroy(sc->parent_dmat); 874 if (sc->ih) 875 bus_teardown_intr(dev, sc->irq, sc->ih); 876 if (sc->irq) 877 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 878 if (sc->enh_reg) 879 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 880 if (sc->dmaa_reg) 881 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 882 if (sc->dmac_reg) 883 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 884 return ENXIO; 885} 886 887static int 888sv_detach(device_t dev) { 889 struct sc_info *sc; 890 int r; 891 892 r = pcm_unregister(dev); 893 if (r) return r; 894 895 sc = pcm_getdevinfo(dev); 896 sv_mix_mute_all(sc); 897 sv_power(sc, 3); 898 899 bus_dma_tag_destroy(sc->parent_dmat); 900 bus_teardown_intr(dev, sc->irq, sc->ih); 901 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 902 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 903 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 904 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 905 906 free(sc, M_DEVBUF); 907 908 return 0; 909} 910 911static device_method_t sc_methods[] = { 912 DEVMETHOD(device_probe, sv_probe), 913 DEVMETHOD(device_attach, sv_attach), 914 DEVMETHOD(device_detach, sv_detach), 915 DEVMETHOD(device_resume, sv_resume), 916 DEVMETHOD(device_suspend, sv_suspend), 917 { 0, 0 } 918}; 919 920static driver_t sonicvibes_driver = { 921 "pcm", 922 sc_methods, 923 sizeof(struct snddev_info) 924}; 925 926static devclass_t pcm_devclass; 927DRIVER_MODULE(snd_sonicvibes, pci, sonicvibes_driver, pcm_devclass, 0, 0); 928MODULE_DEPEND(snd_sonicvibes, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER); 929MODULE_VERSION(snd_sonicvibes, 1); 930