1/*- 2 * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* 28 * This card has the annoying habit of "clicking" when attached and 29 * detached, haven't been able to remedy this with any combination of 30 * muting. 31 */ 32 33#ifdef HAVE_KERNEL_OPTION_HEADERS 34#include "opt_snd.h" 35#endif 36 37#include <dev/sound/pcm/sound.h> 38#include <dev/sound/pci/vibes.h> 39 40#include <dev/pci/pcireg.h> 41#include <dev/pci/pcivar.h> 42 43#include "mixer_if.h" 44 45SND_DECLARE_FILE("$FreeBSD$"); 46 47/* ------------------------------------------------------------------------- */ 48/* Constants */ 49 50#define SV_PCI_ID 0xca005333 51#define SV_DEFAULT_BUFSZ 16384 52#define SV_MIN_BLKSZ 128 53#define SV_INTR_PER_BUFFER 2 54 55#ifndef DEB 56#define DEB(x) /* (x) */ 57#endif 58 59/* ------------------------------------------------------------------------- */ 60/* Structures */ 61 62struct sc_info; 63 64struct sc_chinfo { 65 struct sc_info *parent; 66 struct pcm_channel *channel; 67 struct snd_dbuf *buffer; 68 u_int32_t fmt, spd; 69 int dir; 70 int dma_active, dma_was_active; 71}; 72 73struct sc_info { 74 device_t dev; 75 76 /* DMA buffer allocator */ 77 bus_dma_tag_t parent_dmat; 78 79 /* Enhanced register resources */ 80 struct resource *enh_reg; 81 bus_space_tag_t enh_st; 82 bus_space_handle_t enh_sh; 83 int enh_type; 84 int enh_rid; 85 86 /* DMA configuration */ 87 struct resource *dmaa_reg, *dmac_reg; 88 bus_space_tag_t dmaa_st, dmac_st; 89 bus_space_handle_t dmaa_sh, dmac_sh; 90 int dmaa_type, dmac_type; 91 int dmaa_rid, dmac_rid; 92 93 /* Interrupt resources */ 94 struct resource *irq; 95 int irqid; 96 void *ih; 97 98 /* User configurable buffer size */ 99 unsigned int bufsz; 100 101 struct sc_chinfo rch, pch; 102 u_int8_t rev; 103}; 104 105static u_int32_t sc_fmt[] = { 106 SND_FORMAT(AFMT_U8, 1, 0), 107 SND_FORMAT(AFMT_U8, 2, 0), 108 SND_FORMAT(AFMT_S16_LE, 1, 0), 109 SND_FORMAT(AFMT_S16_LE, 2, 0), 110 0 111}; 112 113static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0}; 114 115/* ------------------------------------------------------------------------- */ 116/* Register Manipulations */ 117 118#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__) 119 120static u_int8_t 121sv_direct_get(struct sc_info *sc, u_int8_t reg) 122{ 123 return bus_space_read_1(sc->enh_st, sc->enh_sh, reg); 124} 125 126static void 127_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 128{ 129 u_int8_t n; 130 bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val); 131 132 n = sv_direct_get(sc, reg); 133 if (n != val) { 134 device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line); 135 } 136} 137 138static u_int8_t 139sv_indirect_get(struct sc_info *sc, u_int8_t reg) 140{ 141 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 142 reg |= SV_CM_INDEX_MCE; 143 144 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 145 return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA); 146} 147 148#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__) 149 150static void 151_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 152{ 153 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 154 reg |= SV_CM_INDEX_MCE; 155 156 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 157 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val); 158 159 reg &= ~SV_CM_INDEX_MCE; 160 if (reg != SV_REG_ADC_PLLM) { 161 u_int8_t n; 162 n = sv_indirect_get(sc, reg); 163 if (n != val) { 164 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line); 165 } 166 } 167} 168 169static void 170sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh, 171 u_int32_t base, u_int32_t count, u_int8_t mode) 172{ 173 bus_space_write_4(st, sh, SV_DMA_ADDR, base); 174 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff); 175 bus_space_write_1(st, sh, SV_DMA_MODE, mode); 176 177 DEB(printf("base 0x%08x count %5d mode 0x%02x\n", 178 base, count, mode)); 179} 180 181static u_int32_t 182sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh) 183{ 184 return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff; 185} 186 187/* ------------------------------------------------------------------------- */ 188/* Play / Record Common Interface */ 189 190static void * 191svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 192{ 193 struct sc_info *sc = devinfo; 194 struct sc_chinfo *ch; 195 ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; 196 197 ch->parent = sc; 198 ch->channel = c; 199 ch->dir = dir; 200 201 if (sndbuf_alloc(b, sc->parent_dmat, 0, sc->bufsz) != 0) { 202 DEB(printf("svchan_init failed\n")); 203 return NULL; 204 } 205 ch->buffer = b; 206 ch->fmt = SND_FORMAT(AFMT_U8, 1, 0); 207 ch->spd = DSP_DEFAULT_SPEED; 208 ch->dma_active = ch->dma_was_active = 0; 209 210 return ch; 211} 212 213static struct pcmchan_caps * 214svchan_getcaps(kobj_t obj, void *data) 215{ 216 return &sc_caps; 217} 218 219static u_int32_t 220svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 221{ 222 struct sc_chinfo *ch = data; 223 struct sc_info *sc = ch->parent; 224 225 /* user has requested interrupts every blocksize bytes */ 226 RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER); 227 sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize); 228 DEB(printf("svchan_setblocksize: %d\n", blocksize)); 229 return blocksize; 230} 231 232static int 233svchan_setformat(kobj_t obj, void *data, u_int32_t format) 234{ 235 struct sc_chinfo *ch = data; 236 /* NB Just note format here as setting format register 237 * generates noise if dma channel is inactive. */ 238 ch->fmt = (AFMT_CHANNEL(format) > 1) ? SV_AFMT_STEREO : SV_AFMT_MONO; 239 ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8; 240 return 0; 241} 242 243static u_int32_t 244svchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 245{ 246 struct sc_chinfo *ch = data; 247 RANGE(speed, 8000, 48000); 248 ch->spd = speed; 249 return speed; 250} 251 252/* ------------------------------------------------------------------------- */ 253/* Recording interface */ 254 255static int 256sv_set_recspeed(struct sc_info *sc, u_int32_t speed) 257{ 258 u_int32_t f_out, f_actual; 259 u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0; 260 int32_t m, best_m = 0, ms, me, err, min_err; 261 262 /* This algorithm is a variant described in sonicvibes.pdf 263 * appendix A. This search is marginally more extensive and 264 * results in (nominally) better sample rate matching. */ 265 266 f_out = SV_F_SCALE * speed; 267 min_err = 0x7fffffff; 268 269 /* Find bounds of r to examine, rs <= r <= re */ 270 t = 80000000 / f_out; 271 for (rs = 1; (1 << rs) < t; rs++); 272 273 t = 150000000 / f_out; 274 for (re = 1; (2 << re) < t; re++); 275 if (re > 7) re = 7; 276 277 /* Search over r, n, m */ 278 for (r = rs; r <= re; r++) { 279 r2 = (1 << r); 280 for (n = 3; n < 34; n++) { 281 m = f_out * n / (SV_F_REF / r2); 282 ms = (m > 3) ? (m - 1) : 3; 283 me = (m < 129) ? (m + 1) : 129; 284 for (m = ms; m <= me; m++) { 285 f_actual = m * SV_F_REF / (n * r2); 286 if (f_actual > f_out) { 287 err = f_actual - f_out; 288 } else { 289 err = f_out - f_actual; 290 } 291 if (err < min_err) { 292 best_r = r; 293 best_m = m - 2; 294 best_n = n - 2; 295 min_err = err; 296 if (err == 0) break; 297 } 298 } 299 } 300 } 301 302 sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m); 303 sv_indirect_set(sc, SV_REG_ADC_PLLN, 304 SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r)); 305 DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n", 306 speed, 307 sv_indirect_get(sc, SV_REG_ADC_PLLM), 308 sv_indirect_get(sc, SV_REG_ADC_PLLN))); 309 return 0; 310} 311 312static int 313svrchan_trigger(kobj_t obj, void *data, int go) 314{ 315 struct sc_chinfo *ch = data; 316 struct sc_info *sc = ch->parent; 317 u_int32_t count, enable; 318 u_int8_t v; 319 320 switch(go) { 321 case PCMTRIG_START: 322 /* Set speed */ 323 sv_set_recspeed(sc, ch->spd); 324 325 /* Set format */ 326 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK; 327 v |= SV_AFMT_DMAC(ch->fmt); 328 sv_indirect_set(sc, SV_REG_FORMAT, v); 329 330 /* Program DMA */ 331 count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */ 332 sv_dma_set_config(sc->dmac_st, sc->dmac_sh, 333 sndbuf_getbufaddr(ch->buffer), 334 count - 1, 335 SV_DMA_MODE_AUTO | SV_DMA_MODE_RD); 336 count = count / SV_INTR_PER_BUFFER - 1; 337 sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8); 338 sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff); 339 340 /* Enable DMA */ 341 enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE; 342 sv_indirect_set(sc, SV_REG_ENABLE, enable); 343 ch->dma_active = 1; 344 break; 345 case PCMTRIG_STOP: 346 case PCMTRIG_ABORT: 347 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE; 348 sv_indirect_set(sc, SV_REG_ENABLE, enable); 349 ch->dma_active = 0; 350 break; 351 } 352 353 return 0; 354} 355 356static u_int32_t 357svrchan_getptr(kobj_t obj, void *data) 358{ 359 struct sc_chinfo *ch = data; 360 struct sc_info *sc = ch->parent; 361 u_int32_t sz, remain; 362 363 sz = sndbuf_getsize(ch->buffer); 364 /* DMAC uses words */ 365 remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2; 366 return sz - remain; 367} 368 369static kobj_method_t svrchan_methods[] = { 370 KOBJMETHOD(channel_init, svchan_init), 371 KOBJMETHOD(channel_setformat, svchan_setformat), 372 KOBJMETHOD(channel_setspeed, svchan_setspeed), 373 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 374 KOBJMETHOD(channel_trigger, svrchan_trigger), 375 KOBJMETHOD(channel_getptr, svrchan_getptr), 376 KOBJMETHOD(channel_getcaps, svchan_getcaps), 377 KOBJMETHOD_END 378}; 379CHANNEL_DECLARE(svrchan); 380 381/* ------------------------------------------------------------------------- */ 382/* Playback interface */ 383 384static int 385svpchan_trigger(kobj_t obj, void *data, int go) 386{ 387 struct sc_chinfo *ch = data; 388 struct sc_info *sc = ch->parent; 389 u_int32_t count, enable, speed; 390 u_int8_t v; 391 392 switch(go) { 393 case PCMTRIG_START: 394 /* Set speed */ 395 speed = (ch->spd * 65536) / 48000; 396 if (speed > 65535) 397 speed = 65535; 398 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8); 399 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff); 400 401 /* Set format */ 402 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK; 403 v |= SV_AFMT_DMAA(ch->fmt); 404 sv_indirect_set(sc, SV_REG_FORMAT, v); 405 406 /* Program DMA */ 407 count = sndbuf_getsize(ch->buffer); 408 sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh, 409 sndbuf_getbufaddr(ch->buffer), 410 count - 1, 411 SV_DMA_MODE_AUTO | SV_DMA_MODE_WR); 412 count = count / SV_INTR_PER_BUFFER - 1; 413 sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8); 414 sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff); 415 416 /* Enable DMA */ 417 enable = sv_indirect_get(sc, SV_REG_ENABLE); 418 enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE; 419 sv_indirect_set(sc, SV_REG_ENABLE, enable); 420 ch->dma_active = 1; 421 break; 422 case PCMTRIG_STOP: 423 case PCMTRIG_ABORT: 424 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE; 425 sv_indirect_set(sc, SV_REG_ENABLE, enable); 426 ch->dma_active = 0; 427 break; 428 } 429 430 return 0; 431} 432 433static u_int32_t 434svpchan_getptr(kobj_t obj, void *data) 435{ 436 struct sc_chinfo *ch = data; 437 struct sc_info *sc = ch->parent; 438 u_int32_t sz, remain; 439 440 sz = sndbuf_getsize(ch->buffer); 441 /* DMAA uses bytes */ 442 remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1; 443 return (sz - remain); 444} 445 446static kobj_method_t svpchan_methods[] = { 447 KOBJMETHOD(channel_init, svchan_init), 448 KOBJMETHOD(channel_setformat, svchan_setformat), 449 KOBJMETHOD(channel_setspeed, svchan_setspeed), 450 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 451 KOBJMETHOD(channel_trigger, svpchan_trigger), 452 KOBJMETHOD(channel_getptr, svpchan_getptr), 453 KOBJMETHOD(channel_getcaps, svchan_getcaps), 454 KOBJMETHOD_END 455}; 456CHANNEL_DECLARE(svpchan); 457 458/* ------------------------------------------------------------------------- */ 459/* Mixer support */ 460 461struct sv_mix_props { 462 u_int8_t reg; /* Register */ 463 u_int8_t stereo:1; /* Supports 2 channels */ 464 u_int8_t mute:1; /* Supports muting */ 465 u_int8_t neg:1; /* Negative gain */ 466 u_int8_t max; /* Max gain */ 467 u_int8_t iselect; /* Input selector */ 468} static const mt [SOUND_MIXER_NRDEVICES] = { 469 [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1}, 470 [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD}, 471 [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE}, 472 [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC}, 473 [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0}, 474 [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2}, 475 [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0}, 476 [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0}, 477 [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0}, 478}; 479 480static void 481sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel) 482{ 483 u_int8_t v; 484 int32_t g; 485 486 g = mt[dev].max * gain / 100; 487 if (mt[dev].neg) 488 g = mt[dev].max - g; 489 v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max; 490 v |= g; 491 492 if (mt[dev].mute) { 493 if (gain == 0) { 494 v |= SV_MUTE; 495 } else { 496 v &= ~SV_MUTE; 497 } 498 } 499 sv_indirect_set(sc, mt[dev].reg + channel, v); 500} 501 502static int 503sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right) 504{ 505 sv_channel_gain(sc, dev, left, 0); 506 if (mt[dev].stereo) 507 sv_channel_gain(sc, dev, right, 1); 508 return 0; 509} 510 511static void 512sv_mix_mute_all(struct sc_info *sc) 513{ 514 int32_t i; 515 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 516 if (mt[i].reg) sv_gain(sc, i, 0, 0); 517 } 518} 519 520static int 521sv_mix_init(struct snd_mixer *m) 522{ 523 u_int32_t i, v; 524 525 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 526 if (mt[i].max) v |= (1 << i); 527 } 528 mix_setdevs(m, v); 529 530 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 531 if (mt[i].iselect) v |= (1 << i); 532 } 533 mix_setrecdevs(m, v); 534 535 return 0; 536} 537 538static int 539sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right) 540{ 541 struct sc_info *sc = mix_getdevinfo(m); 542 return sv_gain(sc, dev, left, right); 543} 544 545static u_int32_t 546sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask) 547{ 548 struct sc_info *sc = mix_getdevinfo(m); 549 u_int32_t i, v; 550 551 v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK; 552 for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 553 if ((1 << i) & mask) { 554 v |= mt[i].iselect; 555 } 556 } 557 DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v)); 558 sv_indirect_set(sc, SV_REG_ADC_INPUT, v); 559 return mask; 560} 561 562static kobj_method_t sv_mixer_methods[] = { 563 KOBJMETHOD(mixer_init, sv_mix_init), 564 KOBJMETHOD(mixer_set, sv_mix_set), 565 KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc), 566 KOBJMETHOD_END 567}; 568MIXER_DECLARE(sv_mixer); 569 570/* ------------------------------------------------------------------------- */ 571/* Power management and reset */ 572 573static void 574sv_power(struct sc_info *sc, int state) 575{ 576 u_int8_t v; 577 578 switch (state) { 579 case 0: 580 /* power on */ 581 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF; 582 v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL; 583 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 584 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF; 585 v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP; 586 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v); 587 break; 588 default: 589 /* power off */ 590 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF; 591 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 592 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF; 593 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF); 594 break; 595 } 596 DEB(printf("Power state %d\n", state)); 597} 598 599static int 600sv_init(struct sc_info *sc) 601{ 602 u_int8_t v; 603 604 /* Effect reset */ 605 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED; 606 v |= SV_CM_CONTROL_RESET; 607 sv_direct_set(sc, SV_CM_CONTROL, v); 608 DELAY(50); 609 610 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET; 611 sv_direct_set(sc, SV_CM_CONTROL, v); 612 DELAY(50); 613 614 /* Set in enhanced mode */ 615 v = sv_direct_get(sc, SV_CM_CONTROL); 616 v |= SV_CM_CONTROL_ENHANCED; 617 sv_direct_set(sc, SV_CM_CONTROL, v); 618 619 /* Enable interrupts (UDM and MIDM are superfluous) */ 620 v = sv_direct_get(sc, SV_CM_IMR); 621 v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK); 622 sv_direct_set(sc, SV_CM_IMR, v); 623 624 /* Select ADC PLL for ADC clock */ 625 v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE; 626 sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v); 627 628 /* Disable loopback - binds ADC and DAC rates */ 629 v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE; 630 sv_indirect_set(sc, SV_REG_LOOPBACK, v); 631 632 /* Disable SRS */ 633 v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED; 634 sv_indirect_set(sc, SV_REG_SRS_SPACE, v); 635 636 /* Get revision */ 637 sc->rev = sv_indirect_get(sc, SV_REG_REVISION); 638 639 return 0; 640} 641 642static int 643sv_suspend(device_t dev) 644{ 645 struct sc_info *sc = pcm_getdevinfo(dev); 646 647 sc->rch.dma_was_active = sc->rch.dma_active; 648 svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT); 649 650 sc->pch.dma_was_active = sc->pch.dma_active; 651 svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT); 652 653 sv_mix_mute_all(sc); 654 sv_power(sc, 3); 655 656 return 0; 657} 658 659static int 660sv_resume(device_t dev) 661{ 662 struct sc_info *sc = pcm_getdevinfo(dev); 663 664 sv_mix_mute_all(sc); 665 sv_power(sc, 0); 666 if (sv_init(sc) == -1) { 667 device_printf(dev, "unable to reinitialize the card\n"); 668 return ENXIO; 669 } 670 671 if (mixer_reinit(dev) == -1) { 672 device_printf(dev, "unable to reinitialize the mixer\n"); 673 return ENXIO; 674 } 675 676 if (sc->rch.dma_was_active) { 677 svrchan_trigger(0, &sc->rch, PCMTRIG_START); 678 } 679 680 if (sc->pch.dma_was_active) { 681 svpchan_trigger(0, &sc->pch, PCMTRIG_START); 682 } 683 684 return 0; 685} 686 687/* ------------------------------------------------------------------------- */ 688/* Resource related */ 689 690static void 691sv_intr(void *data) 692{ 693 struct sc_info *sc = data; 694 u_int8_t status; 695 696 status = sv_direct_get(sc, SV_CM_STATUS); 697 if (status & SV_CM_STATUS_AINT) 698 chn_intr(sc->pch.channel); 699 700 if (status & SV_CM_STATUS_CINT) 701 chn_intr(sc->rch.channel); 702 703 status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT); 704 DEB(if (status) printf("intr 0x%02x ?\n", status)); 705 706 return; 707} 708 709static int 710sv_probe(device_t dev) 711{ 712 switch(pci_get_devid(dev)) { 713 case SV_PCI_ID: 714 device_set_desc(dev, "S3 Sonicvibes"); 715 return BUS_PROBE_DEFAULT; 716 default: 717 return ENXIO; 718 } 719} 720 721static int 722sv_attach(device_t dev) { 723 struct sc_info *sc; 724 u_int32_t data; 725 char status[SND_STATUSLEN]; 726 u_long midi_start, games_start, count, sdmaa, sdmac, ml, mu; 727 728 sc = malloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO); 729 sc->dev = dev; 730 731 pci_enable_busmaster(dev); 732 733#if __FreeBSD_version > 500000 734 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 735 device_printf(dev, "chip is in D%d power mode " 736 "-- setting to D0\n", pci_get_powerstate(dev)); 737 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 738 } 739#endif 740 sc->enh_rid = SV_PCI_ENHANCED; 741 sc->enh_type = SYS_RES_IOPORT; 742 sc->enh_reg = bus_alloc_resource(dev, sc->enh_type, 743 &sc->enh_rid, 0, ~0, 744 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 745 if (sc->enh_reg == NULL) { 746 device_printf(dev, "sv_attach: cannot allocate enh\n"); 747 return ENXIO; 748 } 749 sc->enh_st = rman_get_bustag(sc->enh_reg); 750 sc->enh_sh = rman_get_bushandle(sc->enh_reg); 751 752 data = pci_read_config(dev, SV_PCI_DMAA, 4); 753 DEB(printf("sv_attach: initial dmaa 0x%08x\n", data)); 754 data = pci_read_config(dev, SV_PCI_DMAC, 4); 755 DEB(printf("sv_attach: initial dmac 0x%08x\n", data)); 756 757 /* Initialize DMA_A and DMA_C */ 758 pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4); 759 pci_write_config(dev, SV_PCI_DMAC, 0, 4); 760 761 /* Register IRQ handler */ 762 sc->irqid = 0; 763 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 764 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 765 if (!sc->irq || 766 snd_setup_intr(dev, sc->irq, 0, sv_intr, sc, &sc->ih)) { 767 device_printf(dev, "sv_attach: Unable to map interrupt\n"); 768 goto fail; 769 } 770 771 sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536); 772 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, 773 /*boundary*/0, 774 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, 775 /*highaddr*/BUS_SPACE_MAXADDR, 776 /*filter*/NULL, /*filterarg*/NULL, 777 /*maxsize*/sc->bufsz, /*nsegments*/1, 778 /*maxsegz*/0x3ffff, /*flags*/0, 779 /*lockfunc*/busdma_lock_mutex, 780 /*lockarg*/&Giant, &sc->parent_dmat) != 0) { 781 device_printf(dev, "sv_attach: Unable to create dma tag\n"); 782 goto fail; 783 } 784 785 /* Power up and initialize */ 786 sv_mix_mute_all(sc); 787 sv_power(sc, 0); 788 sv_init(sc); 789 790 if (mixer_init(dev, &sv_mixer_class, sc) != 0) { 791 device_printf(dev, "sv_attach: Mixer failed to initialize\n"); 792 goto fail; 793 } 794 795 /* XXX This is a hack, and it's ugly. Okay, the deal is this 796 * card has two more io regions that available for automatic 797 * configuration by the pci code. These need to be allocated 798 * to used as control registers for the DMA engines. 799 * Unfortunately FBSD has no bus_space_foo() functions so we 800 * have to grab port space in region of existing resources. Go 801 * for space between midi and game ports. 802 */ 803 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count); 804 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count); 805 806 if (games_start < midi_start) { 807 ml = games_start; 808 mu = midi_start; 809 } else { 810 ml = midi_start; 811 mu = games_start; 812 } 813 /* Check assumptions about space availability and 814 alignment. How driver loaded can determine whether 815 games_start > midi_start or vice versa */ 816 if ((mu - ml >= 0x800) || 817 ((mu - ml) % 0x200)) { 818 device_printf(dev, "sv_attach: resource assumptions not met " 819 "(midi 0x%08lx, games 0x%08lx)\n", 820 midi_start, games_start); 821 goto fail; 822 } 823 824 sdmaa = ml + 0x40; 825 sdmac = sdmaa + 0x40; 826 827 /* Add resources to list of pci resources for this device - from here on 828 * they look like normal pci resources. */ 829 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE); 830 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE); 831 832 /* Cache resource short-cuts for dma_a */ 833 sc->dmaa_rid = SV_PCI_DMAA; 834 sc->dmaa_type = SYS_RES_IOPORT; 835 sc->dmaa_reg = bus_alloc_resource(dev, sc->dmaa_type, 836 &sc->dmaa_rid, 0, ~0, 837 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 838 if (sc->dmaa_reg == NULL) { 839 device_printf(dev, "sv_attach: cannot allocate dmaa\n"); 840 goto fail; 841 } 842 sc->dmaa_st = rman_get_bustag(sc->dmaa_reg); 843 sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg); 844 845 /* Poke port into dma_a configuration, nb bit flags to enable dma */ 846 data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 847 data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f); 848 pci_write_config(dev, SV_PCI_DMAA, data, 4); 849 DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4))); 850 851 /* Cache resource short-cuts for dma_c */ 852 sc->dmac_rid = SV_PCI_DMAC; 853 sc->dmac_type = SYS_RES_IOPORT; 854 sc->dmac_reg = bus_alloc_resource(dev, sc->dmac_type, 855 &sc->dmac_rid, 0, ~0, 856 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 857 if (sc->dmac_reg == NULL) { 858 device_printf(dev, "sv_attach: cannot allocate dmac\n"); 859 goto fail; 860 } 861 sc->dmac_st = rman_get_bustag(sc->dmac_reg); 862 sc->dmac_sh = rman_get_bushandle(sc->dmac_reg); 863 864 /* Poke port into dma_c configuration, nb bit flags to enable dma */ 865 data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 866 data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f); 867 pci_write_config(dev, SV_PCI_DMAC, data, 4); 868 DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4))); 869 870 if (bootverbose) 871 printf("Sonicvibes: revision %d.\n", sc->rev); 872 873 if (pcm_register(dev, sc, 1, 1)) { 874 device_printf(dev, "sv_attach: pcm_register fail\n"); 875 goto fail; 876 } 877 878 pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc); 879 pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc); 880 881 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 882 rman_get_start(sc->enh_reg), rman_get_start(sc->irq),PCM_KLDSTRING(snd_vibes)); 883 pcm_setstatus(dev, status); 884 885 DEB(printf("sv_attach: succeeded\n")); 886 887 return 0; 888 889 fail: 890 if (sc->parent_dmat) 891 bus_dma_tag_destroy(sc->parent_dmat); 892 if (sc->ih) 893 bus_teardown_intr(dev, sc->irq, sc->ih); 894 if (sc->irq) 895 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 896 if (sc->enh_reg) 897 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 898 if (sc->dmaa_reg) 899 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 900 if (sc->dmac_reg) 901 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 902 return ENXIO; 903} 904 905static int 906sv_detach(device_t dev) { 907 struct sc_info *sc; 908 int r; 909 910 r = pcm_unregister(dev); 911 if (r) return r; 912 913 sc = pcm_getdevinfo(dev); 914 sv_mix_mute_all(sc); 915 sv_power(sc, 3); 916 917 bus_dma_tag_destroy(sc->parent_dmat); 918 bus_teardown_intr(dev, sc->irq, sc->ih); 919 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 920 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 921 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 922 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 923 924 free(sc, M_DEVBUF); 925 926 return 0; 927} 928 929static device_method_t sc_methods[] = { 930 DEVMETHOD(device_probe, sv_probe), 931 DEVMETHOD(device_attach, sv_attach), 932 DEVMETHOD(device_detach, sv_detach), 933 DEVMETHOD(device_resume, sv_resume), 934 DEVMETHOD(device_suspend, sv_suspend), 935 { 0, 0 } 936}; 937 938static driver_t sonicvibes_driver = { 939 "pcm", 940 sc_methods, 941 PCM_SOFTC_SIZE 942}; 943 944DRIVER_MODULE(snd_vibes, pci, sonicvibes_driver, pcm_devclass, 0, 0); 945MODULE_DEPEND(snd_vibes, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 946MODULE_VERSION(snd_vibes, 1); 947