vibes.c revision 170521
1/*-
2 * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * This card has the annoying habit of "clicking" when attached and
27 * detached, haven't been able to remedy this with any combination of
28 * muting.
29 */
30
31#include <dev/sound/pcm/sound.h>
32#include <dev/sound/pci/vibes.h>
33
34#include <dev/pci/pcireg.h>
35#include <dev/pci/pcivar.h>
36
37#include "mixer_if.h"
38
39SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/vibes.c 170521 2007-06-11 00:49:46Z ariff $");
40
41/* ------------------------------------------------------------------------- */
42/* Constants */
43
44#define SV_PCI_ID		0xca005333
45#define SV_DEFAULT_BUFSZ	16384
46#define SV_MIN_BLKSZ		128
47#define SV_INTR_PER_BUFFER	2
48
49#ifndef DEB
50#define DEB(x) /* (x) */
51#endif
52
53/* ------------------------------------------------------------------------- */
54/* Structures */
55
56struct sc_info;
57
58struct sc_chinfo {
59	struct sc_info	*parent;
60	struct pcm_channel	*channel;
61	struct snd_dbuf	*buffer;
62	u_int32_t	fmt, spd;
63	int		dir;
64	int		dma_active, dma_was_active;
65};
66
67struct sc_info {
68	device_t		dev;
69
70	/* DMA buffer allocator */
71	bus_dma_tag_t		parent_dmat;
72
73	/* Enhanced register resources */
74	struct resource 	*enh_reg;
75	bus_space_tag_t		enh_st;
76	bus_space_handle_t	enh_sh;
77	int			enh_type;
78	int			enh_rid;
79
80	/* DMA configuration */
81	struct resource		*dmaa_reg, *dmac_reg;
82	bus_space_tag_t		dmaa_st, dmac_st;
83	bus_space_handle_t	dmaa_sh, dmac_sh;
84	int			dmaa_type, dmac_type;
85	int			dmaa_rid, dmac_rid;
86
87	/* Interrupt resources */
88	struct resource 	*irq;
89	int			irqid;
90	void			*ih;
91
92	/* User configurable buffer size */
93	unsigned int		bufsz;
94
95	struct sc_chinfo	rch, pch;
96	u_int8_t		rev;
97};
98
99static u_int32_t sc_fmt[] = {
100	AFMT_U8,
101	AFMT_U8 | AFMT_STEREO,
102	AFMT_S16_LE,
103	AFMT_S16_LE | AFMT_STEREO,
104	0
105};
106
107static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0};
108
109/* ------------------------------------------------------------------------- */
110/* Register Manipulations */
111
112#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__)
113
114static u_int8_t
115sv_direct_get(struct sc_info *sc, u_int8_t reg)
116{
117	return bus_space_read_1(sc->enh_st, sc->enh_sh, reg);
118}
119
120static void
121_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
122{
123	u_int8_t n;
124	bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val);
125
126	n = sv_direct_get(sc, reg);
127	if (n != val) {
128		device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line);
129	}
130}
131
132static u_int8_t
133sv_indirect_get(struct sc_info *sc, u_int8_t reg)
134{
135	if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
136		reg |= SV_CM_INDEX_MCE;
137
138	bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
139	return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA);
140}
141
142#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__)
143
144static void
145_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
146{
147	if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
148		reg |= SV_CM_INDEX_MCE;
149
150	bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
151	bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val);
152
153	reg &= ~SV_CM_INDEX_MCE;
154	if (reg != SV_REG_ADC_PLLM) {
155		u_int8_t n;
156		n = sv_indirect_get(sc, reg);
157		if (n != val) {
158			device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line);
159		}
160	}
161}
162
163static void
164sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh,
165		  u_int32_t base, u_int32_t count, u_int8_t mode)
166{
167	bus_space_write_4(st, sh, SV_DMA_ADDR, base);
168	bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff);
169	bus_space_write_1(st, sh, SV_DMA_MODE, mode);
170
171	DEB(printf("base 0x%08x count %5d mode 0x%02x\n",
172		   base, count, mode));
173}
174
175static u_int32_t
176sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh)
177{
178	return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff;
179}
180
181/* ------------------------------------------------------------------------- */
182/* Play / Record Common Interface */
183
184static void *
185svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
186{
187	struct sc_info		*sc = devinfo;
188	struct sc_chinfo	*ch;
189	ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch;
190
191	ch->parent = sc;
192	ch->channel = c;
193	ch->dir = dir;
194
195	if (sndbuf_alloc(b, sc->parent_dmat, 0, sc->bufsz) != 0) {
196		DEB(printf("svchan_init failed\n"));
197		return NULL;
198	}
199	ch->buffer = b;
200	ch->fmt = AFMT_U8;
201	ch->spd = DSP_DEFAULT_SPEED;
202	ch->dma_active = ch->dma_was_active = 0;
203
204	return ch;
205}
206
207static struct pcmchan_caps *
208svchan_getcaps(kobj_t obj, void *data)
209{
210        return &sc_caps;
211}
212
213static int
214svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
215{
216	struct sc_chinfo *ch = data;
217	struct sc_info *sc = ch->parent;
218
219        /* user has requested interrupts every blocksize bytes */
220	RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER);
221	sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize);
222	DEB(printf("svchan_setblocksize: %d\n", blocksize));
223	return blocksize;
224}
225
226static int
227svchan_setformat(kobj_t obj, void *data, u_int32_t format)
228{
229	struct sc_chinfo *ch = data;
230	/* NB Just note format here as setting format register
231	 * generates noise if dma channel is inactive. */
232	ch->fmt  = (format & AFMT_STEREO) ? SV_AFMT_STEREO : SV_AFMT_MONO;
233	ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8;
234	return 0;
235}
236
237static int
238svchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
239{
240	struct sc_chinfo *ch = data;
241	RANGE(speed, 8000, 48000);
242	ch->spd = speed;
243	return speed;
244}
245
246/* ------------------------------------------------------------------------- */
247/* Recording interface */
248
249static int
250sv_set_recspeed(struct sc_info *sc, u_int32_t speed)
251{
252	u_int32_t	f_out, f_actual;
253	u_int32_t	rs, re, r, best_r = 0, r2, t, n, best_n = 0;
254	int32_t		m, best_m = 0, ms, me, err, min_err;
255
256	/* This algorithm is a variant described in sonicvibes.pdf
257	 * appendix A.  This search is marginally more extensive and
258	 * results in (nominally) better sample rate matching. */
259
260	f_out = SV_F_SCALE * speed;
261	min_err = 0x7fffffff;
262
263	/* Find bounds of r to examine, rs <= r <= re */
264	t = 80000000 / f_out;
265	for (rs = 1; (1 << rs) < t; rs++);
266
267	t = 150000000 / f_out;
268	for (re = 1; (2 << re) < t; re++);
269	if (re > 7) re = 7;
270
271	/* Search over r, n, m */
272	for (r = rs; r <= re; r++) {
273		r2 = (1 << r);
274		for (n = 3; n < 34; n++) {
275			m = f_out * n / (SV_F_REF / r2);
276			ms = (m > 3) ? (m - 1) : 3;
277			me = (m < 129) ? (m + 1) : 129;
278			for (m = ms; m <= me; m++) {
279				f_actual = m * SV_F_REF / (n * r2);
280				if (f_actual > f_out) {
281					err = f_actual - f_out;
282				} else {
283					err = f_out - f_actual;
284				}
285				if (err < min_err) {
286					best_r = r;
287					best_m = m - 2;
288					best_n = n - 2;
289					min_err = err;
290					if (err == 0) break;
291				}
292			}
293		}
294	}
295
296	sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m);
297	sv_indirect_set(sc, SV_REG_ADC_PLLN,
298			SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r));
299	DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n",
300		   speed,
301		   sv_indirect_get(sc, SV_REG_ADC_PLLM),
302		   sv_indirect_get(sc, SV_REG_ADC_PLLN)));
303	return 0;
304}
305
306static int
307svrchan_trigger(kobj_t obj, void *data, int go)
308{
309	struct sc_chinfo	*ch = data;
310	struct sc_info 		*sc = ch->parent;
311	u_int32_t		count, enable;
312	u_int8_t		v;
313
314	switch(go) {
315	case PCMTRIG_START:
316		/* Set speed */
317		sv_set_recspeed(sc, ch->spd);
318
319		/* Set format */
320		v  = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK;
321		v |= SV_AFMT_DMAC(ch->fmt);
322		sv_indirect_set(sc, SV_REG_FORMAT, v);
323
324		/* Program DMA */
325		count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */
326		sv_dma_set_config(sc->dmac_st, sc->dmac_sh,
327				  sndbuf_getbufaddr(ch->buffer),
328				  count - 1,
329				  SV_DMA_MODE_AUTO | SV_DMA_MODE_RD);
330		count = count / SV_INTR_PER_BUFFER - 1;
331		sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8);
332		sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff);
333
334		/* Enable DMA */
335		enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE;
336		sv_indirect_set(sc, SV_REG_ENABLE, enable);
337		ch->dma_active = 1;
338		break;
339	case PCMTRIG_STOP:
340	case PCMTRIG_ABORT:
341		enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE;
342		sv_indirect_set(sc, SV_REG_ENABLE, enable);
343		ch->dma_active = 0;
344		break;
345	}
346
347	return 0;
348}
349
350static int
351svrchan_getptr(kobj_t obj, void *data)
352{
353	struct sc_chinfo	*ch = data;
354	struct sc_info 		*sc = ch->parent;
355	u_int32_t sz, remain;
356
357	sz = sndbuf_getsize(ch->buffer);
358	/* DMAC uses words */
359	remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2;
360	return sz - remain;
361}
362
363static kobj_method_t svrchan_methods[] = {
364        KOBJMETHOD(channel_init,                svchan_init),
365        KOBJMETHOD(channel_setformat,           svchan_setformat),
366        KOBJMETHOD(channel_setspeed,            svchan_setspeed),
367        KOBJMETHOD(channel_setblocksize,        svchan_setblocksize),
368        KOBJMETHOD(channel_trigger,             svrchan_trigger),
369        KOBJMETHOD(channel_getptr,              svrchan_getptr),
370        KOBJMETHOD(channel_getcaps,             svchan_getcaps),
371        { 0, 0 }
372};
373CHANNEL_DECLARE(svrchan);
374
375/* ------------------------------------------------------------------------- */
376/* Playback interface */
377
378static int
379svpchan_trigger(kobj_t obj, void *data, int go)
380{
381	struct sc_chinfo	*ch = data;
382	struct sc_info		*sc = ch->parent;
383	u_int32_t		count, enable, speed;
384	u_int8_t		v;
385
386	switch(go) {
387	case PCMTRIG_START:
388		/* Set speed */
389		speed = (ch->spd * 65536) / 48000;
390		if (speed > 65535)
391			speed = 65535;
392		sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8);
393		sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff);
394
395		/* Set format */
396		v  = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK;
397		v |= SV_AFMT_DMAA(ch->fmt);
398		sv_indirect_set(sc, SV_REG_FORMAT, v);
399
400		/* Program DMA */
401		count = sndbuf_getsize(ch->buffer);
402		sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh,
403				  sndbuf_getbufaddr(ch->buffer),
404				  count - 1,
405				  SV_DMA_MODE_AUTO | SV_DMA_MODE_WR);
406		count = count / SV_INTR_PER_BUFFER - 1;
407		sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8);
408		sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff);
409
410		/* Enable DMA */
411		enable = sv_indirect_get(sc, SV_REG_ENABLE);
412		enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE;
413		sv_indirect_set(sc, SV_REG_ENABLE, enable);
414		ch->dma_active = 1;
415		break;
416	case PCMTRIG_STOP:
417	case PCMTRIG_ABORT:
418		enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE;
419		sv_indirect_set(sc, SV_REG_ENABLE, enable);
420		ch->dma_active = 0;
421		break;
422	}
423
424	return 0;
425}
426
427static int
428svpchan_getptr(kobj_t obj, void *data)
429{
430	struct sc_chinfo	*ch = data;
431	struct sc_info 		*sc = ch->parent;
432	u_int32_t sz, remain;
433
434	sz = sndbuf_getsize(ch->buffer);
435	/* DMAA uses bytes */
436	remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1;
437	return (sz - remain);
438}
439
440static kobj_method_t svpchan_methods[] = {
441        KOBJMETHOD(channel_init,                svchan_init),
442        KOBJMETHOD(channel_setformat,           svchan_setformat),
443        KOBJMETHOD(channel_setspeed,            svchan_setspeed),
444        KOBJMETHOD(channel_setblocksize,        svchan_setblocksize),
445        KOBJMETHOD(channel_trigger,             svpchan_trigger),
446        KOBJMETHOD(channel_getptr,              svpchan_getptr),
447        KOBJMETHOD(channel_getcaps,             svchan_getcaps),
448        { 0, 0 }
449};
450CHANNEL_DECLARE(svpchan);
451
452/* ------------------------------------------------------------------------- */
453/* Mixer support */
454
455struct sv_mix_props {
456	u_int8_t	reg;		/* Register */
457	u_int8_t	stereo:1;	/* Supports 2 channels */
458	u_int8_t	mute:1;		/* Supports muting */
459	u_int8_t	neg:1;		/* Negative gain */
460	u_int8_t	max;		/* Max gain */
461	u_int8_t	iselect;	/* Input selector */
462} static const mt [SOUND_MIXER_NRDEVICES] = {
463	[SOUND_MIXER_LINE1]  = {SV_REG_AUX1,      1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1},
464	[SOUND_MIXER_CD]     = {SV_REG_CD,        1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD},
465	[SOUND_MIXER_LINE]   = {SV_REG_LINE,      1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE},
466	[SOUND_MIXER_MIC]    = {SV_REG_MIC,       0, 1, 1, SV_MIC_MAX,     SV_INPUT_MIC},
467	[SOUND_MIXER_SYNTH]  = {SV_REG_SYNTH,     0, 1, 1, SV_DEFAULT_MAX, 0},
468	[SOUND_MIXER_LINE2]  = {SV_REG_AUX2,      1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2},
469	[SOUND_MIXER_VOLUME] = {SV_REG_MIX,       1, 1, 1, SV_DEFAULT_MAX, 0},
470	[SOUND_MIXER_PCM]    = {SV_REG_PCM,       1, 1, 1, SV_PCM_MAX,     0},
471	[SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0},
472};
473
474static void
475sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel)
476{
477	u_int8_t	v;
478	int32_t		g;
479
480	g = mt[dev].max * gain / 100;
481	if (mt[dev].neg)
482		g = mt[dev].max - g;
483	v  = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max;
484	v |= g;
485
486	if (mt[dev].mute) {
487		if (gain == 0) {
488			v |= SV_MUTE;
489		} else {
490			v &= ~SV_MUTE;
491		}
492	}
493	sv_indirect_set(sc, mt[dev].reg + channel, v);
494}
495
496static int
497sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right)
498{
499	sv_channel_gain(sc, dev, left, 0);
500	if (mt[dev].stereo)
501		sv_channel_gain(sc, dev, right, 1);
502	return 0;
503}
504
505static void
506sv_mix_mute_all(struct sc_info *sc)
507{
508	int32_t i;
509	for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
510		if (mt[i].reg) sv_gain(sc, i, 0, 0);
511	}
512}
513
514static int
515sv_mix_init(struct snd_mixer *m)
516{
517	u_int32_t 	i, v;
518
519	for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
520		if (mt[i].max) v |= (1 << i);
521	}
522	mix_setdevs(m, v);
523
524	for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
525		if (mt[i].iselect) v |= (1 << i);
526	}
527	mix_setrecdevs(m, v);
528
529	return 0;
530}
531
532static int
533sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right)
534{
535	struct sc_info	*sc = mix_getdevinfo(m);
536	return sv_gain(sc, dev, left, right);
537}
538
539static int
540sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask)
541{
542	struct sc_info	*sc = mix_getdevinfo(m);
543	u_int32_t	i, v;
544
545	v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK;
546	for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
547		if ((1 << i) & mask) {
548			v |= mt[i].iselect;
549		}
550	}
551	DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v));
552	sv_indirect_set(sc, SV_REG_ADC_INPUT, v);
553	return mask;
554}
555
556static kobj_method_t sv_mixer_methods[] = {
557        KOBJMETHOD(mixer_init,		sv_mix_init),
558        KOBJMETHOD(mixer_set,		sv_mix_set),
559        KOBJMETHOD(mixer_setrecsrc,	sv_mix_setrecsrc),
560        { 0, 0 }
561};
562MIXER_DECLARE(sv_mixer);
563
564/* ------------------------------------------------------------------------- */
565/* Power management and reset */
566
567static void
568sv_power(struct sc_info *sc, int state)
569{
570	u_int8_t v;
571
572        switch (state) {
573        case 0:
574		/* power on */
575		v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF;
576		v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL;
577		sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
578		v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF;
579		v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP;
580		sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v);
581                break;
582        default:
583		/* power off */
584		v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF;
585		sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
586		v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF;
587		sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF);
588                break;
589        }
590        DEB(printf("Power state %d\n", state));
591}
592
593static int
594sv_init(struct sc_info *sc)
595{
596	u_int8_t	v;
597
598	/* Effect reset */
599	v  = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED;
600	v |= SV_CM_CONTROL_RESET;
601	sv_direct_set(sc, SV_CM_CONTROL, v);
602	DELAY(50);
603
604	v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET;
605	sv_direct_set(sc, SV_CM_CONTROL, v);
606	DELAY(50);
607
608	/* Set in enhanced mode */
609	v = sv_direct_get(sc, SV_CM_CONTROL);
610	v |= SV_CM_CONTROL_ENHANCED;
611	sv_direct_set(sc, SV_CM_CONTROL, v);
612
613	/* Enable interrupts (UDM and MIDM are superfluous) */
614	v = sv_direct_get(sc, SV_CM_IMR);
615	v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK);
616	sv_direct_set(sc, SV_CM_IMR, v);
617
618	/* Select ADC PLL for ADC clock */
619	v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE;
620	sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v);
621
622	/* Disable loopback - binds ADC and DAC rates */
623	v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE;
624	sv_indirect_set(sc, SV_REG_LOOPBACK, v);
625
626	/* Disable SRS */
627	v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED;
628	sv_indirect_set(sc, SV_REG_SRS_SPACE, v);
629
630	/* Get revision */
631	sc->rev = sv_indirect_get(sc, SV_REG_REVISION);
632
633	return 0;
634}
635
636static int
637sv_suspend(device_t dev)
638{
639	struct sc_info	*sc = pcm_getdevinfo(dev);
640
641	sc->rch.dma_was_active = sc->rch.dma_active;
642	svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT);
643
644	sc->pch.dma_was_active = sc->pch.dma_active;
645	svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT);
646
647	sv_mix_mute_all(sc);
648	sv_power(sc, 3);
649
650	return 0;
651}
652
653static int
654sv_resume(device_t dev)
655{
656	struct sc_info	*sc = pcm_getdevinfo(dev);
657
658	sv_mix_mute_all(sc);
659	sv_power(sc, 0);
660	if (sv_init(sc) == -1) {
661		device_printf(dev, "unable to reinitialize the card\n");
662		return ENXIO;
663	}
664
665	if (mixer_reinit(dev) == -1) {
666		device_printf(dev, "unable to reinitialize the mixer\n");
667                return ENXIO;
668        }
669
670	if (sc->rch.dma_was_active) {
671		svrchan_trigger(0, &sc->rch, PCMTRIG_START);
672	}
673
674	if (sc->pch.dma_was_active) {
675		svpchan_trigger(0, &sc->pch, PCMTRIG_START);
676	}
677
678	return 0;
679}
680
681/* ------------------------------------------------------------------------- */
682/* Resource related */
683
684static void
685sv_intr(void *data)
686{
687	struct sc_info	*sc = data;
688	u_int8_t	status;
689
690	status = sv_direct_get(sc, SV_CM_STATUS);
691	if (status & SV_CM_STATUS_AINT)
692		chn_intr(sc->pch.channel);
693
694	if (status & SV_CM_STATUS_CINT)
695		chn_intr(sc->rch.channel);
696
697	status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT);
698	DEB(if (status) printf("intr 0x%02x ?\n", status));
699
700	return;
701}
702
703static int
704sv_probe(device_t dev)
705{
706	switch(pci_get_devid(dev)) {
707	case SV_PCI_ID:
708		device_set_desc(dev, "S3 Sonicvibes");
709		return BUS_PROBE_DEFAULT;
710	default:
711		return ENXIO;
712	}
713}
714
715static int
716sv_attach(device_t dev) {
717	struct sc_info	*sc;
718	u_int32_t	data;
719	char		status[SND_STATUSLEN];
720	u_long		midi_start, games_start, count, sdmaa, sdmac, ml, mu;
721
722	sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT | M_ZERO);
723	if (sc == NULL) {
724		device_printf(dev, "cannot allocate softc");
725		return ENXIO;
726	}
727	sc->dev = dev;
728
729	data = pci_read_config(dev, PCIR_COMMAND, 2);
730	data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN);
731	pci_write_config(dev, PCIR_COMMAND, data, 2);
732	data = pci_read_config(dev, PCIR_COMMAND, 2);
733
734#if __FreeBSD_version > 500000
735        if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
736                device_printf(dev, "chip is in D%d power mode "
737                              "-- setting to D0\n", pci_get_powerstate(dev));
738                pci_set_powerstate(dev, PCI_POWERSTATE_D0);
739        }
740#endif
741	sc->enh_rid  = SV_PCI_ENHANCED;
742	sc->enh_type = SYS_RES_IOPORT;
743	sc->enh_reg  = bus_alloc_resource(dev, sc->enh_type,
744					  &sc->enh_rid, 0, ~0,
745					  SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
746	if (sc->enh_reg == NULL) {
747		device_printf(dev, "sv_attach: cannot allocate enh\n");
748		return ENXIO;
749	}
750	sc->enh_st = rman_get_bustag(sc->enh_reg);
751	sc->enh_sh = rman_get_bushandle(sc->enh_reg);
752
753	data = pci_read_config(dev, SV_PCI_DMAA, 4);
754	DEB(printf("sv_attach: initial dmaa 0x%08x\n", data));
755	data = pci_read_config(dev, SV_PCI_DMAC, 4);
756	DEB(printf("sv_attach: initial dmac 0x%08x\n", data));
757
758	/* Initialize DMA_A and DMA_C */
759	pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4);
760	pci_write_config(dev, SV_PCI_DMAC, 0, 4);
761
762	/* Register IRQ handler */
763	sc->irqid = 0;
764        sc->irq   = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid,
765				       0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
766        if (!sc->irq ||
767	    snd_setup_intr(dev, sc->irq, 0, sv_intr, sc, &sc->ih)) {
768                device_printf(dev, "sv_attach: Unable to map interrupt\n");
769                goto fail;
770        }
771
772	sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536);
773        if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2,
774			       /*boundary*/0,
775                               /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
776                               /*highaddr*/BUS_SPACE_MAXADDR,
777                               /*filter*/NULL, /*filterarg*/NULL,
778                               /*maxsize*/sc->bufsz, /*nsegments*/1,
779                               /*maxsegz*/0x3ffff, /*flags*/0,
780			       /*lockfunc*/busdma_lock_mutex,
781			       /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
782                device_printf(dev, "sv_attach: Unable to create dma tag\n");
783                goto fail;
784        }
785
786	/* Power up and initialize */
787	sv_mix_mute_all(sc);
788	sv_power(sc, 0);
789	sv_init(sc);
790
791	if (mixer_init(dev, &sv_mixer_class, sc) != 0) {
792		device_printf(dev, "sv_attach: Mixer failed to initialize\n");
793		goto fail;
794	}
795
796	/* XXX This is a hack, and it's ugly.  Okay, the deal is this
797	 * card has two more io regions that available for automatic
798	 * configuration by the pci code.  These need to be allocated
799	 * to used as control registers for the DMA engines.
800	 * Unfortunately FBSD has no bus_space_foo() functions so we
801	 * have to grab port space in region of existing resources.  Go
802	 * for space between midi and game ports.
803	 */
804	bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count);
805	bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count);
806
807	if (games_start < midi_start) {
808		ml = games_start;
809		mu = midi_start;
810	} else {
811		ml = midi_start;
812		mu = games_start;
813	}
814	/* Check assumptions about space availability and
815           alignment. How driver loaded can determine whether
816           games_start > midi_start or vice versa */
817	if ((mu - ml >= 0x800)  ||
818	    ((mu - ml) % 0x200)) {
819		device_printf(dev, "sv_attach: resource assumptions not met "
820			      "(midi 0x%08lx, games 0x%08lx)\n",
821			      midi_start, games_start);
822		goto fail;
823	}
824
825	sdmaa = ml + 0x40;
826	sdmac = sdmaa + 0x40;
827
828	/* Add resources to list of pci resources for this device - from here on
829	 * they look like normal pci resources. */
830	bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE);
831	bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE);
832
833	/* Cache resource short-cuts for dma_a */
834	sc->dmaa_rid = SV_PCI_DMAA;
835	sc->dmaa_type = SYS_RES_IOPORT;
836	sc->dmaa_reg  = bus_alloc_resource(dev, sc->dmaa_type,
837					   &sc->dmaa_rid, 0, ~0,
838					   SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
839	if (sc->dmaa_reg == NULL) {
840		device_printf(dev, "sv_attach: cannot allocate dmaa\n");
841		goto fail;
842	}
843	sc->dmaa_st = rman_get_bustag(sc->dmaa_reg);
844	sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg);
845
846	/* Poke port into dma_a configuration, nb bit flags to enable dma */
847	data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
848	data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f);
849	pci_write_config(dev, SV_PCI_DMAA, data, 4);
850	DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4)));
851
852	/* Cache resource short-cuts for dma_c */
853	sc->dmac_rid = SV_PCI_DMAC;
854	sc->dmac_type = SYS_RES_IOPORT;
855	sc->dmac_reg  = bus_alloc_resource(dev, sc->dmac_type,
856					   &sc->dmac_rid, 0, ~0,
857					   SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
858	if (sc->dmac_reg == NULL) {
859		device_printf(dev, "sv_attach: cannot allocate dmac\n");
860		goto fail;
861	}
862	sc->dmac_st = rman_get_bustag(sc->dmac_reg);
863	sc->dmac_sh = rman_get_bushandle(sc->dmac_reg);
864
865	/* Poke port into dma_c configuration, nb bit flags to enable dma */
866	data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
867	data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f);
868	pci_write_config(dev, SV_PCI_DMAC, data, 4);
869	DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4)));
870
871	if (bootverbose)
872		printf("Sonicvibes: revision %d.\n", sc->rev);
873
874        if (pcm_register(dev, sc, 1, 1)) {
875		device_printf(dev, "sv_attach: pcm_register fail\n");
876                goto fail;
877	}
878
879        pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc);
880        pcm_addchan(dev, PCMDIR_REC,  &svrchan_class, sc);
881
882        snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s",
883                 rman_get_start(sc->enh_reg),  rman_get_start(sc->irq),PCM_KLDSTRING(snd_vibes));
884        pcm_setstatus(dev, status);
885
886        DEB(printf("sv_attach: succeeded\n"));
887
888	return 0;
889
890 fail:
891	if (sc->parent_dmat)
892		bus_dma_tag_destroy(sc->parent_dmat);
893        if (sc->ih)
894		bus_teardown_intr(dev, sc->irq, sc->ih);
895        if (sc->irq)
896		bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
897	if (sc->enh_reg)
898		bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg);
899	if (sc->dmaa_reg)
900		bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg);
901	if (sc->dmac_reg)
902		bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg);
903	return ENXIO;
904}
905
906static int
907sv_detach(device_t dev) {
908	struct sc_info	*sc;
909	int		r;
910
911	r = pcm_unregister(dev);
912	if (r) return r;
913
914	sc = pcm_getdevinfo(dev);
915	sv_mix_mute_all(sc);
916	sv_power(sc, 3);
917
918	bus_dma_tag_destroy(sc->parent_dmat);
919	bus_teardown_intr(dev, sc->irq, sc->ih);
920	bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq);
921	bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg);
922	bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg);
923	bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg);
924
925	free(sc, M_DEVBUF);
926
927	return 0;
928}
929
930static device_method_t sc_methods[] = {
931        DEVMETHOD(device_probe,         sv_probe),
932        DEVMETHOD(device_attach,        sv_attach),
933        DEVMETHOD(device_detach,        sv_detach),
934        DEVMETHOD(device_resume,        sv_resume),
935        DEVMETHOD(device_suspend,       sv_suspend),
936        { 0, 0 }
937};
938
939static driver_t sonicvibes_driver = {
940        "pcm",
941        sc_methods,
942        PCM_SOFTC_SIZE
943};
944
945DRIVER_MODULE(snd_vibes, pci, sonicvibes_driver, pcm_devclass, 0, 0);
946MODULE_DEPEND(snd_vibes, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
947MODULE_VERSION(snd_vibes, 1);
948