vibes.c revision 166904
1/*- 2 * Copyright (c) 2001 Orion Hodson <O.Hodson@cs.ucl.ac.uk> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * This card has the annoying habit of "clicking" when attached and 27 * detached, haven't been able to remedy this with any combination of 28 * muting. 29 */ 30 31#include <dev/sound/pcm/sound.h> 32#include <dev/sound/pci/vibes.h> 33 34#include <dev/pci/pcireg.h> 35#include <dev/pci/pcivar.h> 36 37#include "mixer_if.h" 38 39SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/vibes.c 166904 2007-02-23 13:47:34Z netchild $"); 40 41/* ------------------------------------------------------------------------- */ 42/* Constants */ 43 44#define SV_PCI_ID 0xca005333 45#define SV_DEFAULT_BUFSZ 16384 46#define SV_MIN_BLKSZ 128 47#define SV_INTR_PER_BUFFER 2 48 49#ifndef DEB 50#define DEB(x) /* (x) */ 51#endif 52 53/* ------------------------------------------------------------------------- */ 54/* Structures */ 55 56struct sc_info; 57 58struct sc_chinfo { 59 struct sc_info *parent; 60 struct pcm_channel *channel; 61 struct snd_dbuf *buffer; 62 u_int32_t fmt, spd; 63 int dir; 64 int dma_active, dma_was_active; 65}; 66 67struct sc_info { 68 device_t dev; 69 70 /* DMA buffer allocator */ 71 bus_dma_tag_t parent_dmat; 72 73 /* Enhanced register resources */ 74 struct resource *enh_reg; 75 bus_space_tag_t enh_st; 76 bus_space_handle_t enh_sh; 77 int enh_type; 78 int enh_rid; 79 80 /* DMA configuration */ 81 struct resource *dmaa_reg, *dmac_reg; 82 bus_space_tag_t dmaa_st, dmac_st; 83 bus_space_handle_t dmaa_sh, dmac_sh; 84 int dmaa_type, dmac_type; 85 int dmaa_rid, dmac_rid; 86 87 /* Interrupt resources */ 88 struct resource *irq; 89 int irqid; 90 void *ih; 91 92 /* User configurable buffer size */ 93 unsigned int bufsz; 94 95 struct sc_chinfo rch, pch; 96 u_int8_t rev; 97}; 98 99static u_int32_t sc_fmt[] = { 100 AFMT_U8, 101 AFMT_U8 | AFMT_STEREO, 102 AFMT_S16_LE, 103 AFMT_S16_LE | AFMT_STEREO, 104 0 105}; 106 107static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0}; 108 109/* ------------------------------------------------------------------------- */ 110/* Register Manipulations */ 111 112#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__) 113 114static u_int8_t 115sv_direct_get(struct sc_info *sc, u_int8_t reg) 116{ 117 return bus_space_read_1(sc->enh_st, sc->enh_sh, reg); 118} 119 120static void 121_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 122{ 123 u_int8_t n; 124 bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val); 125 126 n = sv_direct_get(sc, reg); 127 if (n != val) { 128 device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line); 129 } 130} 131 132static u_int8_t 133sv_indirect_get(struct sc_info *sc, u_int8_t reg) 134{ 135 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 136 reg |= SV_CM_INDEX_MCE; 137 138 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 139 return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA); 140} 141 142#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__) 143 144static void 145_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line) 146{ 147 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR) 148 reg |= SV_CM_INDEX_MCE; 149 150 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg); 151 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val); 152 153 reg &= ~SV_CM_INDEX_MCE; 154 if (reg != SV_REG_ADC_PLLM) { 155 u_int8_t n; 156 n = sv_indirect_get(sc, reg); 157 if (n != val) { 158 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line); 159 } 160 } 161} 162 163static void 164sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh, 165 u_int32_t base, u_int32_t count, u_int8_t mode) 166{ 167 bus_space_write_4(st, sh, SV_DMA_ADDR, base); 168 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff); 169 bus_space_write_1(st, sh, SV_DMA_MODE, mode); 170 171 DEB(printf("base 0x%08x count %5d mode 0x%02x\n", 172 base, count, mode)); 173} 174 175static u_int32_t 176sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh) 177{ 178 return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff; 179} 180 181/* ------------------------------------------------------------------------- */ 182/* Play / Record Common Interface */ 183 184static void * 185svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir) 186{ 187 struct sc_info *sc = devinfo; 188 struct sc_chinfo *ch; 189 ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch; 190 191 ch->parent = sc; 192 ch->channel = c; 193 ch->dir = dir; 194 195 if (sndbuf_alloc(b, sc->parent_dmat, sc->bufsz) != 0) { 196 DEB(printf("svchan_init failed\n")); 197 return NULL; 198 } 199 ch->buffer = b; 200 ch->fmt = AFMT_U8; 201 ch->spd = DSP_DEFAULT_SPEED; 202 ch->dma_active = ch->dma_was_active = 0; 203 204 return ch; 205} 206 207static struct pcmchan_caps * 208svchan_getcaps(kobj_t obj, void *data) 209{ 210 return &sc_caps; 211} 212 213static int 214svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize) 215{ 216 struct sc_chinfo *ch = data; 217 struct sc_info *sc = ch->parent; 218 219 /* user has requested interrupts every blocksize bytes */ 220 RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER); 221 sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize); 222 DEB(printf("svchan_setblocksize: %d\n", blocksize)); 223 return blocksize; 224} 225 226static int 227svchan_setformat(kobj_t obj, void *data, u_int32_t format) 228{ 229 struct sc_chinfo *ch = data; 230 /* NB Just note format here as setting format register 231 * generates noise if dma channel is inactive. */ 232 ch->fmt = (format & AFMT_STEREO) ? SV_AFMT_STEREO : SV_AFMT_MONO; 233 ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8; 234 return 0; 235} 236 237static int 238svchan_setspeed(kobj_t obj, void *data, u_int32_t speed) 239{ 240 struct sc_chinfo *ch = data; 241 RANGE(speed, 8000, 48000); 242 ch->spd = speed; 243 return speed; 244} 245 246/* ------------------------------------------------------------------------- */ 247/* Recording interface */ 248 249static int 250sv_set_recspeed(struct sc_info *sc, u_int32_t speed) 251{ 252 u_int32_t f_out, f_actual; 253 u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0; 254 int32_t m, best_m = 0, ms, me, err, min_err; 255 256 /* This algorithm is a variant described in sonicvibes.pdf 257 * appendix A. This search is marginally more extensive and 258 * results in (nominally) better sample rate matching. */ 259 260 f_out = SV_F_SCALE * speed; 261 min_err = 0x7fffffff; 262 263 /* Find bounds of r to examine, rs <= r <= re */ 264 t = 80000000 / f_out; 265 for (rs = 1; (1 << rs) < t; rs++); 266 267 t = 150000000 / f_out; 268 for (re = 1; (2 << re) < t; re++); 269 if (re > 7) re = 7; 270 271 /* Search over r, n, m */ 272 for (r = rs; r <= re; r++) { 273 r2 = (1 << r); 274 for (n = 3; n < 34; n++) { 275 m = f_out * n / (SV_F_REF / r2); 276 ms = (m > 3) ? (m - 1) : 3; 277 me = (m < 129) ? (m + 1) : 129; 278 for (m = ms; m <= me; m++) { 279 f_actual = m * SV_F_REF / (n * r2); 280 if (f_actual > f_out) { 281 err = f_actual - f_out; 282 } else { 283 err = f_out - f_actual; 284 } 285 if (err < min_err) { 286 best_r = r; 287 best_m = m - 2; 288 best_n = n - 2; 289 min_err = err; 290 if (err == 0) break; 291 } 292 } 293 } 294 } 295 296 sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m); 297 sv_indirect_set(sc, SV_REG_ADC_PLLN, 298 SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r)); 299 DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n", 300 speed, 301 sv_indirect_get(sc, SV_REG_ADC_PLLM), 302 sv_indirect_get(sc, SV_REG_ADC_PLLN))); 303 return 0; 304} 305 306static int 307svrchan_trigger(kobj_t obj, void *data, int go) 308{ 309 struct sc_chinfo *ch = data; 310 struct sc_info *sc = ch->parent; 311 u_int32_t count, enable; 312 u_int8_t v; 313 314 switch(go) { 315 case PCMTRIG_START: 316 /* Set speed */ 317 sv_set_recspeed(sc, ch->spd); 318 319 /* Set format */ 320 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK; 321 v |= SV_AFMT_DMAC(ch->fmt); 322 sv_indirect_set(sc, SV_REG_FORMAT, v); 323 324 /* Program DMA */ 325 count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */ 326 sv_dma_set_config(sc->dmac_st, sc->dmac_sh, 327 sndbuf_getbufaddr(ch->buffer), 328 count - 1, 329 SV_DMA_MODE_AUTO | SV_DMA_MODE_RD); 330 count = count / SV_INTR_PER_BUFFER - 1; 331 sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8); 332 sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff); 333 334 /* Enable DMA */ 335 enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE; 336 sv_indirect_set(sc, SV_REG_ENABLE, enable); 337 ch->dma_active = 1; 338 break; 339 case PCMTRIG_ABORT: 340 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE; 341 sv_indirect_set(sc, SV_REG_ENABLE, enable); 342 ch->dma_active = 0; 343 break; 344 } 345 346 return 0; 347} 348 349static int 350svrchan_getptr(kobj_t obj, void *data) 351{ 352 struct sc_chinfo *ch = data; 353 struct sc_info *sc = ch->parent; 354 u_int32_t sz, remain; 355 356 sz = sndbuf_getsize(ch->buffer); 357 /* DMAC uses words */ 358 remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2; 359 return sz - remain; 360} 361 362static kobj_method_t svrchan_methods[] = { 363 KOBJMETHOD(channel_init, svchan_init), 364 KOBJMETHOD(channel_setformat, svchan_setformat), 365 KOBJMETHOD(channel_setspeed, svchan_setspeed), 366 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 367 KOBJMETHOD(channel_trigger, svrchan_trigger), 368 KOBJMETHOD(channel_getptr, svrchan_getptr), 369 KOBJMETHOD(channel_getcaps, svchan_getcaps), 370 { 0, 0 } 371}; 372CHANNEL_DECLARE(svrchan); 373 374/* ------------------------------------------------------------------------- */ 375/* Playback interface */ 376 377static int 378svpchan_trigger(kobj_t obj, void *data, int go) 379{ 380 struct sc_chinfo *ch = data; 381 struct sc_info *sc = ch->parent; 382 u_int32_t count, enable, speed; 383 u_int8_t v; 384 385 switch(go) { 386 case PCMTRIG_START: 387 /* Set speed */ 388 speed = (ch->spd * 65536) / 48000; 389 if (speed > 65535) 390 speed = 65535; 391 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8); 392 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff); 393 394 /* Set format */ 395 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK; 396 v |= SV_AFMT_DMAA(ch->fmt); 397 sv_indirect_set(sc, SV_REG_FORMAT, v); 398 399 /* Program DMA */ 400 count = sndbuf_getsize(ch->buffer); 401 sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh, 402 sndbuf_getbufaddr(ch->buffer), 403 count - 1, 404 SV_DMA_MODE_AUTO | SV_DMA_MODE_WR); 405 count = count / SV_INTR_PER_BUFFER - 1; 406 sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8); 407 sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff); 408 409 /* Enable DMA */ 410 enable = sv_indirect_get(sc, SV_REG_ENABLE); 411 enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE; 412 sv_indirect_set(sc, SV_REG_ENABLE, enable); 413 ch->dma_active = 1; 414 break; 415 case PCMTRIG_ABORT: 416 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE; 417 sv_indirect_set(sc, SV_REG_ENABLE, enable); 418 ch->dma_active = 0; 419 break; 420 } 421 422 return 0; 423} 424 425static int 426svpchan_getptr(kobj_t obj, void *data) 427{ 428 struct sc_chinfo *ch = data; 429 struct sc_info *sc = ch->parent; 430 u_int32_t sz, remain; 431 432 sz = sndbuf_getsize(ch->buffer); 433 /* DMAA uses bytes */ 434 remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1; 435 return (sz - remain); 436} 437 438static kobj_method_t svpchan_methods[] = { 439 KOBJMETHOD(channel_init, svchan_init), 440 KOBJMETHOD(channel_setformat, svchan_setformat), 441 KOBJMETHOD(channel_setspeed, svchan_setspeed), 442 KOBJMETHOD(channel_setblocksize, svchan_setblocksize), 443 KOBJMETHOD(channel_trigger, svpchan_trigger), 444 KOBJMETHOD(channel_getptr, svpchan_getptr), 445 KOBJMETHOD(channel_getcaps, svchan_getcaps), 446 { 0, 0 } 447}; 448CHANNEL_DECLARE(svpchan); 449 450/* ------------------------------------------------------------------------- */ 451/* Mixer support */ 452 453struct sv_mix_props { 454 u_int8_t reg; /* Register */ 455 u_int8_t stereo:1; /* Supports 2 channels */ 456 u_int8_t mute:1; /* Supports muting */ 457 u_int8_t neg:1; /* Negative gain */ 458 u_int8_t max; /* Max gain */ 459 u_int8_t iselect; /* Input selector */ 460} static const mt [SOUND_MIXER_NRDEVICES] = { 461 [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1}, 462 [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD}, 463 [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE}, 464 [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC}, 465 [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0}, 466 [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2}, 467 [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0}, 468 [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0}, 469 [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0}, 470}; 471 472static void 473sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel) 474{ 475 u_int8_t v; 476 int32_t g; 477 478 g = mt[dev].max * gain / 100; 479 if (mt[dev].neg) 480 g = mt[dev].max - g; 481 v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max; 482 v |= g; 483 484 if (mt[dev].mute) { 485 if (gain == 0) { 486 v |= SV_MUTE; 487 } else { 488 v &= ~SV_MUTE; 489 } 490 } 491 sv_indirect_set(sc, mt[dev].reg + channel, v); 492} 493 494static int 495sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right) 496{ 497 sv_channel_gain(sc, dev, left, 0); 498 if (mt[dev].stereo) 499 sv_channel_gain(sc, dev, right, 1); 500 return 0; 501} 502 503static void 504sv_mix_mute_all(struct sc_info *sc) 505{ 506 int32_t i; 507 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 508 if (mt[i].reg) sv_gain(sc, i, 0, 0); 509 } 510} 511 512static int 513sv_mix_init(struct snd_mixer *m) 514{ 515 u_int32_t i, v; 516 517 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 518 if (mt[i].max) v |= (1 << i); 519 } 520 mix_setdevs(m, v); 521 522 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) { 523 if (mt[i].iselect) v |= (1 << i); 524 } 525 mix_setrecdevs(m, v); 526 527 return 0; 528} 529 530static int 531sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right) 532{ 533 struct sc_info *sc = mix_getdevinfo(m); 534 return sv_gain(sc, dev, left, right); 535} 536 537static int 538sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask) 539{ 540 struct sc_info *sc = mix_getdevinfo(m); 541 u_int32_t i, v; 542 543 v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK; 544 for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) { 545 if ((1 << i) & mask) { 546 v |= mt[i].iselect; 547 } 548 } 549 DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v)); 550 sv_indirect_set(sc, SV_REG_ADC_INPUT, v); 551 return mask; 552} 553 554static kobj_method_t sv_mixer_methods[] = { 555 KOBJMETHOD(mixer_init, sv_mix_init), 556 KOBJMETHOD(mixer_set, sv_mix_set), 557 KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc), 558 { 0, 0 } 559}; 560MIXER_DECLARE(sv_mixer); 561 562/* ------------------------------------------------------------------------- */ 563/* Power management and reset */ 564 565static void 566sv_power(struct sc_info *sc, int state) 567{ 568 u_int8_t v; 569 570 switch (state) { 571 case 0: 572 /* power on */ 573 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF; 574 v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL; 575 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 576 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF; 577 v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP; 578 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v); 579 break; 580 default: 581 /* power off */ 582 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF; 583 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v); 584 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF; 585 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF); 586 break; 587 } 588 DEB(printf("Power state %d\n", state)); 589} 590 591static int 592sv_init(struct sc_info *sc) 593{ 594 u_int8_t v; 595 596 /* Effect reset */ 597 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED; 598 v |= SV_CM_CONTROL_RESET; 599 sv_direct_set(sc, SV_CM_CONTROL, v); 600 DELAY(50); 601 602 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET; 603 sv_direct_set(sc, SV_CM_CONTROL, v); 604 DELAY(50); 605 606 /* Set in enhanced mode */ 607 v = sv_direct_get(sc, SV_CM_CONTROL); 608 v |= SV_CM_CONTROL_ENHANCED; 609 sv_direct_set(sc, SV_CM_CONTROL, v); 610 611 /* Enable interrupts (UDM and MIDM are superfluous) */ 612 v = sv_direct_get(sc, SV_CM_IMR); 613 v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK); 614 sv_direct_set(sc, SV_CM_IMR, v); 615 616 /* Select ADC PLL for ADC clock */ 617 v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE; 618 sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v); 619 620 /* Disable loopback - binds ADC and DAC rates */ 621 v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE; 622 sv_indirect_set(sc, SV_REG_LOOPBACK, v); 623 624 /* Disable SRS */ 625 v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED; 626 sv_indirect_set(sc, SV_REG_SRS_SPACE, v); 627 628 /* Get revision */ 629 sc->rev = sv_indirect_get(sc, SV_REG_REVISION); 630 631 return 0; 632} 633 634static int 635sv_suspend(device_t dev) 636{ 637 struct sc_info *sc = pcm_getdevinfo(dev); 638 639 sc->rch.dma_was_active = sc->rch.dma_active; 640 svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT); 641 642 sc->pch.dma_was_active = sc->pch.dma_active; 643 svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT); 644 645 sv_mix_mute_all(sc); 646 sv_power(sc, 3); 647 648 return 0; 649} 650 651static int 652sv_resume(device_t dev) 653{ 654 struct sc_info *sc = pcm_getdevinfo(dev); 655 656 sv_mix_mute_all(sc); 657 sv_power(sc, 0); 658 if (sv_init(sc) == -1) { 659 device_printf(dev, "unable to reinitialize the card\n"); 660 return ENXIO; 661 } 662 663 if (mixer_reinit(dev) == -1) { 664 device_printf(dev, "unable to reinitialize the mixer\n"); 665 return ENXIO; 666 } 667 668 if (sc->rch.dma_was_active) { 669 svrchan_trigger(0, &sc->rch, PCMTRIG_START); 670 } 671 672 if (sc->pch.dma_was_active) { 673 svpchan_trigger(0, &sc->pch, PCMTRIG_START); 674 } 675 676 return 0; 677} 678 679/* ------------------------------------------------------------------------- */ 680/* Resource related */ 681 682static void 683sv_intr(void *data) 684{ 685 struct sc_info *sc = data; 686 u_int8_t status; 687 688 status = sv_direct_get(sc, SV_CM_STATUS); 689 if (status & SV_CM_STATUS_AINT) 690 chn_intr(sc->pch.channel); 691 692 if (status & SV_CM_STATUS_CINT) 693 chn_intr(sc->rch.channel); 694 695 status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT); 696 DEB(if (status) printf("intr 0x%02x ?\n", status)); 697 698 return; 699} 700 701static int 702sv_probe(device_t dev) 703{ 704 switch(pci_get_devid(dev)) { 705 case SV_PCI_ID: 706 device_set_desc(dev, "S3 Sonicvibes"); 707 return BUS_PROBE_DEFAULT; 708 default: 709 return ENXIO; 710 } 711} 712 713static int 714sv_attach(device_t dev) { 715 struct sc_info *sc; 716 u_int32_t data; 717 char status[SND_STATUSLEN]; 718 u_long midi_start, games_start, count, sdmaa, sdmac, ml, mu; 719 720 sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT | M_ZERO); 721 if (sc == NULL) { 722 device_printf(dev, "cannot allocate softc"); 723 return ENXIO; 724 } 725 sc->dev = dev; 726 727 data = pci_read_config(dev, PCIR_COMMAND, 2); 728 data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN); 729 pci_write_config(dev, PCIR_COMMAND, data, 2); 730 data = pci_read_config(dev, PCIR_COMMAND, 2); 731 732#if __FreeBSD_version > 500000 733 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) { 734 device_printf(dev, "chip is in D%d power mode " 735 "-- setting to D0\n", pci_get_powerstate(dev)); 736 pci_set_powerstate(dev, PCI_POWERSTATE_D0); 737 } 738#endif 739 sc->enh_rid = SV_PCI_ENHANCED; 740 sc->enh_type = SYS_RES_IOPORT; 741 sc->enh_reg = bus_alloc_resource(dev, sc->enh_type, 742 &sc->enh_rid, 0, ~0, 743 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 744 if (sc->enh_reg == NULL) { 745 device_printf(dev, "sv_attach: cannot allocate enh\n"); 746 return ENXIO; 747 } 748 sc->enh_st = rman_get_bustag(sc->enh_reg); 749 sc->enh_sh = rman_get_bushandle(sc->enh_reg); 750 751 data = pci_read_config(dev, SV_PCI_DMAA, 4); 752 DEB(printf("sv_attach: initial dmaa 0x%08x\n", data)); 753 data = pci_read_config(dev, SV_PCI_DMAC, 4); 754 DEB(printf("sv_attach: initial dmac 0x%08x\n", data)); 755 756 /* Initialize DMA_A and DMA_C */ 757 pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4); 758 pci_write_config(dev, SV_PCI_DMAC, 0, 4); 759 760 /* Register IRQ handler */ 761 sc->irqid = 0; 762 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid, 763 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 764 if (!sc->irq || 765 bus_setup_intr(dev, sc->irq, INTR_TYPE_AV, NULL, sv_intr, sc, &sc->ih)) { 766 device_printf(dev, "sv_attach: Unable to map interrupt\n"); 767 goto fail; 768 } 769 770 sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536); 771 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev), /*alignment*/2, 772 /*boundary*/0, 773 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT, 774 /*highaddr*/BUS_SPACE_MAXADDR, 775 /*filter*/NULL, /*filterarg*/NULL, 776 /*maxsize*/sc->bufsz, /*nsegments*/1, 777 /*maxsegz*/0x3ffff, /*flags*/0, 778 /*lockfunc*/busdma_lock_mutex, 779 /*lockarg*/&Giant, &sc->parent_dmat) != 0) { 780 device_printf(dev, "sv_attach: Unable to create dma tag\n"); 781 goto fail; 782 } 783 784 /* Power up and initialize */ 785 sv_mix_mute_all(sc); 786 sv_power(sc, 0); 787 sv_init(sc); 788 789 if (mixer_init(dev, &sv_mixer_class, sc) != 0) { 790 device_printf(dev, "sv_attach: Mixer failed to initialize\n"); 791 goto fail; 792 } 793 794 /* XXX This is a hack, and it's ugly. Okay, the deal is this 795 * card has two more io regions that available for automatic 796 * configuration by the pci code. These need to be allocated 797 * to used as control registers for the DMA engines. 798 * Unfortunately FBSD has no bus_space_foo() functions so we 799 * have to grab port space in region of existing resources. Go 800 * for space between midi and game ports. 801 */ 802 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count); 803 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count); 804 805 if (games_start < midi_start) { 806 ml = games_start; 807 mu = midi_start; 808 } else { 809 ml = midi_start; 810 mu = games_start; 811 } 812 /* Check assumptions about space availability and 813 alignment. How driver loaded can determine whether 814 games_start > midi_start or vice versa */ 815 if ((mu - ml >= 0x800) || 816 ((mu - ml) % 0x200)) { 817 device_printf(dev, "sv_attach: resource assumptions not met " 818 "(midi 0x%08lx, games 0x%08lx)\n", 819 midi_start, games_start); 820 goto fail; 821 } 822 823 sdmaa = ml + 0x40; 824 sdmac = sdmaa + 0x40; 825 826 /* Add resources to list of pci resources for this device - from here on 827 * they look like normal pci resources. */ 828 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE); 829 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE); 830 831 /* Cache resource short-cuts for dma_a */ 832 sc->dmaa_rid = SV_PCI_DMAA; 833 sc->dmaa_type = SYS_RES_IOPORT; 834 sc->dmaa_reg = bus_alloc_resource(dev, sc->dmaa_type, 835 &sc->dmaa_rid, 0, ~0, 836 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 837 if (sc->dmaa_reg == NULL) { 838 device_printf(dev, "sv_attach: cannot allocate dmaa\n"); 839 goto fail; 840 } 841 sc->dmaa_st = rman_get_bustag(sc->dmaa_reg); 842 sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg); 843 844 /* Poke port into dma_a configuration, nb bit flags to enable dma */ 845 data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 846 data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f); 847 pci_write_config(dev, SV_PCI_DMAA, data, 4); 848 DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4))); 849 850 /* Cache resource short-cuts for dma_c */ 851 sc->dmac_rid = SV_PCI_DMAC; 852 sc->dmac_type = SYS_RES_IOPORT; 853 sc->dmac_reg = bus_alloc_resource(dev, sc->dmac_type, 854 &sc->dmac_rid, 0, ~0, 855 SV_PCI_ENHANCED_SIZE, RF_ACTIVE); 856 if (sc->dmac_reg == NULL) { 857 device_printf(dev, "sv_attach: cannot allocate dmac\n"); 858 goto fail; 859 } 860 sc->dmac_st = rman_get_bustag(sc->dmac_reg); 861 sc->dmac_sh = rman_get_bushandle(sc->dmac_reg); 862 863 /* Poke port into dma_c configuration, nb bit flags to enable dma */ 864 data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED; 865 data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f); 866 pci_write_config(dev, SV_PCI_DMAC, data, 4); 867 DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4))); 868 869 if (bootverbose) 870 printf("Sonicvibes: revision %d.\n", sc->rev); 871 872 if (pcm_register(dev, sc, 1, 1)) { 873 device_printf(dev, "sv_attach: pcm_register fail\n"); 874 goto fail; 875 } 876 877 pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc); 878 pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc); 879 880 snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld %s", 881 rman_get_start(sc->enh_reg), rman_get_start(sc->irq),PCM_KLDSTRING(snd_vibes)); 882 pcm_setstatus(dev, status); 883 884 DEB(printf("sv_attach: succeeded\n")); 885 886 return 0; 887 888 fail: 889 if (sc->parent_dmat) 890 bus_dma_tag_destroy(sc->parent_dmat); 891 if (sc->ih) 892 bus_teardown_intr(dev, sc->irq, sc->ih); 893 if (sc->irq) 894 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 895 if (sc->enh_reg) 896 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 897 if (sc->dmaa_reg) 898 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 899 if (sc->dmac_reg) 900 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 901 return ENXIO; 902} 903 904static int 905sv_detach(device_t dev) { 906 struct sc_info *sc; 907 int r; 908 909 r = pcm_unregister(dev); 910 if (r) return r; 911 912 sc = pcm_getdevinfo(dev); 913 sv_mix_mute_all(sc); 914 sv_power(sc, 3); 915 916 bus_dma_tag_destroy(sc->parent_dmat); 917 bus_teardown_intr(dev, sc->irq, sc->ih); 918 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irq); 919 bus_release_resource(dev, sc->enh_type, sc->enh_rid, sc->enh_reg); 920 bus_release_resource(dev, sc->dmaa_type, sc->dmaa_rid, sc->dmaa_reg); 921 bus_release_resource(dev, sc->dmac_type, sc->dmac_rid, sc->dmac_reg); 922 923 free(sc, M_DEVBUF); 924 925 return 0; 926} 927 928static device_method_t sc_methods[] = { 929 DEVMETHOD(device_probe, sv_probe), 930 DEVMETHOD(device_attach, sv_attach), 931 DEVMETHOD(device_detach, sv_detach), 932 DEVMETHOD(device_resume, sv_resume), 933 DEVMETHOD(device_suspend, sv_suspend), 934 { 0, 0 } 935}; 936 937static driver_t sonicvibes_driver = { 938 "pcm", 939 sc_methods, 940 PCM_SOFTC_SIZE 941}; 942 943DRIVER_MODULE(snd_vibes, pci, sonicvibes_driver, pcm_devclass, 0, 0); 944MODULE_DEPEND(snd_vibes, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER); 945MODULE_VERSION(snd_vibes, 1); 946