1/*-
2 * Copyright (c) 2004-2006 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <machine/bus.h>
35#include <sys/rman.h>
36#include <sys/serial.h>
37
38#include <dev/scc/scc_bfe.h>
39#include <dev/scc/scc_bus.h>
40
41#include <dev/ic/z8530.h>
42
43#include "scc_if.h"
44
45static int z8530_bfe_attach(struct scc_softc *, int);
46static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *);
47static int z8530_bfe_ipend(struct scc_softc *);
48static int z8530_bfe_probe(struct scc_softc *);
49
50static kobj_method_t z8530_methods[] = {
51	KOBJMETHOD(scc_attach,	z8530_bfe_attach),
52	KOBJMETHOD(scc_iclear,	z8530_bfe_iclear),
53	KOBJMETHOD(scc_ipend,	z8530_bfe_ipend),
54	KOBJMETHOD(scc_probe,	z8530_bfe_probe),
55	KOBJMETHOD_END
56};
57
58struct scc_class scc_z8530_class = {
59	"z8530 class",
60	z8530_methods,
61	sizeof(struct scc_softc),
62	.cl_channels = 2,
63	.cl_class = SCC_CLASS_Z8530,
64	.cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC,
65	.cl_range = CHAN_B - CHAN_A,
66};
67
68/* Multiplexed I/O. */
69static __inline void
70scc_setmreg(struct scc_bas *bas, int ch, int reg, int val)
71{
72
73	scc_setreg(bas, ch + REG_CTRL, reg);
74	scc_barrier(bas);
75	scc_setreg(bas, ch + REG_CTRL, val);
76}
77
78static __inline uint8_t
79scc_getmreg(struct scc_bas *bas, int ch, int reg)
80{
81
82	scc_setreg(bas, ch + REG_CTRL, reg);
83	scc_barrier(bas);
84	return (scc_getreg(bas, ch + REG_CTRL));
85}
86
87static int
88z8530_bfe_attach(struct scc_softc *sc __unused, int reset __unused)
89{
90
91	return (0);
92}
93
94static int
95z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch)
96{
97	struct scc_bas *bas;
98	int c;
99
100	bas = &sc->sc_bas;
101	c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B;
102	mtx_lock_spin(&sc->sc_hwmtx);
103	if (ch->ch_ipend & SER_INT_TXIDLE) {
104		scc_setreg(bas, c + REG_CTRL, CR_RSTTXI);
105		scc_barrier(bas);
106	}
107	if (ch->ch_ipend & SER_INT_RXREADY) {
108		scc_getreg(bas, c + REG_DATA);
109		scc_barrier(bas);
110	}
111	if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK))
112		scc_setreg(bas, c + REG_CTRL, CR_RSTERR);
113	mtx_unlock_spin(&sc->sc_hwmtx);
114	return (0);
115}
116
117#define	SIGCHG(c, i, s, d)				\
118	if (c) {					\
119		i |= (i & s) ? s : s | d;		\
120	} else {					\
121		i = (i & s) ? (i & ~s) | d : i;		\
122	}
123
124static int
125z8530_bfe_ipend(struct scc_softc *sc)
126{
127	struct scc_bas *bas;
128	struct scc_chan *ch[2];
129	uint32_t sig;
130	uint8_t bes, ip, src;
131
132	bas = &sc->sc_bas;
133	ch[0] = &sc->sc_chan[0];
134	ch[1] = &sc->sc_chan[1];
135	ch[0]->ch_ipend = 0;
136	ch[1]->ch_ipend = 0;
137
138	mtx_lock_spin(&sc->sc_hwmtx);
139	ip = scc_getmreg(bas, CHAN_A, RR_IP);
140	if (ip & IP_RIA)
141		ch[0]->ch_ipend |= SER_INT_RXREADY;
142	if (ip & IP_RIB)
143		ch[1]->ch_ipend |= SER_INT_RXREADY;
144	if (ip & IP_TIA)
145		ch[0]->ch_ipend |= SER_INT_TXIDLE;
146	if (ip & IP_TIB)
147		ch[1]->ch_ipend |= SER_INT_TXIDLE;
148	if (ip & IP_SIA) {
149		scc_setreg(bas, CHAN_A + REG_CTRL, CR_RSTXSI);
150		scc_barrier(bas);
151		bes = scc_getreg(bas, CHAN_A + REG_CTRL);
152		if (bes & BES_BRK)
153			ch[0]->ch_ipend |= SER_INT_BREAK;
154		sig = ch[0]->ch_hwsig;
155		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
156		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
157		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
158		if (sig & SER_MASK_DELTA) {
159			ch[0]->ch_hwsig = sig;
160			ch[0]->ch_ipend |= SER_INT_SIGCHG;
161		}
162		src = scc_getmreg(bas, CHAN_A, RR_SRC);
163		if (src & SRC_OVR)
164			ch[0]->ch_ipend |= SER_INT_OVERRUN;
165	}
166	if (ip & IP_SIB) {
167		scc_setreg(bas, CHAN_B + REG_CTRL, CR_RSTXSI);
168		scc_barrier(bas);
169		bes = scc_getreg(bas, CHAN_B + REG_CTRL);
170		if (bes & BES_BRK)
171			ch[1]->ch_ipend |= SER_INT_BREAK;
172		sig = ch[1]->ch_hwsig;
173		SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS);
174		SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD);
175		SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR);
176		if (sig & SER_MASK_DELTA) {
177			ch[1]->ch_hwsig = sig;
178			ch[1]->ch_ipend |= SER_INT_SIGCHG;
179		}
180		src = scc_getmreg(bas, CHAN_B, RR_SRC);
181		if (src & SRC_OVR)
182			ch[1]->ch_ipend |= SER_INT_OVERRUN;
183	}
184	mtx_unlock_spin(&sc->sc_hwmtx);
185
186	return (ch[0]->ch_ipend | ch[1]->ch_ipend);
187}
188
189static int
190z8530_bfe_probe(struct scc_softc *sc __unused)
191{
192
193	return (0);
194}
195