cxgb_osdep.h revision 174626
1167514Skmacy/************************************************************************** 2167514Skmacy 3167514SkmacyCopyright (c) 2007, Chelsio Inc. 4167514SkmacyAll rights reserved. 5167514Skmacy 6167514SkmacyRedistribution and use in source and binary forms, with or without 7167514Skmacymodification, are permitted provided that the following conditions are met: 8167514Skmacy 9167514Skmacy 1. Redistributions of source code must retain the above copyright notice, 10167514Skmacy this list of conditions and the following disclaimer. 11167514Skmacy 12169978Skmacy 2. Neither the name of the Chelsio Corporation nor the names of its 13167514Skmacy contributors may be used to endorse or promote products derived from 14167514Skmacy this software without specific prior written permission. 15167514Skmacy 16167514SkmacyTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17167514SkmacyAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18167514SkmacyIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19167514SkmacyARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20167514SkmacyLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21167514SkmacyCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22167514SkmacySUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23167514SkmacyINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24167514SkmacyCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25167514SkmacyARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26167514SkmacyPOSSIBILITY OF SUCH DAMAGE. 27167514Skmacy 28167514Skmacy 29167514Skmacy$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 174626 2007-12-15 21:54:59Z kmacy $ 30167514Skmacy 31167514Skmacy***************************************************************************/ 32167514Skmacy 33167514Skmacy#include <sys/param.h> 34167514Skmacy#include <sys/systm.h> 35167514Skmacy#include <sys/ctype.h> 36167514Skmacy#include <sys/endian.h> 37167514Skmacy#include <sys/bus.h> 38167514Skmacy 39167514Skmacy#include <dev/mii/mii.h> 40167514Skmacy 41171471Skmacy#ifdef CONFIG_DEFINED 42171471Skmacy#include <common/cxgb_version.h> 43171471Skmacy#include <cxgb_config.h> 44171471Skmacy#else 45167514Skmacy#include <dev/cxgb/common/cxgb_version.h> 46167526Skmacy#include <dev/cxgb/cxgb_config.h> 47171471Skmacy#endif 48167514Skmacy 49167514Skmacy#ifndef _CXGB_OSDEP_H_ 50167514Skmacy#define _CXGB_OSDEP_H_ 51167514Skmacy 52167514Skmacytypedef struct adapter adapter_t; 53167514Skmacystruct sge_rspq; 54167514Skmacy 55172101Skmacystruct t3_mbuf_hdr { 56172101Skmacy struct mbuf *mh_head; 57172101Skmacy struct mbuf *mh_tail; 58172101Skmacy}; 59172101Skmacy 60172101Skmacy 61169978Skmacy#define PANIC_IF(exp) do { \ 62169978Skmacy if (exp) \ 63174626Skmacy panic("BUG: %s", #exp); \ 64169978Skmacy} while (0) 65169978Skmacy 66169978Skmacy 67169978Skmacy#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif) 68170038Skmacy#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri)) 69169978Skmacy 70167514Skmacy#if __FreeBSD_version > 700030 71167514Skmacy#define INTR_FILTERS 72167514Skmacy#define FIRMWARE_LATEST 73167514Skmacy#endif 74167514Skmacy 75167514Skmacy#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000)) 76167514Skmacy#define FIRMWARE_LATEST 77167514Skmacy#endif 78167514Skmacy 79167514Skmacy#if __FreeBSD_version > 700000 80167514Skmacy#define MSI_SUPPORTED 81167514Skmacy#define TSO_SUPPORTED 82167514Skmacy#define VLAN_SUPPORTED 83167514Skmacy#define TASKQUEUE_CURRENT 84172109Skmacy#else 85172109Skmacy#define if_name(ifp) (ifp)->if_xname 86172109Skmacy#define M_SANITY(m, n) 87167514Skmacy#endif 88167514Skmacy 89169978Skmacy#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 90169978Skmacy 91167514Skmacy/* 92167514Skmacy * Workaround for weird Chelsio issue 93167514Skmacy */ 94167514Skmacy#if __FreeBSD_version > 700029 95167514Skmacy#define PRIV_SUPPORTED 96167514Skmacy#endif 97167514Skmacy 98169978Skmacy#define CXGB_TX_CLEANUP_THRESHOLD 32 99167514Skmacy 100167514Skmacy#ifdef DEBUG_PRINT 101167514Skmacy#define DPRINTF printf 102167514Skmacy#else 103167514Skmacy#define DPRINTF(...) 104167514Skmacy#endif 105167514Skmacy 106167514Skmacy#define TX_MAX_SIZE (1 << 16) /* 64KB */ 107167514Skmacy#define TX_MAX_SEGS 36 /* maximum supported by card */ 108167514Skmacy#define TX_MAX_DESC 4 /* max descriptors per packet */ 109171471Skmacy 110171471Skmacy#define TX_START_MIN_DESC (TX_MAX_DESC << 2) 111171471Skmacy 112171471Skmacy#if 0 113171471Skmacy#define TX_START_MAX_DESC (TX_ETH_Q_SIZE >> 2) /* maximum number of descriptors */ 114171471Skmacy#endif 115171471Skmacy 116171469Skmacy#define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors 117167514Skmacy * call to start used per */ 118171471Skmacy 119170038Skmacy#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 120167514Skmacy * to clean per iteration */ 121167514Skmacy 122167514Skmacy 123167514Skmacy#if defined(__i386__) || defined(__amd64__) 124167514Skmacy#define mb() __asm volatile("mfence":::"memory") 125167514Skmacy#define rmb() __asm volatile("lfence":::"memory") 126167514Skmacy#define wmb() __asm volatile("sfence" ::: "memory") 127167514Skmacy#define smp_mb() mb() 128167526Skmacy 129171469Skmacy#define L1_CACHE_BYTES 64 130167526Skmacystatic __inline 131167526Skmacyvoid prefetch(void *x) 132167526Skmacy{ 133167526Skmacy __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 134167526Skmacy} 135167560Skmacy 136169978Skmacyextern void kdb_backtrace(void); 137169978Skmacy 138169978Skmacy#define WARN_ON(condition) do { \ 139169978Skmacy if (unlikely((condition)!=0)) { \ 140169978Skmacy log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 141169978Skmacy kdb_backtrace(); \ 142169978Skmacy } \ 143169978Skmacy} while (0) 144169978Skmacy 145169978Skmacy 146167528Skmacy#else /* !i386 && !amd64 */ 147167528Skmacy#define mb() 148167528Skmacy#define rmb() 149167528Skmacy#define wmb() 150167528Skmacy#define smp_mb() 151167560Skmacy#define prefetch(x) 152167561Skmacy#define L1_CACHE_BYTES 32 153167526Skmacy#endif 154167514Skmacy#define DBG_RX (1 << 0) 155167514Skmacystatic const int debug_flags = DBG_RX; 156167514Skmacy 157167514Skmacy#ifdef DEBUG_PRINT 158167514Skmacy#define DBG(flag, msg) do { \ 159167514Skmacy if ((flag & debug_flags)) \ 160167514Skmacy printf msg; \ 161167514Skmacy} while (0) 162167514Skmacy#else 163167514Skmacy#define DBG(...) 164167514Skmacy#endif 165167514Skmacy 166167514Skmacy#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 167167514Skmacy#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 168167514Skmacy 169167514Skmacy#define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__); 170167514Skmacy 171167514Skmacy#define CH_WARN(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 172167514Skmacy#define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 173167514Skmacy 174167514Skmacy#define t3_os_sleep(x) DELAY((x) * 1000) 175167514Skmacy 176169978Skmacy#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | bit), ((*(p)) & ~bit)) 177169978Skmacy 178169978Skmacy 179167746Skmacy#define max_t(type, a, b) (type)max((a), (b)) 180169978Skmacy#define net_device ifnet 181171471Skmacy#define cpu_to_be32 htobe32 182167746Skmacy 183169978Skmacy 184169978Skmacy 185167514Skmacy/* Standard PHY definitions */ 186167514Skmacy#define BMCR_LOOPBACK BMCR_LOOP 187167514Skmacy#define BMCR_ISOLATE BMCR_ISO 188167514Skmacy#define BMCR_ANENABLE BMCR_AUTOEN 189167514Skmacy#define BMCR_SPEED1000 BMCR_SPEED1 190167514Skmacy#define BMCR_SPEED100 BMCR_SPEED0 191167514Skmacy#define BMCR_ANRESTART BMCR_STARTNEG 192167514Skmacy#define BMCR_FULLDPLX BMCR_FDX 193167514Skmacy#define BMSR_LSTATUS BMSR_LINK 194167514Skmacy#define BMSR_ANEGCOMPLETE BMSR_ACOMP 195167514Skmacy 196167514Skmacy#define MII_LPA MII_ANLPAR 197167514Skmacy#define MII_ADVERTISE MII_ANAR 198167514Skmacy#define MII_CTRL1000 MII_100T2CR 199167514Skmacy 200167514Skmacy#define ADVERTISE_PAUSE_CAP ANAR_FC 201167514Skmacy#define ADVERTISE_PAUSE_ASYM 0x0800 202167514Skmacy#define ADVERTISE_1000HALF ANAR_X_HD 203167514Skmacy#define ADVERTISE_1000FULL ANAR_X_FD 204167514Skmacy#define ADVERTISE_10FULL ANAR_10_FD 205167514Skmacy#define ADVERTISE_10HALF ANAR_10 206167514Skmacy#define ADVERTISE_100FULL ANAR_TX_FD 207167514Skmacy#define ADVERTISE_100HALF ANAR_TX 208167514Skmacy 209167514Skmacy/* Standard PCI Extended Capaibilities definitions */ 210167514Skmacy#define PCI_CAP_ID_VPD 0x03 211167514Skmacy#define PCI_VPD_ADDR 2 212167514Skmacy#define PCI_VPD_ADDR_F 0x8000 213167514Skmacy#define PCI_VPD_DATA 4 214167514Skmacy 215167514Skmacy#define PCI_CAP_ID_EXP 0x10 216167514Skmacy#define PCI_EXP_DEVCTL 8 217167514Skmacy#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 218167514Skmacy#define PCI_EXP_LNKCTL 16 219167514Skmacy#define PCI_EXP_LNKSTA 18 220167514Skmacy 221167514Skmacy/* 222167514Skmacy * Linux compatibility macros 223167514Skmacy */ 224167514Skmacy 225167514Skmacy/* Some simple translations */ 226167514Skmacy#define __devinit 227167514Skmacy#define udelay(x) DELAY(x) 228167514Skmacy#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 229167514Skmacy#define le32_to_cpu(x) le32toh(x) 230167514Skmacy#define cpu_to_le32(x) htole32(x) 231167514Skmacy#define swab32(x) bswap32(x) 232167514Skmacy#define simple_strtoul strtoul 233167514Skmacy 234167514Skmacy/* More types and endian definitions */ 235167514Skmacytypedef uint8_t u8; 236167514Skmacytypedef uint16_t u16; 237167514Skmacytypedef uint32_t u32; 238167514Skmacytypedef uint64_t u64; 239167514Skmacy 240167514Skmacytypedef uint8_t __u8; 241167514Skmacytypedef uint16_t __u16; 242167514Skmacytypedef uint32_t __u32; 243167514Skmacytypedef uint8_t __be8; 244167514Skmacytypedef uint16_t __be16; 245167514Skmacytypedef uint32_t __be32; 246167514Skmacytypedef uint64_t __be64; 247167514Skmacy 248167514Skmacy#if BYTE_ORDER == BIG_ENDIAN 249167514Skmacy#define __BIG_ENDIAN_BITFIELD 250167514Skmacy#elif BYTE_ORDER == LITTLE_ENDIAN 251167514Skmacy#define __LITTLE_ENDIAN_BITFIELD 252167514Skmacy#else 253167514Skmacy#error "Must set BYTE_ORDER" 254167514Skmacy#endif 255167514Skmacy 256167514Skmacy/* Indicates what features are supported by the interface. */ 257167514Skmacy#define SUPPORTED_10baseT_Half (1 << 0) 258167514Skmacy#define SUPPORTED_10baseT_Full (1 << 1) 259167514Skmacy#define SUPPORTED_100baseT_Half (1 << 2) 260167514Skmacy#define SUPPORTED_100baseT_Full (1 << 3) 261167514Skmacy#define SUPPORTED_1000baseT_Half (1 << 4) 262167514Skmacy#define SUPPORTED_1000baseT_Full (1 << 5) 263167514Skmacy#define SUPPORTED_Autoneg (1 << 6) 264167514Skmacy#define SUPPORTED_TP (1 << 7) 265167514Skmacy#define SUPPORTED_AUI (1 << 8) 266167514Skmacy#define SUPPORTED_MII (1 << 9) 267167514Skmacy#define SUPPORTED_FIBRE (1 << 10) 268167514Skmacy#define SUPPORTED_BNC (1 << 11) 269167514Skmacy#define SUPPORTED_10000baseT_Full (1 << 12) 270167514Skmacy#define SUPPORTED_Pause (1 << 13) 271167514Skmacy#define SUPPORTED_Asym_Pause (1 << 14) 272167514Skmacy 273167514Skmacy/* Indicates what features are advertised by the interface. */ 274167514Skmacy#define ADVERTISED_10baseT_Half (1 << 0) 275167514Skmacy#define ADVERTISED_10baseT_Full (1 << 1) 276167514Skmacy#define ADVERTISED_100baseT_Half (1 << 2) 277167514Skmacy#define ADVERTISED_100baseT_Full (1 << 3) 278167514Skmacy#define ADVERTISED_1000baseT_Half (1 << 4) 279167514Skmacy#define ADVERTISED_1000baseT_Full (1 << 5) 280167514Skmacy#define ADVERTISED_Autoneg (1 << 6) 281167514Skmacy#define ADVERTISED_TP (1 << 7) 282167514Skmacy#define ADVERTISED_AUI (1 << 8) 283167514Skmacy#define ADVERTISED_MII (1 << 9) 284167514Skmacy#define ADVERTISED_FIBRE (1 << 10) 285167514Skmacy#define ADVERTISED_BNC (1 << 11) 286167514Skmacy#define ADVERTISED_10000baseT_Full (1 << 12) 287167514Skmacy#define ADVERTISED_Pause (1 << 13) 288167514Skmacy#define ADVERTISED_Asym_Pause (1 << 14) 289167514Skmacy 290167514Skmacy/* Enable or disable autonegotiation. If this is set to enable, 291167514Skmacy * the forced link modes above are completely ignored. 292167514Skmacy */ 293167514Skmacy#define AUTONEG_DISABLE 0x00 294167514Skmacy#define AUTONEG_ENABLE 0x01 295167514Skmacy 296167514Skmacy#define SPEED_10 10 297167514Skmacy#define SPEED_100 100 298167514Skmacy#define SPEED_1000 1000 299167514Skmacy#define SPEED_10000 10000 300167514Skmacy#define DUPLEX_HALF 0 301167514Skmacy#define DUPLEX_FULL 1 302167514Skmacy 303167514Skmacy#endif 304