cxgb_osdep.h revision 174626 
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13    contributors may be used to endorse or promote products derived from
14    this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 174626 2007-12-15 21:54:59Z kmacy $
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>
38
39#include <dev/mii/mii.h>
40
41#ifdef CONFIG_DEFINED
42#include <common/cxgb_version.h>
43#include <cxgb_config.h>
44#else
45#include <dev/cxgb/common/cxgb_version.h>
46#include <dev/cxgb/cxgb_config.h>
47#endif
48
49#ifndef _CXGB_OSDEP_H_
50#define _CXGB_OSDEP_H_
51
52typedef struct adapter adapter_t;
53struct sge_rspq;
54
55struct t3_mbuf_hdr {
56	struct mbuf *mh_head;
57	struct mbuf *mh_tail;
58};
59
60
61#define PANIC_IF(exp) do {                  \
62	if (exp)                            \
63		panic("BUG: %s", #exp);      \
64} while (0)
65
66
67#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
68#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
69
70#if __FreeBSD_version > 700030
71#define INTR_FILTERS
72#define FIRMWARE_LATEST
73#endif
74
75#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
76#define FIRMWARE_LATEST
77#endif
78
79#if __FreeBSD_version > 700000
80#define MSI_SUPPORTED
81#define TSO_SUPPORTED
82#define VLAN_SUPPORTED
83#define TASKQUEUE_CURRENT
84#else
85#define if_name(ifp) (ifp)->if_xname
86#define M_SANITY(m, n)
87#endif
88
89#define __read_mostly __attribute__((__section__(".data.read_mostly")))
90
91/*
92 * Workaround for weird Chelsio issue
93 */
94#if __FreeBSD_version > 700029
95#define PRIV_SUPPORTED
96#endif
97
98#define CXGB_TX_CLEANUP_THRESHOLD        32
99
100#ifdef DEBUG_PRINT
101#define DPRINTF printf
102#else
103#define DPRINTF(...)
104#endif
105
106#define TX_MAX_SIZE                (1 << 16)    /* 64KB                          */
107#define TX_MAX_SEGS                      36     /* maximum supported by card     */
108#define TX_MAX_DESC                       4     /* max descriptors per packet    */
109
110#define TX_START_MIN_DESC  (TX_MAX_DESC << 2)
111
112#if 0
113#define TX_START_MAX_DESC (TX_ETH_Q_SIZE >> 2)  /* maximum number of descriptors */
114#endif
115
116#define TX_START_MAX_DESC (TX_MAX_DESC << 3)    /* maximum number of descriptors
117						 * call to start used per 	 */
118
119#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4)    /* maximum tx descriptors
120						 * to clean per iteration        */
121
122
123#if defined(__i386__) || defined(__amd64__)
124#define mb()    __asm volatile("mfence":::"memory")
125#define rmb()   __asm volatile("lfence":::"memory")
126#define wmb()   __asm volatile("sfence" ::: "memory")
127#define smp_mb() mb()
128
129#define L1_CACHE_BYTES 64
130static __inline
131void prefetch(void *x)
132{
133        __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
134}
135
136extern void kdb_backtrace(void);
137
138#define WARN_ON(condition) do { \
139        if (unlikely((condition)!=0)) { \
140                log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
141                kdb_backtrace(); \
142        } \
143} while (0)
144
145
146#else /* !i386 && !amd64 */
147#define mb()
148#define rmb()
149#define wmb()
150#define smp_mb()
151#define prefetch(x)
152#define L1_CACHE_BYTES 32
153#endif
154#define DBG_RX          (1 << 0)
155static const int debug_flags = DBG_RX;
156
157#ifdef DEBUG_PRINT
158#define DBG(flag, msg) do {	\
159	if ((flag & debug_flags))	\
160		printf msg; \
161} while (0)
162#else
163#define DBG(...)
164#endif
165
166#define promisc_rx_mode(rm)  ((rm)->port->ifp->if_flags & IFF_PROMISC)
167#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
168
169#define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__);
170
171#define CH_WARN(adap, fmt, ...)	device_printf(adap->dev, fmt, ##__VA_ARGS__)
172#define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__)
173
174#define t3_os_sleep(x) DELAY((x) * 1000)
175
176#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | bit), ((*(p)) & ~bit))
177
178
179#define max_t(type, a, b) (type)max((a), (b))
180#define net_device ifnet
181#define cpu_to_be32            htobe32
182
183
184
185/* Standard PHY definitions */
186#define BMCR_LOOPBACK		BMCR_LOOP
187#define BMCR_ISOLATE		BMCR_ISO
188#define BMCR_ANENABLE		BMCR_AUTOEN
189#define BMCR_SPEED1000		BMCR_SPEED1
190#define BMCR_SPEED100		BMCR_SPEED0
191#define BMCR_ANRESTART		BMCR_STARTNEG
192#define BMCR_FULLDPLX		BMCR_FDX
193#define BMSR_LSTATUS		BMSR_LINK
194#define BMSR_ANEGCOMPLETE	BMSR_ACOMP
195
196#define MII_LPA			MII_ANLPAR
197#define MII_ADVERTISE		MII_ANAR
198#define MII_CTRL1000		MII_100T2CR
199
200#define ADVERTISE_PAUSE_CAP	ANAR_FC
201#define ADVERTISE_PAUSE_ASYM	0x0800
202#define ADVERTISE_1000HALF	ANAR_X_HD
203#define ADVERTISE_1000FULL	ANAR_X_FD
204#define ADVERTISE_10FULL	ANAR_10_FD
205#define ADVERTISE_10HALF	ANAR_10
206#define ADVERTISE_100FULL	ANAR_TX_FD
207#define ADVERTISE_100HALF	ANAR_TX
208
209/* Standard PCI Extended Capaibilities definitions */
210#define PCI_CAP_ID_VPD	0x03
211#define PCI_VPD_ADDR	2
212#define PCI_VPD_ADDR_F	0x8000
213#define PCI_VPD_DATA	4
214
215#define PCI_CAP_ID_EXP	0x10
216#define PCI_EXP_DEVCTL	8
217#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
218#define PCI_EXP_LNKCTL	16
219#define PCI_EXP_LNKSTA	18
220
221/*
222 * Linux compatibility macros
223 */
224
225/* Some simple translations */
226#define __devinit
227#define udelay(x) DELAY(x)
228#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
229#define le32_to_cpu(x) le32toh(x)
230#define cpu_to_le32(x) htole32(x)
231#define swab32(x) bswap32(x)
232#define simple_strtoul strtoul
233
234/* More types and endian definitions */
235typedef uint8_t u8;
236typedef uint16_t u16;
237typedef uint32_t u32;
238typedef uint64_t u64;
239
240typedef uint8_t	__u8;
241typedef uint16_t __u16;
242typedef uint32_t __u32;
243typedef uint8_t __be8;
244typedef uint16_t __be16;
245typedef uint32_t __be32;
246typedef uint64_t __be64;
247
248#if BYTE_ORDER == BIG_ENDIAN
249#define __BIG_ENDIAN_BITFIELD
250#elif BYTE_ORDER == LITTLE_ENDIAN
251#define __LITTLE_ENDIAN_BITFIELD
252#else
253#error "Must set BYTE_ORDER"
254#endif
255
256/* Indicates what features are supported by the interface. */
257#define SUPPORTED_10baseT_Half          (1 << 0)
258#define SUPPORTED_10baseT_Full          (1 << 1)
259#define SUPPORTED_100baseT_Half         (1 << 2)
260#define SUPPORTED_100baseT_Full         (1 << 3)
261#define SUPPORTED_1000baseT_Half        (1 << 4)
262#define SUPPORTED_1000baseT_Full        (1 << 5)
263#define SUPPORTED_Autoneg               (1 << 6)
264#define SUPPORTED_TP                    (1 << 7)
265#define SUPPORTED_AUI                   (1 << 8)
266#define SUPPORTED_MII                   (1 << 9)
267#define SUPPORTED_FIBRE                 (1 << 10)
268#define SUPPORTED_BNC                   (1 << 11)
269#define SUPPORTED_10000baseT_Full       (1 << 12)
270#define SUPPORTED_Pause                 (1 << 13)
271#define SUPPORTED_Asym_Pause            (1 << 14)
272
273/* Indicates what features are advertised by the interface. */
274#define ADVERTISED_10baseT_Half         (1 << 0)
275#define ADVERTISED_10baseT_Full         (1 << 1)
276#define ADVERTISED_100baseT_Half        (1 << 2)
277#define ADVERTISED_100baseT_Full        (1 << 3)
278#define ADVERTISED_1000baseT_Half       (1 << 4)
279#define ADVERTISED_1000baseT_Full       (1 << 5)
280#define ADVERTISED_Autoneg              (1 << 6)
281#define ADVERTISED_TP                   (1 << 7)
282#define ADVERTISED_AUI                  (1 << 8)
283#define ADVERTISED_MII                  (1 << 9)
284#define ADVERTISED_FIBRE                (1 << 10)
285#define ADVERTISED_BNC                  (1 << 11)
286#define ADVERTISED_10000baseT_Full      (1 << 12)
287#define ADVERTISED_Pause                (1 << 13)
288#define ADVERTISED_Asym_Pause           (1 << 14)
289
290/* Enable or disable autonegotiation.  If this is set to enable,
291 * the forced link modes above are completely ignored.
292 */
293#define AUTONEG_DISABLE         0x00
294#define AUTONEG_ENABLE          0x01
295
296#define SPEED_10		10
297#define SPEED_100		100
298#define SPEED_1000		1000
299#define SPEED_10000		10000
300#define DUPLEX_HALF		0
301#define DUPLEX_FULL		1
302
303#endif
304