1/**************************************************************************
2
3Copyright (c) 2008, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13    contributors may be used to endorse or promote products derived from
14    this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28***************************************************************************/
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD$");
32
33#include <cxgb_include.h>
34
35#undef msleep
36#define msleep t3_os_sleep
37
38/* TN1010 PHY specific registers. */
39enum {
40	TN1010_VEND1_STAT = 1,
41};
42
43/* IEEE auto-negotiation 10GBASE-T registers */
44enum {
45	ANEG_ADVER    = 16,
46	ANEG_LPA      = 19,
47	ANEG_10G_CTRL = 32,
48	ANEG_10G_STAT = 33
49};
50
51#define ADVERTISE_ENPAGE      (1 << 12)
52#define ADVERTISE_10000FULL   (1 << 12)
53#define ADVERTISE_LOOP_TIMING (1 << 0)
54
55/* vendor specific status register fields */
56#define F_XS_LANE_ALIGN_STAT (1 << 0)
57#define F_PCS_BLK_LOCK       (1 << 1)
58#define F_PMD_SIGNAL_OK      (1 << 2)
59#define F_LINK_STAT          (1 << 3)
60#define F_ANEG_SPEED_1G      (1 << 4)
61#define F_ANEG_MASTER        (1 << 5)
62
63#define S_ANEG_STAT    6
64#define M_ANEG_STAT    0x3
65#define G_ANEG_STAT(x) (((x) >> S_ANEG_STAT) & M_ANEG_STAT)
66
67enum {                        /* autonegotiation status */
68	ANEG_IN_PROGR = 0,
69	ANEG_COMPLETE = 1,
70	ANEG_FAILED   = 3
71};
72
73/*
74 * Reset the PHY.  May take up to 500ms to complete.
75 */
76static int tn1010_reset(struct cphy *phy, int wait)
77{
78	int err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
79	msleep(500);
80	return err;
81}
82
83static int tn1010_power_down(struct cphy *phy, int enable)
84{
85	return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
86				   BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
87}
88
89static int tn1010_autoneg_enable(struct cphy *phy)
90{
91	int err;
92
93	err = tn1010_power_down(phy, 0);
94	if (!err)
95		err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0,
96					  BMCR_ANENABLE | BMCR_ANRESTART);
97	return err;
98}
99
100static int tn1010_autoneg_restart(struct cphy *phy)
101{
102	int err;
103
104	err = tn1010_power_down(phy, 0);
105	if (!err)
106		err = t3_mdio_change_bits(phy, MDIO_DEV_ANEG, MII_BMCR, 0,
107					  BMCR_ANRESTART);
108	return err;
109}
110
111static int tn1010_advertise(struct cphy *phy, unsigned int advert)
112{
113	int err, val;
114
115	if (!(advert & ADVERTISED_1000baseT_Full))
116		return -EINVAL;               /* PHY can't disable 1000BASE-T */
117
118	val = ADVERTISE_CSMA | ADVERTISE_ENPAGE | ADVERTISE_NPAGE;
119	if (advert & ADVERTISED_Pause)
120		val |= ADVERTISE_PAUSE_CAP;
121	if (advert & ADVERTISED_Asym_Pause)
122		val |= ADVERTISE_PAUSE_ASYM;
123	err = mdio_write(phy, MDIO_DEV_ANEG, ANEG_ADVER, val);
124	if (err)
125		return err;
126
127	val = (advert & ADVERTISED_10000baseT_Full) ? ADVERTISE_10000FULL : 0;
128	return mdio_write(phy, MDIO_DEV_ANEG, ANEG_10G_CTRL, val |
129			  ADVERTISE_LOOP_TIMING);
130}
131
132static int tn1010_get_link_status(struct cphy *phy, int *link_ok,
133				  int *speed, int *duplex, int *fc)
134{
135	unsigned int status, lpa, adv;
136	int err, sp = -1, pause = 0;
137
138	err = mdio_read(phy, MDIO_DEV_VEND1, TN1010_VEND1_STAT, &status);
139	if (err)
140		return err;
141
142	if (link_ok)
143		*link_ok = (status & F_LINK_STAT) != 0;
144
145	if (G_ANEG_STAT(status) == ANEG_COMPLETE) {
146		sp = (status & F_ANEG_SPEED_1G) ? SPEED_1000 : SPEED_10000;
147
148		if (fc) {
149			err = mdio_read(phy, MDIO_DEV_ANEG, ANEG_LPA, &lpa);
150			if (!err)
151				err = mdio_read(phy, MDIO_DEV_ANEG, ANEG_ADVER,
152						&adv);
153			if (err)
154				return err;
155
156			if (lpa & adv & ADVERTISE_PAUSE_CAP)
157				pause = PAUSE_RX | PAUSE_TX;
158			else if ((lpa & ADVERTISE_PAUSE_CAP) &&
159				 (lpa & ADVERTISE_PAUSE_ASYM) &&
160				 (adv & ADVERTISE_PAUSE_ASYM))
161				pause = PAUSE_TX;
162			else if ((lpa & ADVERTISE_PAUSE_ASYM) &&
163				 (adv & ADVERTISE_PAUSE_CAP))
164				pause = PAUSE_RX;
165		}
166	}
167	if (speed)
168		*speed = sp;
169	if (duplex)
170		*duplex = DUPLEX_FULL;
171	if (fc)
172		*fc = pause;
173	return 0;
174}
175
176static int tn1010_set_speed_duplex(struct cphy *phy, int speed, int duplex)
177{
178	return -EINVAL;    /* require autoneg */
179}
180
181#ifdef C99_NOT_SUPPORTED
182static struct cphy_ops tn1010_ops = {
183	tn1010_reset,
184	t3_phy_lasi_intr_enable,
185	t3_phy_lasi_intr_disable,
186	t3_phy_lasi_intr_clear,
187	t3_phy_lasi_intr_handler,
188	tn1010_autoneg_enable,
189	tn1010_autoneg_restart,
190	tn1010_advertise,
191	NULL,
192	tn1010_set_speed_duplex,
193	tn1010_get_link_status,
194	tn1010_power_down,
195};
196#else
197static struct cphy_ops tn1010_ops = {
198	.reset             = tn1010_reset,
199	.intr_enable       = t3_phy_lasi_intr_enable,
200	.intr_disable      = t3_phy_lasi_intr_disable,
201	.intr_clear        = t3_phy_lasi_intr_clear,
202	.intr_handler      = t3_phy_lasi_intr_handler,
203	.autoneg_enable    = tn1010_autoneg_enable,
204	.autoneg_restart   = tn1010_autoneg_restart,
205	.advertise         = tn1010_advertise,
206	.set_speed_duplex  = tn1010_set_speed_duplex,
207	.get_link_status   = tn1010_get_link_status,
208	.power_down        = tn1010_power_down,
209};
210#endif
211
212int t3_tn1010_phy_prep(pinfo_t *pinfo, int phy_addr,
213		       const struct mdio_ops *mdio_ops)
214{
215	cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &tn1010_ops, mdio_ops,
216		  SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full |
217		  SUPPORTED_Autoneg | SUPPORTED_AUI | SUPPORTED_TP,
218		  "1000/10GBASE-T");
219	msleep(500);    /* PHY needs up to 500ms to start responding to MDIO */
220	return 0;
221}
222